Searched refs:USHLSAT (Results 1 – 16 of 16) sorted by relevance
| /llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/GlobalISel/ |
| H A D | combine-shift-of-shifted-logic-shlsat.mir | 18 ; CHECK-NEXT: [[USHLSAT:%[0-9]+]]:_(s32) = G_USHLSAT [[COPY]], [[C2]](s32) 20 ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[USHLSAT]], [[USHLSAT1]] 47 ; CHECK-NEXT: [[USHLSAT:%[0-9]+]]:_(s32) = G_USHLSAT [[COPY]], [[C2]](s32) 49 ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[USHLSAT]], [[USHLSAT1]] 77 ; CHECK-NEXT: [[USHLSAT:%[0-9]+]]:_(s32) = G_USHLSAT [[COPY]], [[C2]](s32) 79 ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[USHLSAT]], [[USHLSAT1]] 107 ; CHECK-NEXT: [[USHLSAT:%[0-9]+]]:_(s32) = G_USHLSAT [[COPY]], [[C2]](s32) 109 ; CHECK-NEXT: [[OR:%[0-9]+]]:_(s32) = G_OR [[USHLSAT]], [[USHLSAT1]] 138 ; CHECK-NEXT: [[OR:%[0-9]+]]:_(s32) = G_OR [[USHLSAT]], [[USHLSAT1]] 168 ; CHECK-NEXT: [[OR:%[0-9]+]]:_(s32) = G_OR [[USHLSAT]], [[USHLSAT1]] [all …]
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| H A D | combine-shift-imm-chain-shlsat.mir | 131 ; CHECK-NEXT: [[USHLSAT:%[0-9]+]]:_(s32) = G_USHLSAT [[COPY]], [[C]](s32) 132 ; CHECK-NEXT: $vgpr0 = COPY [[USHLSAT]](s32) 154 ; CHECK-NEXT: [[USHLSAT:%[0-9]+]]:_(s32) = G_USHLSAT [[COPY]], [[C]](s32) 155 ; CHECK-NEXT: $sgpr0 = COPY [[USHLSAT]](s32) 183 ; CHECK-NEXT: [[USHLSAT:%[0-9]+]]:_(s32) = G_USHLSAT [[COPY]], [[C1]](s32) 184 ; CHECK-NEXT: [[USHLSAT1:%[0-9]+]]:_(s32) = G_USHLSAT [[USHLSAT]], [[C]](s32) 212 ; CHECK-NEXT: [[USHLSAT:%[0-9]+]]:_(s64) = G_USHLSAT [[MV]], [[C1]](s64) 213 ; CHECK-NEXT: [[USHLSAT1:%[0-9]+]]:_(s64) = G_USHLSAT [[USHLSAT]], [[C]](s64)
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| H A D | irtranslator-sat.ll | 313 ; CHECK-NEXT: [[USHLSAT:%[0-9]+]]:_(s16) = G_USHLSAT [[TRUNC]], [[TRUNC1]](s16) 314 ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[USHLSAT]](s16) 329 ; CHECK-NEXT: [[USHLSAT:%[0-9]+]]:_(s32) = G_USHLSAT [[COPY]], [[COPY1]](s32) 330 ; CHECK-NEXT: $vgpr0 = COPY [[USHLSAT]](s32) 348 ; CHECK-NEXT: [[USHLSAT:%[0-9]+]]:_(s64) = G_USHLSAT [[MV]], [[MV1]](s64) 349 ; CHECK-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[USHLSAT]](s64) 369 …; CHECK-NEXT: [[USHLSAT:%[0-9]+]]:_(<2 x s32>) = G_USHLSAT [[BUILD_VECTOR]], [[BUILD_VECTOR1]](<… 370 …; CHECK-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[USHLSAT]](<2 x …
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| H A D | combine-shift-imm-chain-illegal-types.mir | 301 ; CHECK-NEXT: [[USHLSAT:%[0-9]+]]:_(s44) = G_USHLSAT [[TRUNC]], [[C]](s44) 302 ; CHECK-NEXT: [[USHLSAT1:%[0-9]+]]:_(s44) = G_USHLSAT [[USHLSAT]], [[C]](s44) 337 ; CHECK-NEXT: [[USHLSAT:%[0-9]+]]:_(s55) = G_USHLSAT [[TRUNC]], [[C]](s55) 338 ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[USHLSAT]](s55)
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| /llvm-project-15.0.7/llvm/include/llvm/CodeGen/ |
| H A D | ISDOpcodes.h | 360 USHLSAT, enumerator
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| /llvm-project-15.0.7/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | SelectionDAGDumper.cpp | 326 case ISD::USHLSAT: return "ushlsat"; in getOperationName()
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| H A D | LegalizeVectorOps.cpp | 409 case ISD::USHLSAT: in LegalizeOp()
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| H A D | LegalizeIntegerTypes.cpp | 198 case ISD::USHLSAT: Res = PromoteIntRes_ADDSUBSHLSAT(N); break; in PromoteIntegerResult() 863 bool IsShift = Opcode == ISD::USHLSAT || Opcode == ISD::SSHLSAT; in PromoteIntRes_ADDSUBSHLSAT() 902 case ISD::USHLSAT: in PromoteIntRes_ADDSUBSHLSAT() 2526 case ISD::USHLSAT: ExpandIntRes_SHLSAT(N, Lo, Hi); break; in ExpandIntegerResult()
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| H A D | LegalizeVectorTypes.cpp | 137 case ISD::USHLSAT: in ScalarizeVectorResult() 1095 case ISD::USHLSAT: in SplitVectorResult() 3720 case ISD::USHLSAT: in WidenVectorResult()
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| H A D | LegalizeDAG.cpp | 1144 case ISD::USHLSAT: in LegalizeOp() 3422 case ISD::USHLSAT: in ExpandNode()
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| H A D | TargetLowering.cpp | 8955 Node->getOpcode() == ISD::USHLSAT) && in expandShlSat()
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| H A D | DAGCombiner.cpp | 1727 case ISD::USHLSAT: return visitSHLSAT(N); in visit() 9834 if (N->getOpcode() == ISD::USHLSAT && N1C && in visitSHLSAT()
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| H A D | SelectionDAG.cpp | 5454 case ISD::USHLSAT: return C1.ushl_sat(C2); in FoldValue()
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| H A D | SelectionDAGBuilder.cpp | 6554 setValue(&I, DAG.getNode(ISD::USHLSAT, sdl, Op1.getValueType(), Op1, Op2)); in visitIntrinsicCall()
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| /llvm-project-15.0.7/llvm/lib/CodeGen/ |
| H A D | TargetLoweringBase.cpp | 804 ISD::SSHLSAT, ISD::USHLSAT, in initActions()
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| /llvm-project-15.0.7/llvm/include/llvm/Target/ |
| H A D | TargetSelectionDAG.td | 427 def ushlsat : SDNode<"ISD::USHLSAT" , SDTIntBinOp>;
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