Home
last modified time | relevance | path

Searched refs:Tmp2 (Results 1 – 25 of 30) sorted by relevance

12

/llvm-project-15.0.7/llvm/lib/CodeGen/
H A DIntrinsicLowering.cpp65 Value *Tmp2 = Builder.CreateLShr(V, ConstantInt::get(V->getType(), 8), in LowerBSWAP() local
67 V = Builder.CreateOr(Tmp1, Tmp2, "bswap.i16"); in LowerBSWAP()
75 Value *Tmp2 = Builder.CreateLShr(V, ConstantInt::get(V->getType(), 8), in LowerBSWAP() local
82 Tmp2 = Builder.CreateAnd(Tmp2, in LowerBSWAP()
86 Tmp2 = Builder.CreateOr(Tmp2, Tmp1, "bswap.or2"); in LowerBSWAP()
87 V = Builder.CreateOr(Tmp4, Tmp2, "bswap.i32"); in LowerBSWAP()
104 Value* Tmp2 = Builder.CreateLShr(V, in LowerBSWAP() local
130 Tmp2 = Builder.CreateAnd(Tmp2, in LowerBSWAP()
137 Tmp2 = Builder.CreateOr(Tmp2, Tmp1, "bswap.or4"); in LowerBSWAP()
139 Tmp4 = Builder.CreateOr(Tmp4, Tmp2, "bswap.or6"); in LowerBSWAP()
/llvm-project-15.0.7/llvm/lib/CodeGen/SelectionDAG/
H A DLegalizeDAG.cpp364 SDValue Tmp2 = Val; in PerformInsertVectorEltInMemory() local
1724 Results.push_back(Tmp2); in ExpandDYNAMIC_STACKALLOC()
3190 Tmp1 = DAG.getSelectCC(dl, Tmp1, Tmp2, Tmp1, Tmp2, Pred); in ExpandNode()
3523 Tmp2 = DAG.getNode( in ExpandNode()
3597 Tmp2.getOperand(0), Tmp2.getOperand(1), in ExpandNode()
3605 Tmp3 = Tmp2; in ExpandNode()
3607 Tmp3 = DAG.getNode(ISD::AND, dl, Tmp2.getValueType(), Tmp2, in ExpandNode()
3773 DAG, getSetCCResultType(Tmp2.getValueType()), Tmp2, Tmp3, Tmp4, in ExpandNode()
4611 Tmp2 = DAG.getNode( in PromoteNode()
4830 {Tmp2.getValue(1), Tmp2, DAG.getIntPtrConstant(0, dl)}); in PromoteNode()
[all …]
H A DSelectionDAG.cpp3933 unsigned Tmp, Tmp2; in ComputeNumSignBits() local
3973 Tmp2 = (Tmp2 > ExtraBits ? Tmp2 - ExtraBits : 1); in ComputeNumSignBits()
4041 Tmp2 = VTBits; in ComputeNumSignBits()
4049 Tmp2 = std::min(Tmp2, Tmp - SubOffset); in ComputeNumSignBits()
4051 return Tmp2; in ComputeNumSignBits()
4068 return std::max(Tmp, Tmp2); in ComputeNumSignBits()
4111 return std::min(Tmp, Tmp2); in ComputeNumSignBits()
4116 return std::min(Tmp, Tmp2); in ComputeNumSignBits()
4143 return std::min(Tmp, Tmp2); in ComputeNumSignBits()
4151 return std::min(Tmp, Tmp2); in ComputeNumSignBits()
[all …]
H A DTargetLowering.cpp7300 SDValue Tmp2, Tmp3; in expandShiftParts() local
8100 Tmp2 = DAG.getNode(ISD::AND, dl, VT, Tmp2, DAG.getConstant(0xFF00, dl, VT)); in expandBSWAP()
8102 Tmp2 = DAG.getNode(ISD::OR, dl, VT, Tmp2, Tmp1); in expandBSWAP()
8123 Tmp2 = DAG.getNode(ISD::AND, dl, VT, Tmp2, in expandBSWAP()
8128 Tmp2 = DAG.getNode(ISD::OR, dl, VT, Tmp2, Tmp1); in expandBSWAP()
8158 Tmp2 = DAG.getNode(ISD::AND, dl, VT, Tmp2, DAG.getConstant(Mask4, dl, VT)); in expandBITREVERSE()
8165 Tmp2 = DAG.getNode(ISD::AND, dl, VT, Tmp2, DAG.getConstant(Mask2, dl, VT)); in expandBITREVERSE()
8172 Tmp2 = DAG.getNode(ISD::AND, dl, VT, Tmp2, DAG.getConstant(Mask1, dl, VT)); in expandBITREVERSE()
8182 Tmp2 = in expandBITREVERSE()
8185 Tmp2 = in expandBITREVERSE()
[all …]
H A DLegalizeFloatTypes.cpp1846 SDValue Tmp1, Tmp2, Tmp3, OutputChain; in FloatExpandSetCCOperands() local
1850 Tmp2 = DAG.getSetCC(dl, getSetCCResultType(LHSLo.getValueType()), LHSLo, in FloatExpandSetCCOperands()
1852 OutputChain = Tmp2->getNumValues() > 1 ? Tmp2.getValue(1) : SDValue(); in FloatExpandSetCCOperands()
1853 Tmp3 = DAG.getNode(ISD::AND, dl, Tmp1.getValueType(), Tmp1, Tmp2); in FloatExpandSetCCOperands()
1858 Tmp2 = DAG.getSetCC(dl, getSetCCResultType(LHSHi.getValueType()), LHSHi, in FloatExpandSetCCOperands()
1860 OutputChain = Tmp2->getNumValues() > 1 ? Tmp2.getValue(1) : SDValue(); in FloatExpandSetCCOperands()
1861 Tmp1 = DAG.getNode(ISD::AND, dl, Tmp1.getValueType(), Tmp1, Tmp2); in FloatExpandSetCCOperands()
/llvm-project-15.0.7/clang/test/CodeGenCXX/
H A Dmatrix-type.cpp59 float Tmp2; member
104 long Tmp2; member in MatrixClass
132 long Tmp2; member in MatrixClassTemplate
/llvm-project-15.0.7/clang/test/CodeGen/
H A Dmatrix-type.c142 float Tmp2; member
/llvm-project-15.0.7/llvm/lib/Target/X86/
H A DX86ISelDAGToDAG.cpp3877 SDValue Tmp0, Tmp1, Tmp2, Tmp3, Tmp4; in matchBEXTRFromAndImm() local
3913 SDValue Tmp0, Tmp1, Tmp2, Tmp3, Tmp4; in emitPCMPISTR() local
3946 SDValue Tmp0, Tmp1, Tmp2, Tmp3, Tmp4; in emitPCMPESTR() local
4218 SDValue Tmp0, Tmp1, Tmp2, Tmp3, Tmp4; in matchVPTERNLOG() local
4604 SDValue Tmp0, Tmp1, Tmp2, Tmp3, Tmp4; in tryVPTESTM() local
5104 SDValue Tmp0, Tmp1, Tmp2, Tmp3, Tmp4; in Select() local
5157 SDValue Tmp0, Tmp1, Tmp2, Tmp3, Tmp4; in Select() local
5239 SDValue Tmp0, Tmp1, Tmp2, Tmp3, Tmp4; in Select() local
5373 SDValue Tmp0, Tmp1, Tmp2, Tmp3, Tmp4; in Select() local
5381 SDValue Tmp0, Tmp1, Tmp2, Tmp3, Tmp4, Chain; in Select() local
[all …]
/llvm-project-15.0.7/llvm/lib/Transforms/Utils/
H A DIntegerDivision.cpp131 Value *Tmp2 = Builder.CreateXor(Tmp, Dividend); in generateSignedDivisionCode() local
132 Value *U_Dvnd = Builder.CreateSub(Tmp2, Tmp); in generateSignedDivisionCode()
271 Value *Tmp2 = Builder.CreateSub(MSB, SR); in generateUnsignedDivisionCode() local
272 Value *Q = Builder.CreateShl(Dividend, Tmp2); in generateUnsignedDivisionCode()
/llvm-project-15.0.7/llvm/lib/Target/VE/
H A DVEISelLowering.cpp2020 Register Tmp2 = MRI.createVirtualRegister(RC); in prepareMBB() local
2032 BuildMI(MBB, I, DL, TII->get(VE::ANDrm), Tmp2) in prepareMBB()
2037 .addReg(Tmp2, getKillRegState(true)) in prepareMBB()
2048 BuildMI(MBB, I, DL, TII->get(VE::ANDrm), Tmp2) in prepareMBB()
2052 .addReg(Tmp2, getKillRegState(true)) in prepareMBB()
2098 .addReg(Tmp2, getKillRegState(true)) in prepareSymbol()
2118 .addReg(Tmp2, getKillRegState(true)) in prepareSymbol()
2140 .addReg(Tmp2, getKillRegState(true)) in prepareSymbol()
2513 Register Tmp2 = MRI.createVirtualRegister(RC); in emitSjLjDispatchBlock() local
2529 .addReg(Tmp2, getKillRegState(true)) in emitSjLjDispatchBlock()
[all …]
/llvm-project-15.0.7/clang-tools-extra/modularize/
H A DModularizeUtilities.cpp458 StringRef Tmp2(Tmp); in getCanonicalPath() local
459 if (Tmp2.startswith("./")) in getCanonicalPath()
460 Tmp = std::string(Tmp2.substr(2)); in getCanonicalPath()
/llvm-project-15.0.7/clang/lib/StaticAnalyzer/Core/
H A DExprEngineC.cpp48 ExplodedNodeSet Tmp2; in VisitBinaryOperator() local
73 evalStore(Tmp2, B, LHS, *it, state->BindExpr(B, LCtx, ExprVal), in VisitBinaryOperator()
79 StmtNodeBuilder Bldr(*it, Tmp2, *currBldrCtx); in VisitBinaryOperator()
187 evalStore(Tmp2, B, LHS, *I, state, location, LHSVal); in VisitBinaryOperator()
192 getCheckerManager().runCheckersForPostStmt(Dst, Tmp2, B, *this); in VisitBinaryOperator()
H A DCheckerManager.cpp125 ExplodedNodeSet Tmp1, Tmp2; in expandGraphWithCheckers() local
133 CurrSet = (PrevSet == &Tmp1) ? &Tmp2 : &Tmp1; in expandGraphWithCheckers()
/llvm-project-15.0.7/llvm/lib/Target/Hexagon/
H A DHexagonHardwareLoops.cpp1943 SmallVector<MachineOperand,1> Tmp2; in createPreheaderForLoop() local
1950 Tmp2.clear(); in createPreheaderForLoop()
1951 bool NotAnalyzed = TII->analyzeBranch(*PB, TB, FB, Tmp2, false); in createPreheaderForLoop()
1954 if (TB != Header && (Tmp2.empty() || FB != Header)) in createPreheaderForLoop()
1963 bool LatchNotAnalyzed = TII->analyzeBranch(*Latch, TB, FB, Tmp2, false); in createPreheaderForLoop()
H A DHexagonSplitDouble.cpp690 auto *Tmp2 = in splitMemRef() local
692 HighI->addMemOperand(MF, Tmp2); in splitMemRef()
/llvm-project-15.0.7/llvm/lib/Target/LoongArch/
H A DLoongArchISelLowering.cpp148 SDValue Tmp1, Tmp2; in lowerUINT_TO_FP() local
156 TLI.expandUINT_TO_FP(N, Tmp1, Tmp2, DAG); in lowerUINT_TO_FP()
394 SDValue Tmp1, Tmp2; in ReplaceNodeResults() local
395 TLI.expandFP_TO_UINT(N, Tmp1, Tmp2, DAG); in ReplaceNodeResults()
/llvm-project-15.0.7/llvm/lib/Analysis/
H A DValueTracking.cpp3096 unsigned Tmp, Tmp2; in ComputeNumSignBitsImpl() local
3181 Tmp2 = ShAmt->getZExtValue(); in ComputeNumSignBitsImpl()
3182 return Tmp - Tmp2; in ComputeNumSignBitsImpl()
3193 FirstAnswer = std::min(Tmp, Tmp2); in ComputeNumSignBitsImpl()
3211 return std::min(Tmp, Tmp2); in ComputeNumSignBitsImpl()
3238 if (Tmp2 == 1) break; in ComputeNumSignBitsImpl()
3239 return std::min(Tmp, Tmp2) - 1; in ComputeNumSignBitsImpl()
3243 if (Tmp2 == 1) break; in ComputeNumSignBitsImpl()
3259 return Tmp2; in ComputeNumSignBitsImpl()
3268 return std::min(Tmp, Tmp2) - 1; in ComputeNumSignBitsImpl()
[all …]
/llvm-project-15.0.7/llvm/unittests/IR/
H A DPassManagerTest.cpp371 auto Tmp2 = PreservedAnalyses::all(); in TEST() local
372 Intersected.intersect(std::move(Tmp2)); in TEST()
/llvm-project-15.0.7/clang/lib/CodeGen/
H A DCGExprComplex.cpp856 llvm::Value *Tmp2 = Builder.CreateMul(LHSi, RHSi); // b*d in EmitBinDiv() local
857 llvm::Value *Tmp3 = Builder.CreateAdd(Tmp1, Tmp2); // ac+bd in EmitBinDiv()
/llvm-project-15.0.7/llvm/lib/Target/NVPTX/
H A DNVPTXISelLowering.cpp2042 SDValue Tmp2 = DAG.getNode(ISD::SHL, dl, VT, ShOpHi, RevShAmt); in LowerShiftRightParts() local
2043 SDValue FalseVal = DAG.getNode(ISD::OR, dl, VT, Tmp1, Tmp2); in LowerShiftRightParts()
2102 SDValue Tmp2 = DAG.getNode(ISD::SRL, dl, VT, ShOpLo, RevShAmt); in LowerShiftLeftParts() local
2103 SDValue FalseVal = DAG.getNode(ISD::OR, dl, VT, Tmp1, Tmp2); in LowerShiftLeftParts()
2455 SDValue Tmp2 = ST->getBasePtr(); in LowerSTOREi1() local
2460 DAG.getTruncStore(Tmp1, dl, Tmp3, Tmp2, ST->getPointerInfo(), MVT::i8, in LowerSTOREi1()
/llvm-project-15.0.7/llvm/lib/Target/AMDGPU/
H A DAMDGPUISelLowering.cpp2110 SDValue Tmp2 = DAG.getNode(ISD::SELECT, SL, MVT::i64, ExpGt51, BcInt, Tmp1); in LowerFTRUNC() local
2112 return DAG.getNode(ISD::BITCAST, SL, MVT::f64, Tmp2); in LowerFTRUNC()
2128 SDValue Tmp2 = DAG.getNode(ISD::FSUB, SL, MVT::f64, Tmp1, CopySign); in LowerFRINT() local
2139 return DAG.getSelect(SL, MVT::f64, Cond, Src, Tmp2); in LowerFRINT()
H A DAMDGPULegalizerInfo.cpp2064 auto Tmp2 = B.buildFSub(Ty, Tmp1, CopySign); in legalizeFrint() local
2070 B.buildSelect(MI.getOperand(0).getReg(), Cond, Src, Tmp2); in legalizeFrint()
3827 auto Tmp2 = B.buildFMA(ResTy, NegY, Ret, X); in legalizeFastUnsafeFDIV64() local
3829 B.buildFMA(Res, Tmp2, R, Ret); in legalizeFastUnsafeFDIV64()
H A DSIISelLowering.cpp3365 SDValue Tmp2 = Op.getValue(1); in lowerDYNAMIC_STACKALLOCImpl() local
3375 SDValue Size = Tmp2.getOperand(1); in lowerDYNAMIC_STACKALLOCImpl()
3399 Tmp2 = DAG.getCALLSEQ_END( in lowerDYNAMIC_STACKALLOCImpl()
3403 return DAG.getMergeValues({Tmp1, Tmp2}, dl); in lowerDYNAMIC_STACKALLOCImpl()
8871 SDValue Tmp2 = DAG.getNode(ISD::FMA, SL, VT, NegY, Ret, X); in lowerFastUnsafeFDIV64() local
8872 return DAG.getNode(ISD::FMA, SL, VT, Tmp2, R, Ret); in lowerFastUnsafeFDIV64()
10372 SDValue Tmp2 = DAG.getNode(ExtOp, SL, NVT, Op0->getOperand(1)); in performIntMed3ImmCombine() local
10375 SDValue Med3 = DAG.getNode(Med3Opc, SL, NVT, Tmp1, Tmp2, Tmp3); in performIntMed3ImmCombine()
/llvm-project-15.0.7/llvm/lib/Target/SystemZ/
H A DSystemZISelLowering.cpp7856 Register Tmp2 = MRI.createVirtualRegister(RC); in emitAtomicLoadBinary() local
7857 BuildMI(MBB, DL, TII->get(SystemZ::LCGR), Tmp2).addReg(Tmp); in emitAtomicLoadBinary()
7859 .addReg(Tmp2).addImm(-1); in emitAtomicLoadBinary()
8136 Register Tmp2 = MRI.createVirtualRegister(&SystemZ::GR128BitRegClass); in emitPair128() local
8139 BuildMI(*MBB, MI, DL, TII->get(TargetOpcode::INSERT_SUBREG), Tmp2) in emitPair128()
8142 .addReg(Tmp2).addReg(Lo).addImm(SystemZ::subreg_l64); in emitPair128()
/llvm-project-15.0.7/llvm/lib/Target/PowerPC/
H A DPPCISelDAGToDAG.cpp5962 SDNode *Tmp2 = CurDAG->getMachineNode(Opc1, dl, VT, EltVal); in Select() local
5964 SDValue(Tmp2, 0))); in Select()
5976 SDNode *Tmp2 = CurDAG->getMachineNode(Opc1, dl, VT, EltVal); in Select() local
5978 SDValue(Tmp2, 0))); in Select()

12