Lines Matching refs:Tmp2
2020 Register Tmp2 = MRI.createVirtualRegister(RC); in prepareMBB() local
2032 BuildMI(MBB, I, DL, TII->get(VE::ANDrm), Tmp2) in prepareMBB()
2037 .addReg(Tmp2, getKillRegState(true)) in prepareMBB()
2048 BuildMI(MBB, I, DL, TII->get(VE::ANDrm), Tmp2) in prepareMBB()
2052 .addReg(Tmp2, getKillRegState(true)) in prepareMBB()
2084 Register Tmp2 = MRI.createVirtualRegister(RC); in prepareSymbol() local
2093 BuildMI(MBB, I, DL, TII->get(VE::ANDrm), Tmp2) in prepareSymbol()
2098 .addReg(Tmp2, getKillRegState(true)) in prepareSymbol()
2102 Register Tmp2 = MRI.createVirtualRegister(RC); in prepareSymbol() local
2113 BuildMI(MBB, I, DL, TII->get(VE::ANDrm), Tmp2) in prepareSymbol()
2118 .addReg(Tmp2, getKillRegState(true)) in prepareSymbol()
2127 Register Tmp2 = MRI.createVirtualRegister(RC); in prepareSymbol() local
2136 BuildMI(MBB, I, DL, TII->get(VE::ANDrm), Tmp2) in prepareSymbol()
2140 .addReg(Tmp2, getKillRegState(true)) in prepareSymbol()
2513 Register Tmp2 = MRI.createVirtualRegister(RC); in emitSjLjDispatchBlock() local
2524 BuildMI(DispContBB, DL, TII->get(VE::ANDrm), Tmp2) in emitSjLjDispatchBlock()
2529 .addReg(Tmp2, getKillRegState(true)) in emitSjLjDispatchBlock()
2540 BuildMI(DispContBB, DL, TII->get(VE::ANDrm), Tmp2) in emitSjLjDispatchBlock()
2544 .addReg(Tmp2, getKillRegState(true)) in emitSjLjDispatchBlock()