| /llvm-project-15.0.7/llvm/unittests/CodeGen/ |
| H A D | SelectionDAGAddressAnalysisTest.cpp | 155 auto SubVecVT = EVT::getVectorVT(Context, Int8VT, 2); in TEST_F() local
159 SDValue Value = DAG->getConstant(0, Loc, SubVecVT); in TEST_F()
161 TypeSize Offset1 = SubVecVT.getStoreSize(); in TEST_F()
187 auto SubVecVT = EVT::getVectorVT(Context, Int8VT, 2, true); in TEST_F() local
191 SDValue Value = DAG->getConstant(0, Loc, SubVecVT); in TEST_F()
192 TypeSize Offset1 = SubVecVT.getStoreSize(); in TEST_F()
277 auto SubVecVT = EVT::getVectorVT(Context, Int8VT, 2, true); in TEST_F() local
284 SDValue Value1 = DAG->getConstant(0, Loc, SubVecVT); in TEST_F()
316 auto SubVecVT = EVT::getVectorVT(Context, Int8VT, 2, true); in TEST_F() local
325 SDValue Value1 = DAG->getConstant(0, Loc, SubVecVT); in TEST_F()
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| /llvm-project-15.0.7/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.cpp | 5409 MVT SubVecVT = SubVec.getSimpleValueType(); in lowerINSERT_SUBVECTOR() local
5424 SubVecVT.getVectorMinNumElements() >= 8) { in lowerINSERT_SUBVECTOR()
5430 SubVecVT = in lowerINSERT_SUBVECTOR()
5436 SubVec = DAG.getBitcast(SubVecVT, SubVec); in lowerINSERT_SUBVECTOR()
5458 if (SubVecVT.isFixedLengthVector()) { in lowerINSERT_SUBVECTOR()
5490 VecVT, SubVecVT, OrigIdx, TRI); in lowerINSERT_SUBVECTOR()
5561 MVT SubVecVT = Op.getSimpleValueType(); in lowerEXTRACT_SUBVECTOR() local
5576 SubVecVT.getVectorMinNumElements() >= 8) { in lowerEXTRACT_SUBVECTOR()
5582 SubVecVT = in lowerEXTRACT_SUBVECTOR()
5611 if (SubVecVT.isFixedLengthVector()) { in lowerEXTRACT_SUBVECTOR()
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| H A D | RISCVISelDAGToDAG.cpp | 1580 MVT SubVecVT = SubV.getSimpleValueType(); in Select() local
1583 MVT SubVecContainerVT = SubVecVT; in Select()
1585 if (SubVecVT.isFixedLengthVector()) in Select()
1586 SubVecContainerVT = TLI.getContainerForFixedLengthVector(SubVecVT); in Select()
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| H A D | RISCVISelLowering.h | 580 decomposeSubvectorInsertExtractToSubRegs(MVT VecVT, MVT SubVecVT,
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| /llvm-project-15.0.7/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | LegalizeVectorTypes.cpp | 1381 EVT SubVecVT = SubVec.getValueType(); in SplitVecRes_INSERT_SUBVECTOR() local
1383 unsigned SubElems = SubVecVT.getVectorMinNumElements(); in SplitVecRes_INSERT_SUBVECTOR()
1397 if (VecVT.isScalableVector() == SubVecVT.isScalableVector() && in SplitVecRes_INSERT_SUBVECTOR()
1419 TLI.getVectorSubVecPointer(DAG, StackPtr, VecVT, SubVecVT, Idx); in SplitVecRes_INSERT_SUBVECTOR()
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| H A D | TargetLowering.cpp | 8726 EVT SubVecVT, in getVectorSubVecPointer() argument
8738 assert(SubVecVT.getVectorElementType() == EltVT && in getVectorSubVecPointer()
8741 SubVecVT.getVectorElementCount()); in getVectorSubVecPointer()
8744 if (SubVecVT.isScalableVector()) in getVectorSubVecPointer()
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| H A D | LegalizeDAG.cpp | 1447 EVT SubVecVT = Part.getValueType(); in ExpandInsertToVectorThroughStack() local
1458 TLI.getVectorSubVecPointer(DAG, StackPtr, VecVT, SubVecVT, Idx); in ExpandInsertToVectorThroughStack()
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| H A D | LegalizeIntegerTypes.cpp | 5266 EVT SubVecVT = SubVec.getValueType(); in PromoteIntRes_INSERT_SUBVECTOR() local
5269 SubVecVT.getVectorElementCount()); in PromoteIntRes_INSERT_SUBVECTOR()
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| H A D | DAGCombiner.cpp | 19452 EVT SubVecVT = SubVec.getValueType(); in combineInsertEltToShuffle() local
19454 unsigned NumSrcElts = SubVecVT.getVectorNumElements(); in combineInsertEltToShuffle()
19459 unsigned ExtendRatio = VT.getSizeInBits() / SubVecVT.getSizeInBits(); in combineInsertEltToShuffle()
19476 EVT SubVecEltVT = SubVecVT.getVectorElementType(); in combineInsertEltToShuffle()
19484 SmallVector<SDValue, 8> ConcatOps(ExtendRatio, DAG.getUNDEF(SubVecVT)); in combineInsertEltToShuffle()
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| /llvm-project-15.0.7/llvm/include/llvm/CodeGen/ |
| H A D | TargetLowering.h | 4829 EVT SubVecVT, SDValue Index) const;
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| /llvm-project-15.0.7/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 6761 MVT SubVecVT = SubVec.getSimpleValueType(); in insert1BitVector() local
6762 unsigned SubVecNumElems = SubVecVT.getVectorNumElements(); in insert1BitVector()
6764 IdxVal % SubVecVT.getSizeInBits() == 0 && in insert1BitVector()
6821 Vec = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, SubVecVT, Vec, ZeroIdx); in insert1BitVector()
47833 EVT SubVecVT = SubVec.getValueType(); in combineScalarAndWithMaskSetcc() local
47837 if (SubVec.getOpcode() != ISD::SETCC || !TLI.isTypeLegal(SubVecVT) || in combineScalarAndWithMaskSetcc()
47838 !N->getConstantOperandAPInt(1).isMask(SubVecVT.getVectorNumElements())) in combineScalarAndWithMaskSetcc()
47853 DAG.getConstant(0, dl, SubVecVT)); in combineScalarAndWithMaskSetcc()
54198 MVT SubVecVT = SubVec.getSimpleValueType(); in combineINSERT_SUBVECTOR() local
54231 SubVecVT.getFixedSizeInBits()) in combineINSERT_SUBVECTOR()
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