| /llvm-project-15.0.7/llvm/lib/CodeGen/ |
| H A D | TargetLoweringBase.cpp | 913 MVT ShiftVT = in getShiftAmountTy() local
917 if (ShiftVT.getSizeInBits() < Log2_32_Ceil(LHSTy.getSizeInBits())) in getShiftAmountTy()
918 ShiftVT = MVT::i32; in getShiftAmountTy()
919 assert(ShiftVT.getSizeInBits() >= Log2_32_Ceil(LHSTy.getSizeInBits()) && in getShiftAmountTy()
921 return ShiftVT; in getShiftAmountTy()
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| /llvm-project-15.0.7/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | DAGCombiner.cpp | 4007 EVT ShiftVT = getShiftAmountTy(N0.getValueType()); in visitMUL() local
4514 EVT ShiftVT = getShiftAmountTy(N0.getValueType()); in visitUDIVLike() local
4755 EVT ShiftVT = getShiftAmountTy(N0.getValueType()); in visitMULHU() local
7262 EVT ShiftVT = OppShift.getOperand(1).getValueType(); in extractShiftForRotate() local
8840 EVT ShiftVT = C1->getValueType(0); in visitRotate() local
8850 CombineOp, dl, ShiftVT, {Norm1, Norm2})) { in visitRotate()
8868 EVT ShiftVT = N1.getValueType(); in visitSHL() local
8984 Sum = DAG.getNode(ISD::ADD, DL, ShiftVT, Sum, N1); in visitSHL()
9272 EVT ShiftVT = N1.getValueType(); in visitSRA() local
9273 EVT ShiftSVT = ShiftVT.getScalarType(); in visitSRA()
[all …]
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| H A D | LegalizeDAG.cpp | 1628 EVT ShiftVT = IntVT; in ExpandFCOPYSIGN() local
1632 ShiftVT = MagVT; in ExpandFCOPYSIGN()
1635 SDValue ShiftCnst = DAG.getConstant(ShiftAmount, DL, ShiftVT); in ExpandFCOPYSIGN()
1636 SignBit = DAG.getNode(ISD::SRL, DL, ShiftVT, SignBit, ShiftCnst); in ExpandFCOPYSIGN()
1638 SDValue ShiftCnst = DAG.getConstant(-ShiftAmount, DL, ShiftVT); in ExpandFCOPYSIGN()
1639 SignBit = DAG.getNode(ISD::SHL, DL, ShiftVT, SignBit, ShiftCnst); in ExpandFCOPYSIGN()
2424 EVT ShiftVT = TLI.getShiftAmountTy(SrcVT, DAG.getDataLayout()); in ExpandLegalINT_TO_FP() local
2425 SDValue ShiftConst = DAG.getConstant(1, dl, ShiftVT); in ExpandLegalINT_TO_FP()
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| H A D | TargetLowering.cpp | 1693 EVT ShiftVT = Op1.getValueType(); in SimplifyDemandedBits() local
1716 SDValue NewSA = TLO.DAG.getConstant(Diff, dl, ShiftVT); in SimplifyDemandedBits()
1758 TLO.DAG.getConstant(ShAmt - InnerShAmt, dl, ShiftVT); in SimplifyDemandedBits()
1831 EVT ShiftVT = Op1.getValueType(); in SimplifyDemandedBits() local
1859 SDValue NewSA = TLO.DAG.getConstant(Diff, dl, ShiftVT); in SimplifyDemandedBits()
1888 EVT ShiftVT = Op1.getValueType(); in SimplifyDemandedBits() local
1947 SDValue NewSA = TLO.DAG.getConstant(BitWidth - 1 - Log2, dl, ShiftVT); in SimplifyDemandedBits()
3945 EVT ShiftVT = getShiftAmountTy(OpVT, DAG.getDataLayout(), in foldSetCCWithBinOp() local
3947 SDValue One = DAG.getConstant(1, DL, ShiftVT); in foldSetCCWithBinOp()
7524 EVT ShiftVT = getShiftAmountTy(SrcVT, DAG.getDataLayout()); in expandUINT_TO_FP() local
[all …]
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| H A D | SelectionDAG.cpp | 1580 EVT ShiftVT = TLI->getShiftAmountTy(VT, getDataLayout(), LegalTypes); in getShiftAmountConstant() local
1581 return getConstant(Val, DL, ShiftVT); in getShiftAmountConstant()
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| /llvm-project-15.0.7/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 11525 MVT ShiftVT = ResVT; in LowerCONCAT_VECTORSvXi1() local
11532 DAG.getUNDEF(ShiftVT), SubVec, in LowerCONCAT_VECTORSvXi1()
11534 Op = DAG.getNode(X86ISD::KSHIFTL, dl, ShiftVT, SubVec, in LowerCONCAT_VECTORSvXi1()
13709 MVT ShiftVT; in lowerShuffleAsShift() local
13729 V = DAG.getBitcast(ShiftVT, V); in lowerShuffleAsShift()
13730 V = DAG.getNode(Opcode, DL, ShiftVT, V, in lowerShuffleAsShift()
29721 MVT ShiftVT = MVT::getVectorVT(MVT::i16, NumElts / 2); in LowerShiftByScalarImmediate() local
52279 MVT ShiftVT = SrcVT; in combineMOVMSK() local
52280 if (ShiftVT.getScalarType() == MVT::i8) { in combineMOVMSK()
52282 ShiftVT = MVT::getVectorVT(MVT::i16, NumElts / 2); in combineMOVMSK()
[all …]
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| /llvm-project-15.0.7/llvm/lib/Target/SystemZ/ |
| H A D | SystemZISelLowering.cpp | 6255 EVT ShiftVT = N0.getOperand(1).getValueType(); in combineSIGN_EXTEND() local
6260 ShiftVT)); in combineSIGN_EXTEND()
6262 DAG.getConstant(NewSraAmt, SDLoc(N0), ShiftVT)); in combineSIGN_EXTEND()
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| /llvm-project-15.0.7/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 6590 EVT ShiftVT = N->getOperand(1).getValueType(); in LowerShift() local
6592 ISD::SUB, dl, ShiftVT, getZeroVector(ShiftVT, DAG, dl), N->getOperand(1)); in LowerShift()
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