Lines Matching refs:ShiftVT
11525 MVT ShiftVT = ResVT; in LowerCONCAT_VECTORSvXi1() local
11527 ShiftVT = Subtarget.hasDQI() ? MVT::v8i1 : MVT::v16i1; in LowerCONCAT_VECTORSvXi1()
11531 SubVec = DAG.getNode(ISD::INSERT_SUBVECTOR, dl, ShiftVT, in LowerCONCAT_VECTORSvXi1()
11532 DAG.getUNDEF(ShiftVT), SubVec, in LowerCONCAT_VECTORSvXi1()
11534 Op = DAG.getNode(X86ISD::KSHIFTL, dl, ShiftVT, SubVec, in LowerCONCAT_VECTORSvXi1()
13639 static int matchShuffleAsShift(MVT &ShiftVT, unsigned &Opcode, in matchShuffleAsShift() argument
13676 ShiftVT = ByteShift ? MVT::getVectorVT(MVT::i8, SizeInBits / 8) in matchShuffleAsShift()
13709 MVT ShiftVT; in lowerShuffleAsShift() local
13714 int ShiftAmt = matchShuffleAsShift(ShiftVT, Opcode, VT.getScalarSizeInBits(), in lowerShuffleAsShift()
13719 ShiftAmt = matchShuffleAsShift(ShiftVT, Opcode, VT.getScalarSizeInBits(), in lowerShuffleAsShift()
13727 assert(DAG.getTargetLoweringInfo().isTypeLegal(ShiftVT) && in lowerShuffleAsShift()
13729 V = DAG.getBitcast(ShiftVT, V); in lowerShuffleAsShift()
13730 V = DAG.getNode(Opcode, DL, ShiftVT, V, in lowerShuffleAsShift()
29721 MVT ShiftVT = MVT::getVectorVT(MVT::i16, NumElts / 2); in LowerShiftByScalarImmediate() local
29751 SDValue SHL = getTargetVShiftByConstNode(X86ISD::VSHLI, dl, ShiftVT, R, in LowerShiftByScalarImmediate()
29760 SDValue SRL = getTargetVShiftByConstNode(X86ISD::VSRLI, dl, ShiftVT, R, in LowerShiftByScalarImmediate()
52279 MVT ShiftVT = SrcVT; in combineMOVMSK() local
52280 if (ShiftVT.getScalarType() == MVT::i8) { in combineMOVMSK()
52282 ShiftVT = MVT::getVectorVT(MVT::i16, NumElts / 2); in combineMOVMSK()
52283 LHS = DAG.getBitcast(ShiftVT, LHS); in combineMOVMSK()
52286 LHS = getTargetVShiftByConstNode(X86ISD::VSHLI, DL, ShiftVT, LHS, in combineMOVMSK()