| /llvm-project-15.0.7/polly/lib/External/isl/ |
| H A D | ChangeLog | 31 date: Sat Mar 9 15:25:29 CET 2019
41 date: Sat Jul 21 18:10:08 CEST 2018
48 date: Sat Mar 3 10:44:49 CET 2018
118 date: Sat Oct 25 16:08:47 CEST 2014
180 date: Sat Dec 17 18:19:26 CET 2011
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| /llvm-project-15.0.7/llvm/docs/HistoricalNotes/ |
| H A D | 2001-05-19-ExceptionResponse.txt | 1 Date: Sat, 19 May 2001 19:09:13 -0500 (CDT)
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| H A D | 2000-11-18-EarlyDesignIdeas.txt | 1 Date: Sat, 18 Nov 2000 09:19:35 -0600 (CST)
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| /llvm-project-15.0.7/llvm/lib/Transforms/AggressiveInstCombine/ |
| H A D | AggressiveInstCombine.cpp | 426 Value *Sat = Builder.CreateCall(Fn, In); in tryToFPToSat() local
427 I.replaceAllUsesWith(Builder.CreateSExt(Sat, IntTy)); in tryToFPToSat()
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| /llvm-project-15.0.7/llvm/test/CodeGen/Hexagon/ |
| H A D | blockaddr-fpic.ll | 16 @g6 = private unnamed_addr constant [4 x i8] c"Sat\00", align 1
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| /llvm-project-15.0.7/llvm/lib/Transforms/InstCombine/ |
| H A D | InstCombineCalls.cpp | 927 Value *Sat = Builder.CreateCall(F, {AT, BT}); in matchSAddSubSat() local
928 return CastInst::Create(Instruction::SExt, Sat, Ty); in matchSAddSubSat()
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| /llvm-project-15.0.7/llvm/lib/Target/AMDGPU/AsmParser/ |
| H A D | AMDGPUAsmParser.cpp | 6438 bool Sat = CntName.endswith("_sat"); in parseCnt() local
6441 Failed = encodeCnt(ISA, IntVal, CntVal, Sat, encodeVmcnt, decodeVmcnt); in parseCnt()
6443 Failed = encodeCnt(ISA, IntVal, CntVal, Sat, encodeExpcnt, decodeExpcnt); in parseCnt()
6445 Failed = encodeCnt(ISA, IntVal, CntVal, Sat, encodeLgkmcnt, decodeLgkmcnt); in parseCnt()
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| /llvm-project-15.0.7/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 3891 SDValue Sat; in LowerVectorFP_TO_INT_SAT() local
3898 Sat = DAG.getNode(ISD::SMAX, DL, IntVT, Min, MaxC); in LowerVectorFP_TO_INT_SAT()
3902 Sat = DAG.getNode(ISD::UMIN, DL, IntVT, NativeCvt, MinC); in LowerVectorFP_TO_INT_SAT()
3905 return DAG.getNode(ISD::TRUNCATE, DL, DstVT, Sat); in LowerVectorFP_TO_INT_SAT()
3947 SDValue Sat; in LowerFP_TO_INT_SAT() local
3954 Sat = DAG.getNode(ISD::SMAX, DL, DstVT, Min, MaxC); in LowerFP_TO_INT_SAT()
3958 Sat = DAG.getNode(ISD::UMIN, DL, DstVT, NativeCvt, MinC); in LowerFP_TO_INT_SAT()
3961 return DAG.getNode(ISD::TRUNCATE, DL, DstVT, Sat); in LowerFP_TO_INT_SAT()
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| /llvm-project-15.0.7/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | DAGCombiner.cpp | 5142 SDValue Sat = DAG.getNode(NewOpc, DL, NewVT, Fp.getOperand(0), in PerformMinMaxFpToSatCombine() local
5144 return Unsigned ? DAG.getZExtOrTrunc(Sat, DL, N2->getValueType(0)) in PerformMinMaxFpToSatCombine()
5145 : DAG.getSExtOrTrunc(Sat, DL, N2->getValueType(0)); in PerformMinMaxFpToSatCombine()
5178 SDValue Sat = in PerformUMinFpToSatCombine() local
5181 return DAG.getZExtOrTrunc(Sat, SDLoc(N0), N3.getValueType()); in PerformUMinFpToSatCombine()
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| H A D | TargetLowering.cpp | 9269 SDValue Sat = DAG.getNode(OpcSat, dl, LHS.getValueType(), LHS, RHS); in expandSADDSUBO() local
9270 SDValue SetCC = DAG.getSetCC(dl, OType, Result, Sat, ISD::SETNE); in expandSADDSUBO()
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