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Searched refs:SUnit (Results 1 – 25 of 75) sorted by relevance

123

/llvm-project-15.0.7/llvm/include/llvm/CodeGen/
H A DScheduleDAG.h41 class SUnit; variable
242 class SUnit {
329 SUnit() in SUnit() function
617 SUnit *Node;
696 SUnit *ExitSU;
702 SmallVector<std::pair<SUnit *, SUnit *>, 16> Updates;
747 bool IsReachable(const SUnit *SU, const SUnit *TargetSU);
750 bool WillCreateCycle(SUnit *TargetSU, SUnit *SU);
754 void AddPred(SUnit *Y, SUnit *X);
758 void AddPredQueued(SUnit *Y, SUnit *X);
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H A DResourcePriorityQueue.h34 bool operator()(const SUnit* LHS, const SUnit* RHS) const;
39 std::vector<SUnit> *SUnits;
48 std::vector<SUnit*> Queue;
70 std::vector<SUnit*> Packet;
105 int SUSchedulingCost (SUnit *SU);
109 void initNumRegDefsLeft(SUnit *SU);
115 void push(SUnit *U) override;
117 SUnit *pop() override;
119 void remove(SUnit *SU) override;
124 void reserveResources(SUnit *SU);
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H A DScheduleDAGInstrs.h55 SUnit *SU;
77 SUnit *SU;
158 DenseMap<MachineInstr*, SUnit*> MISUnitMap;
182 SUnit *BarrierChain = nullptr;
190 using SUList = std::list<SUnit *>;
206 void addChainDependency(SUnit *SUa, SUnit *SUb,
211 for (SUnit *Entry : SUs) in addChainDependencies()
272 bool IsReachable(SUnit *SU, SUnit *TargetSU) { in IsReachable()
283 SUnit *newSUnit(MachineInstr *MI);
286 SUnit *getSUnit(MachineInstr *MI) const;
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H A DMachinePipeliner.h143 SetVector<SUnit *> NodeOrder;
162 std::vector<SUnit> &SUnits;
163 SetVector<SUnit *> Stack;
259 unsigned getDistance(SUnit *U, SUnit *V, const SDep &Dep) { in getDistance()
273 unsigned getInstrBaseReg(SUnit *SU) { in getInstrBaseReg()
321 SetVector<SUnit *> Nodes;
327 SUnit *ExceedPressure = nullptr;
336 for (const SUnit *Node : Nodes) { in NodeSet()
386 for (SUnit *SU : *this) { in computeNodeSetInfo()
503 std::map<SUnit *, int> InstrToCycle;
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H A DLatencyPriorityQueue.h29 bool operator()(const SUnit* LHS, const SUnit* RHS) const;
34 std::vector<SUnit> *SUnits;
43 std::vector<SUnit*> Queue;
57 void addNode(const SUnit *SU) override { in addNode()
61 void updateNode(const SUnit *SU) override { in updateNode()
80 void push(SUnit *U) override;
82 SUnit *pop() override;
84 void remove(SUnit *SU) override;
94 void scheduledNode(SUnit *SU) override;
97 void AdjustPriorityOfUnscheduledPreds(SUnit *SU);
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H A DVLIWMachineScheduler.h27 class SUnit; variable
44 SmallVector<SUnit *> Packet;
56 virtual bool hasDependence(const SUnit *SUd, const SUnit *SUu);
94 SUnit *SU = nullptr;
185 bool checkHazard(SUnit *SU);
191 void bumpNode(SUnit *SU);
195 void removeReady(SUnit *SU);
197 SUnit *pickOnlyChoice();
199 bool isLatencyBound(SUnit *SU) { in isLatencyBound()
226 SUnit *pickNode(bool &IsTopNode) override;
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H A DMachineScheduler.h367 void initQueues(ArrayRef<SUnit*> TopRoots, ArrayRef<SUnit*> BotRoots);
504 void initQueues(ArrayRef<SUnit*> TopRoots, ArrayRef<SUnit*> BotRoots);
518 void collectVRegUses(SUnit &SU);
537 std::vector<SUnit*> Queue;
565 void push(SUnit *SU) { in push()
770 bool checkHazard(SUnit *SU);
794 void bumpNode(SUnit *SU);
798 void removeReady(SUnit *SU);
803 SUnit *pickOnlyChoice();
867 SUnit *SU;
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/llvm-project-15.0.7/llvm/lib/CodeGen/
H A DScheduleDAG.cpp66 EntrySU = SUnit(); in clearDAG()
67 ExitSU = SUnit(); in clearDAG()
393 for (const SUnit &SUnit : SUnits) { in VerifyScheduledDAG() local
395 if (SUnit.NumPreds == 0 && SUnit.NumSuccs == 0) { in VerifyScheduledDAG()
401 dumpNode(SUnit); in VerifyScheduledDAG()
406 (isBottomUp ? SUnit.getHeight() : SUnit.getDepth()) > in VerifyScheduledDAG()
410 dumpNode(SUnit); in VerifyScheduledDAG()
536 void ScheduleDAGTopologicalSort::AddPredQueued(SUnit *Y, SUnit *X) { in AddPredQueued()
548 void ScheduleDAGTopologicalSort::AddPred(SUnit *Y, SUnit *X) { in AddPred()
566 void ScheduleDAGTopologicalSort::RemovePred(SUnit *M, SUnit *N) { in RemovePred()
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H A DLatencyPriorityQueue.cpp23 bool latency_sort::operator()(const SUnit *LHS, const SUnit *RHS) const { in operator ()()
56 SUnit *LatencyPriorityQueue::getSingleUnscheduledPred(SUnit *SU) { in getSingleUnscheduledPred()
57 SUnit *OnlyAvailablePred = nullptr; in getSingleUnscheduledPred()
59 SUnit &Pred = *P.getSUnit(); in getSingleUnscheduledPred()
72 void LatencyPriorityQueue::push(SUnit *SU) { in push()
89 void LatencyPriorityQueue::scheduledNode(SUnit *SU) { in scheduledNode()
115 SUnit *LatencyPriorityQueue::pop() { in pop()
122 SUnit *V = *Best; in pop()
129 void LatencyPriorityQueue::remove(SUnit *SU) { in remove()
131 std::vector<SUnit *>::iterator I = find(Queue, SU); in remove()
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H A DMacroFusion.cpp38 static SUnit *getPredClusterSU(const SUnit &SU) { in getPredClusterSU()
46 bool llvm::hasLessThanNumFused(const SUnit &SU, unsigned FuseLimit) { in hasLessThanNumFused()
48 const SUnit *CurrentSU = &SU; in hasLessThanNumFused()
53 bool llvm::fuseInstructionPair(ScheduleDAGInstrs &DAG, SUnit &FirstSU, in fuseInstructionPair()
54 SUnit &SecondSU) { in fuseInstructionPair()
100 SUnit *SU = SI.getSUnit(); in fuseInstructionPair()
113 SUnit *SU = SI.getSUnit(); in fuseInstructionPair()
124 for (SUnit &SU : DAG.SUnits) { in fuseInstructionPair()
142 bool scheduleAdjacentImpl(ScheduleDAGInstrs &DAG, SUnit &AnchorSU);
157 for (SUnit &ISU : DAG->SUnits) in apply()
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H A DMachinePipeliner.cpp686 static bool isSuccOrder(SUnit *SUa, SUnit *SUb) { in isSuccOrder()
1315 SUnit *W = *SI; in unblock()
1566 static bool computePath(SUnit *Cur, SetVector<SUnit *> &Path, in computePath()
1616 for (SUnit *SU : NS) in computeLiveOuts()
1649 llvm::sort(SUnits, [](const SUnit *A, const SUnit *B) { in registerPressureFilter()
1762 for (SUnit *I : N) in groupRemainingNodes()
1771 for (SUnit *I : N) in groupRemainingNodes()
2027 SUnit *SU = *NI; in schedulePipeline()
2459 static SUnit *multipleIterations(SUnit *SU, SwingSchedulerDAG *DAG) { in multipleIterations()
2838 SUnit *Succ; in checkValidNodeOrder()
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/llvm-project-15.0.7/llvm/lib/Target/AMDGPU/
H A DR600MachineScheduler.h54 std::vector<SUnit *> AvailableAlus[AluLast];
55 std::vector<SUnit *> PhysicalRegCopy;
73 SUnit *pickNode(bool &IsTopNode) override;
75 void releaseTopNode(SUnit *SU) override;
76 void releaseBottomNode(SUnit *SU) override;
82 int getInstKind(SUnit *SU);
84 AluKind getAluKind(SUnit *SU) const;
89 SUnit *PopInst(std::vector<SUnit*> &Q, bool AnyALU);
92 SUnit* pickAlu();
93 SUnit* pickOther(int QID);
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H A DGCNILPSched.cpp23 SUnit *SU;
25 Candidate(SUnit *SU_) in Candidate()
42 const SUnit *pickBest(const SUnit *left, const SUnit *right);
50 std::vector<const SUnit*> schedule(ArrayRef<const SUnit*> TopRoots,
66 SUnit *PredSU = Pred.getSUnit(); in CalcNodeSethiUllmanNumber()
132 static int BUCompareLatency(const SUnit *left, const SUnit *right) { in BUCompareLatency()
162 const SUnit *GCNILPScheduler::pickBest(const SUnit *left, const SUnit *right) in pickBest()
289 std::vector<const SUnit*>
299 for (const SUnit &SU : SUnits) in schedule()
303 for (const SUnit &SU : SUnits) in schedule()
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H A DAMDGPUExportClustering.cpp29 static bool isExport(const SUnit &SU) { in isExport()
48 SmallVector<SUnit *, 8> Copy(Chain); in sortChain()
51 for (SUnit *SU : Copy) { in sortChain()
60 SUnit *ChainHead = Exports.front(); in buildCluster()
64 SUnit *SUa = Exports[Idx]; in buildCluster()
65 SUnit *SUb = Exports[Idx + 1]; in buildCluster()
70 SUnit *PredSU = Pred.getSUnit(); in buildCluster()
86 SUnit *PredSU = Pred.getSUnit(); in removeExportDependencies()
95 SUnit *ExportPredSU = ExportPred.getSUnit(); in removeExportDependencies()
111 SmallVector<SUnit *, 8> Chain; in apply()
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H A DGCNMinRegStrategy.cpp25 const SUnit *SU;
28 Candidate(const SUnit *SU_, int Priority_ = 0) in Candidate()
38 bool isScheduled(const SUnit *SU) const { in isScheduled()
43 void setIsScheduled(const SUnit *SU) { in setIsScheduled()
48 unsigned getNumPreds(const SUnit *SU) const { in getNumPreds()
54 unsigned decNumPreds(const SUnit *SU) { in decNumPreds()
74 std::vector<const SUnit*> schedule(ArrayRef<const SUnit*> TopRoots,
178 SmallPtrSet<const SUnit*, 32> Set; in bumpPredsPriority()
224 std::vector<const SUnit*>
228 std::vector<const SUnit*> Schedule; in schedule()
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H A DR600MachineScheduler.cpp53 SUnit *SU = nullptr; in pickNode()
127 for (const SUnit &S : DAG->SUnits) in pickNode()
310 SUnit *R600SchedStrategy::PopInst(std::vector<SUnit *> &Q, bool AnyALU) { in PopInst()
315 SUnit *SU = *It; in PopInst()
330 std::vector<SUnit *> &QSrc = Pending[IDAlu]; in LoadAlu()
331 for (SUnit *SU : QSrc) { in LoadAlu()
399 SUnit* R600SchedStrategy::pickAlu() { in pickAlu()
424 SUnit *SU = AttemptFillSlot(3, true); in pickAlu()
446 SUnit* R600SchedStrategy::pickOther(int QID) { in pickOther()
447 SUnit *SU = nullptr; in pickOther()
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H A DAMDGPUIGroupLP.cpp79 SmallVector<SUnit *, 32> Collection;
83 void tryAddEdge(SUnit *A, SUnit *B) { in tryAddEdge()
96 void link(SUnit &SU, bool MakePred = false) { in link()
98 SUnit *B = &SU; in link()
109 void link(SUnit &SU, function_ref<bool(const SUnit *A, const SUnit *B)> P) { in link()
111 SUnit *B = &SU; in link()
243 void addSchedBarrierEdges(SUnit &SU);
249 void resetSchedBarrierEdges(SUnit &SU);
277 for (SUnit &SU : DAG->SUnits) { in apply()
319 SchedBarrier, (function_ref<bool(const SUnit *A, const SUnit *B)>)[]( in addSchedBarrierEdges()
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/llvm-project-15.0.7/llvm/lib/CodeGen/SelectionDAG/
H A DScheduleDAGRRList.cpp186 DenseMap<SUnit*, SUnit*> CallSeqEndForStart;
218 bool WillCreateCycle(SUnit *SU, SUnit *TargetSU) { in WillCreateCycle()
262 void BacktrackBottomUp(SUnit*, SUnit*);
263 SUnit *TryUnfoldSU(SUnit *);
264 SUnit *CopyAndMoveSuccessors(SUnit*);
287 SUnit *CreateClone(SUnit *N) { in CreateClone()
980 SUnit *ScheduleDAGRRList::TryUnfoldSU(SUnit *SU) { in TryUnfoldSU()
1688 bool operator()(SUnit* left, SUnit* right) const;
1702 bool operator()(SUnit* left, SUnit* right) const;
1718 bool operator()(SUnit* left, SUnit* right) const;
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H A DScheduleDAGFast.cpp47 SmallVector<SUnit *, 16> Queue;
51 void push(SUnit *U) { in push()
55 SUnit *pop() { in pop()
73 std::vector<SUnit*> LiveRegDefs;
98 SUnit *CopyAndMoveSuccessors(SUnit*);
206 SUnit *ScheduleDAGFast::CopyAndMoveSuccessors(SUnit *SU) { in CopyAndMoveSuccessors()
214 SUnit *NewSU; in CopyAndMoveSuccessors()
246 SUnit *NewSU = newSUnit(N); in CopyAndMoveSuccessors()
264 SUnit *LoadSU; in CopyAndMoveSuccessors()
557 SmallVector<SUnit*, 4> NotReady; in ListScheduleBottomUp()
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H A DScheduleDAGSDNodes.h53 std::vector<SUnit*> Sequence;
86 SUnit *newSUnit(SDNode *N);
91 SUnit *Clone(SUnit *Old);
101 void InitNumRegDefsLeft(SUnit *SU);
105 virtual void computeLatency(SUnit *SU);
125 void dumpNode(const SUnit &SU) const override;
129 std::string getGraphNodeLabel(const SUnit *SU) const override;
146 RegDefIter(const SUnit *SU, const ScheduleDAGSDNodes *SD);
187 void EmitPhysRegCopy(SUnit *SU, DenseMap<SUnit*, Register> &VRBaseMap,
H A DResourcePriorityQueue.cpp73 SUnit *PredSU = Pred.getSUnit(); in numberRCValPredInSU()
111 SUnit *SuccSU = Succ.getSUnit(); in numberRCValSuccInSU()
167 for (SUnit &SU : *SUnits) { in initNodes()
175 bool resource_sort::operator()(const SUnit *LHS, const SUnit *RHS) const { in operator ()()
209 SUnit *ResourcePriorityQueue::getSingleUnscheduledPred(SUnit *SU) { in getSingleUnscheduledPred()
210 SUnit *OnlyAvailablePred = nullptr; in getSingleUnscheduledPred()
212 SUnit &PredSU = *Pred.getSUnit(); in getSingleUnscheduledPred()
224 void ResourcePriorityQueue::push(SUnit *SU) { in push()
266 for (const SUnit *S : Packet) in isResourceAvailable()
585 SUnit *ResourcePriorityQueue::pop() { in pop()
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H A DScheduleDAGVLIW.cpp57 std::vector<SUnit*> PendingQueue;
81 void releaseSucc(SUnit *SU, const SDep &D);
82 void releaseSuccessors(SUnit *SU);
83 void scheduleNodeTopDown(SUnit *SU, unsigned CurCycle);
109 void ScheduleDAGVLIW::releaseSucc(SUnit *SU, const SDep &D) { in releaseSucc()
110 SUnit *SuccSU = D.getSUnit(); in releaseSucc()
133 void ScheduleDAGVLIW::releaseSuccessors(SUnit *SU) { in releaseSuccessors()
168 for (SUnit &SU : SUnits) { in listScheduleTopDown()
178 std::vector<SUnit*> NotReady; in listScheduleTopDown()
205 SUnit *FoundSUnit = nullptr; in listScheduleTopDown()
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/llvm-project-15.0.7/llvm/lib/Target/SystemZ/
H A DSystemZHazardRecognizer.h72 inline unsigned getNumDecoderSlots(SUnit *SU) const;
75 bool fitsIntoCurrentGroup(SUnit *SU) const;
85 unsigned getCurrCycleIdx(SUnit *SU = nullptr) const;
104 bool isFPdOpPreferred_distance(SUnit *SU) const;
116 HazardType getHazardType(SUnit *SU, int Stalls = 0) override;
118 void EmitInstruction(SUnit *SU) override;
121 const MCSchedClassDesc *getSchedClass(SUnit *SU) const { in getSchedClass()
137 int groupingCost(SUnit *SU) const;
142 int resourcesCost(SUnit *SU);
147 void dumpSU(SUnit *SU, raw_ostream &OS) const;
H A DSystemZMachineScheduler.h42 SUnit *SU = nullptr;
51 Candidate(SUnit *SU_, SystemZHazardRecognizer &HazardRec);
74 bool operator() (SUnit *lhs, SUnit *rhs) const { in operator()
89 struct SUSet : std::set<SUnit*, SUSorter> {
139 SUnit *pickNode(bool &IsTopNode) override;
143 void schedNode(SUnit *SU, bool IsTopNode) override;
147 void releaseTopNode(SUnit *SU) override;
150 void releaseBottomNode(SUnit *SU) override {}; in releaseBottomNode()
/llvm-project-15.0.7/llvm/lib/Target/PowerPC/
H A DPPCHazardRecognizers.h27 SmallVector<SUnit *, 7> CurGroup;
30 bool isLoadAfterStore(SUnit *SU);
31 bool isBCTRAfterSet(SUnit *SU);
39 HazardType getHazardType(SUnit *SU, int Stalls) override;
40 bool ShouldPreferAnother(SUnit* SU) override;
41 unsigned PreEmitNoops(SUnit *SU) override;
42 void EmitInstruction(SUnit *SU) override;
78 HazardType getHazardType(SUnit *SU, int Stalls) override;
79 void EmitInstruction(SUnit *SU) override;

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