Home
last modified time | relevance | path

Searched refs:STRICT_LLROUND (Results 1 – 10 of 10) sorted by relevance

/llvm-project-15.0.7/llvm/include/llvm/CodeGen/
H A DISDOpcodes.h431 STRICT_LLROUND, enumerator
/llvm-project-15.0.7/llvm/lib/CodeGen/SelectionDAG/
H A DSelectionDAGDumper.cpp373 case ISD::STRICT_LLROUND: return "strict_llround"; in getOperationName()
H A DLegalizeDAG.cpp1018 case ISD::STRICT_LLROUND: in LegalizeOp()
3892 case ISD::STRICT_LLROUND: in ExpandNode()
4163 case ISD::STRICT_LLROUND: in ConvertNodeToLibcall()
H A DSelectionDAGISel.cpp1135 case ISD::STRICT_LLROUND: in DoInstructionSelection()
H A DLegalizeIntegerTypes.cpp2430 case ISD::STRICT_LLROUND: in ExpandIntegerResult()
3464 N->getOpcode() == ISD::STRICT_LLROUND) { in ExpandIntRes_LLROUND_LLRINT()
H A DLegalizeFloatTypes.cpp849 case ISD::STRICT_LLROUND: in SoftenFloatOperand()
/llvm-project-15.0.7/llvm/lib/Target/PowerPC/
H A DPPCTargetTransformInfo.cpp550 Opcode = ISD::STRICT_LLROUND; in mightUseCTR()
/llvm-project-15.0.7/llvm/include/llvm/Target/
H A DTargetSelectionDAG.td559 def strict_llround : SDNode<"ISD::STRICT_LLROUND",
/llvm-project-15.0.7/llvm/lib/Target/AArch64/
H A DAArch64ISelLowering.cpp622 for (auto Op : {ISD::STRICT_LROUND, ISD::STRICT_LLROUND, ISD::STRICT_LRINT, in AArch64TargetLowering()
687 ISD::STRICT_LLROUND, ISD::STRICT_LRINT, ISD::STRICT_LLRINT}) { in AArch64TargetLowering()
5614 case ISD::STRICT_LLROUND: in LowerOperation()
/llvm-project-15.0.7/llvm/lib/Target/RISCV/
H A DRISCVISelLowering.cpp306 ISD::STRICT_LLROUND, ISD::STRICT_FMA, ISD::STRICT_FADD, in RISCVTargetLowering()