Home
last modified time | relevance | path

Searched refs:SPReg (Results 1 – 25 of 30) sorted by relevance

12

/llvm-project-15.0.7/llvm/lib/Target/CSKY/
H A DCSKYFrameLowering.cpp89 Register SPReg = CSKY::R14; in emitPrologue() local
117 adjustReg(MBB, MBBI, DL, SPReg, SPReg, -(static_cast<int64_t>(ActualSize)), in emitPrologue()
152 .addReg(SPReg) in emitPrologue()
162 adjustReg(MBB, MBBI, DL, SPReg, SPReg, in emitPrologue()
174 .addReg(SPReg) in emitPrologue()
183 .addReg(SPReg) in emitPrologue()
212 adjustReg(MBB, MBBI, DL, SPReg, SPReg, in emitPrologue()
229 Register SPReg = CSKY::R14; in emitEpilogue() local
266 adjustReg(MBB, LastFrameDestroy, DL, SPReg, SPReg, (StackSize - ActualSize), in emitEpilogue()
270 adjustReg(MBB, MBBI, DL, SPReg, SPReg, ActualSize, in emitEpilogue()
[all …]
/llvm-project-15.0.7/llvm/lib/Target/LoongArch/
H A DLoongArchFrameLowering.cpp94 Register SPReg = LoongArch::R3; in emitPrologue() local
112 adjustReg(MBB, MBBI, DL, SPReg, SPReg, -StackSize, MachineInstr::FrameSetup); in emitPrologue()
141 adjustReg(MBB, MBBI, DL, FPReg, SPReg, StackSize, MachineInstr::FrameSetup); in emitPrologue()
156 Register SPReg = LoongArch::R3; in emitEpilogue() local
173 adjustReg(MBB, LastFrameDestroy, DL, SPReg, LoongArch::R22, -StackSize, in emitEpilogue()
178 adjustReg(MBB, MBBI, DL, SPReg, SPReg, StackSize, MachineInstr::FrameDestroy); in emitEpilogue()
/llvm-project-15.0.7/llvm/lib/Target/WebAssembly/
H A DWebAssemblyFrameLowering.cpp277 unsigned SPReg = getSPReg(MF); in emitPrologue() local
279 SPReg = MRI.createVirtualRegister(PtrRC); in emitPrologue()
283 BuildMI(MBB, InsertPt, DL, TII->get(getOpcGlobGet(MF)), SPReg) in emitPrologue()
292 .addReg(SPReg); in emitPrologue()
300 .addReg(SPReg) in emitPrologue()
340 unsigned SPReg = 0; in emitEpilogue() local
344 SPReg = FI->getBasePointerVreg(); in emitEpilogue()
354 SPReg = MRI.createVirtualRegister(PtrRC); in emitEpilogue()
355 BuildMI(MBB, InsertPt, DL, TII->get(getOpcAdd(MF)), SPReg) in emitEpilogue()
359 SPReg = SPFPReg; in emitEpilogue()
[all …]
/llvm-project-15.0.7/llvm/lib/Target/PowerPC/
H A DPPCFrameLowering.cpp810 .addReg(SPReg); in emitPrologue()
824 .addReg(SPReg); in emitPrologue()
829 .addReg(SPReg); in emitPrologue()
872 .addReg(SPReg); in emitPrologue()
885 .addReg(SPReg) in emitPrologue()
886 .addReg(SPReg); in emitPrologue()
969 .addReg(SPReg); in emitPrologue()
1145 .addReg(SPReg) in emitPrologue()
1146 .addReg(SPReg); in emitPrologue()
1394 BuildMI(&MBB, DL, CopyInst, TempReg).addReg(SPReg).addReg(SPReg); in inlineStackProbe()
[all …]
H A DPPCISelLowering.cpp12079 Register SPReg = isPPC64 ? PPC::X1 : PPC::R1; in emitProbedAlloca() local
12107 .addReg(SPReg) in emitProbedAlloca()
12140 BuildMI(*MBB, {MI}, DL, TII->get(isPPC64 ? PPC::STDUX : PPC::STWUX), SPReg) in emitProbedAlloca()
12142 .addReg(SPReg) in emitProbedAlloca()
12150 .addReg(SPReg) in emitProbedAlloca()
12163 BuildMI(BlockMBB, DL, TII->get(isPPC64 ? PPC::STDUX : PPC::STWUX), SPReg) in emitProbedAlloca()
12165 .addReg(SPReg) in emitProbedAlloca()
12181 .addReg(SPReg) in emitProbedAlloca()
/llvm-project-15.0.7/llvm/lib/Target/RISCV/
H A DRISCVFrameLowering.cpp376 Register SPReg = getSPReg(STI); in adjustStackForRVV() local
387 .addReg(SPReg) in adjustStackForRVV()
473 adjustReg(MBB, MBBI, DL, SPReg, SPReg, -StackSize, MachineInstr::FrameSetup); in emitPrologue()
536 adjustReg(MBB, MBBI, DL, SPReg, SPReg, -SecondSPAdjustAmount, in emitPrologue()
564 .addReg(SPReg) in emitPrologue()
572 .addReg(SPReg) in emitPrologue()
586 .addReg(SPReg) in emitPrologue()
667 adjustReg(MBB, LastFrameDestroy, DL, SPReg, SPReg, SecondSPAdjustAmount, in emitEpilogue()
675 adjustReg(MBB, MBBI, DL, SPReg, SPReg, StackSize, MachineInstr::FrameDestroy); in emitEpilogue()
1086 Register SPReg = RISCV::X2; in eliminateCallFramePseudoInstr() local
[all …]
/llvm-project-15.0.7/llvm/lib/Target/Mips/MCTargetDesc/
H A DMipsNaClELFStreamer.cpp136 unsigned SPReg = MI.getOperand(0).getReg(); in sandboxLoadStoreStackChange() local
137 assert((Mips::SP == SPReg) && "Unexpected stack-pointer register."); in sandboxLoadStoreStackChange()
138 emitMask(SPReg, LoadStoreStackMaskReg, STI); in sandboxLoadStoreStackChange()
/llvm-project-15.0.7/llvm/lib/Target/X86/
H A DX86IndirectThunks.cpp246 const Register SPReg = Is64Bit ? X86::RSP : X86::ESP; in populateThunk() local
247 addRegOffset(BuildMI(CallTarget, DebugLoc(), TII->get(MovOpc)), SPReg, false, in populateThunk()
H A DX86FrameLowering.h114 Register &SPReg) const;
116 Register &SPReg, int Adjustment) const;
H A DX86CallLowering.cpp96 auto SPReg = in getStackAddress() local
101 auto AddrReg = MIRBuilder.buildPtrAdd(p0, SPReg, OffsetReg); in getStackAddress()
H A DX86FrameLowering.cpp2120 Register SPReg; in getPSPSlotOffsetFromSP() local
2121 int Offset = getFrameIndexReferencePreferSP(MF, Info.PSPSymFrameIdx, SPReg, in getPSPSlotOffsetFromSP()
2124 assert(Offset >= 0 && SPReg == TRI->getStackRegister()); in getPSPSlotOffsetFromSP()
3274 unsigned ScratchReg, SPReg, PReg, SPLimitOffset; in adjustForHiPEPrologue() local
3278 SPReg = X86::RSP; in adjustForHiPEPrologue()
3284 SPReg = X86::ESP; in adjustForHiPEPrologue()
3297 SPReg, false, -MaxStack); in adjustForHiPEPrologue()
3307 SPReg, false, -MaxStack); in adjustForHiPEPrologue()
/llvm-project-15.0.7/bolt/lib/Passes/
H A DInliner.cpp167 const MCPhysReg SPReg = BC.MIB->getStackPointer(); in getInliningInfo() local
187 DirectSP |= BC.MIB->hasDefOfPhysReg(Inst, SPReg) || in getInliningInfo()
188 BC.MIB->hasUseOfPhysReg(Inst, SPReg); in getInliningInfo()
/llvm-project-15.0.7/llvm/lib/Target/M68k/GISel/
H A DM68kCallLowering.cpp61 auto SPReg = MIRBuilder.buildCopy(p0, StackReg).getReg(0); in getStackAddress() local
63 auto AddrReg = MIRBuilder.buildPtrAdd(p0, SPReg, OffsetReg); in getStackAddress()
/llvm-project-15.0.7/llvm/lib/Target/AMDGPU/
H A DSIFrameLowering.cpp497 Register SPReg = MFI->getStackPtrOffsetReg(); in emitEntryFunctionPrologue() local
498 assert(SPReg != AMDGPU::SP_REG); in emitEntryFunctionPrologue()
499 BuildMI(MBB, I, DL, TII->get(AMDGPU::S_MOV_B32), SPReg) in emitEntryFunctionPrologue()
1431 Register SPReg = MFI->getStackPtrOffsetReg(); in eliminateCallFramePseudoInstr() local
1436 auto Add = BuildMI(MBB, I, DL, TII->get(AMDGPU::S_ADD_I32), SPReg) in eliminateCallFramePseudoInstr()
1437 .addReg(SPReg) in eliminateCallFramePseudoInstr()
H A DAMDGPUCallLowering.cpp169 Register SPReg; member
196 if (!SPReg) { in getStackAddress()
200 SPReg = MIRBuilder.buildCopy(PtrTy, in getStackAddress()
206 SPReg = MIRBuilder.buildInstr(AMDGPU::G_AMDGPU_WAVE_ADDRESS, {PtrTy}, in getStackAddress()
213 auto AddrReg = MIRBuilder.buildPtrAdd(PtrTy, SPReg, OffsetReg); in getStackAddress()
/llvm-project-15.0.7/llvm/lib/Target/AArch64/GISel/
H A DAArch64CallLowering.cpp263 if (!SPReg) in getStackAddress()
264 SPReg = MIRBuilder.buildCopy(p0, Register(AArch64::SP)).getReg(0); in getStackAddress()
268 auto AddrReg = MIRBuilder.buildPtrAdd(p0, SPReg, OffsetReg); in getStackAddress()
337 Register SPReg; member
/llvm-project-15.0.7/llvm/lib/Target/ARM/
H A DARMCallLowering.cpp102 auto SPReg = MIRBuilder.buildCopy(p0, Register(ARM::SP)); in getStackAddress() local
106 auto AddrReg = MIRBuilder.buildPtrAdd(p0, SPReg, OffsetReg); in getStackAddress()
/llvm-project-15.0.7/llvm/lib/Target/Mips/
H A DMipsCallLowering.cpp236 auto SPReg = MIRBuilder.buildCopy(p0, Register(Mips::SP)); in getStackAddress() local
239 auto AddrReg = MIRBuilder.buildPtrAdd(p0, SPReg, OffsetReg); in getStackAddress()
/llvm-project-15.0.7/llvm/lib/Target/SystemZ/
H A DSystemZFrameLowering.cpp1295 unsigned SPReg = Regs.getStackPointerRegister(); in emitEpilogue() local
1296 if (ZFI->getRestoreGPRRegs().LowGPR != SPReg) { in emitEpilogue()
1298 emitIncrement(MBB, MBBI, DL, SPReg, StackSize, ZII); in emitEpilogue()
H A DSystemZISelLowering.cpp3686 Register SPReg = Regs.getStackPointerRegister(); in lowerDYNAMIC_STACKALLOC_XPLINK() local
3689 SDValue NewSPRegNode = DAG.getCopyFromReg(Chain, DL, SPReg, PtrVT, Glue); in lowerDYNAMIC_STACKALLOC_XPLINK()
3730 Register SPReg = getStackPointerRegisterToSaveRestore(); in lowerDYNAMIC_STACKALLOC_ELF() local
3734 SDValue OldSP = DAG.getCopyFromReg(Chain, DL, SPReg, MVT::i64); in lowerDYNAMIC_STACKALLOC_ELF()
3757 Chain = DAG.getCopyToReg(Chain, DL, SPReg, NewSP); in lowerDYNAMIC_STACKALLOC_ELF()
/llvm-project-15.0.7/llvm/lib/Target/Lanai/
H A DLanaiISelLowering.cpp1028 Register SPReg = getStackPointerRegisterToSaveRestore(); in LowerDYNAMIC_STACKALLOC() local
1031 SDValue StackPointer = DAG.getCopyFromReg(Chain, DL, SPReg, MVT::i32); in LowerDYNAMIC_STACKALLOC()
1051 SDValue CopyChain = DAG.getCopyToReg(Chain, DL, SPReg, Sub); in LowerDYNAMIC_STACKALLOC()
/llvm-project-15.0.7/llvm/lib/Target/M68k/
H A DM68kISelLowering.cpp3229 Register SPReg = TLI.getStackPointerRegisterToSaveRestore(); in LowerDYNAMIC_STACKALLOC() local
3230 assert(SPReg && "Target cannot require DYNAMIC_STACKALLOC expansion and" in LowerDYNAMIC_STACKALLOC()
3233 SDValue SP = DAG.getCopyFromReg(Chain, DL, SPReg, VT); in LowerDYNAMIC_STACKALLOC()
3241 Chain = DAG.getCopyToReg(Chain, DL, SPReg, Result); // Output chain in LowerDYNAMIC_STACKALLOC()
/llvm-project-15.0.7/llvm/lib/Target/ARM/AsmParser/
H A DARMAsmParser.cpp11647 int SPReg = tryParseRegister(); in parseDirectiveSetFP() local
11648 if (check(SPReg == -1, SPRegLoc, "stack pointer register expected") || in parseDirectiveSetFP()
11649 check(SPReg != ARM::SP && SPReg != UC.getFPReg(), SPRegLoc, in parseDirectiveSetFP()
11679 static_cast<unsigned>(SPReg), Offset); in parseDirectiveSetFP()
11964 int SPReg = tryParseRegister(); in parseDirectiveMovSP() local
11965 if (SPReg == -1) in parseDirectiveMovSP()
11967 if (SPReg == ARM::SP || SPReg == ARM::PC) in parseDirectiveMovSP()
11991 getTargetStreamer().emitMovSP(SPReg, Offset); in parseDirectiveMovSP()
11992 UC.saveFPReg(SPReg); in parseDirectiveMovSP()
/llvm-project-15.0.7/llvm/lib/Target/Sparc/
H A DSparcISelLowering.cpp2706 unsigned SPReg = SP::O6; in LowerDYNAMIC_STACKALLOC() local
2707 SDValue SP = DAG.getCopyFromReg(Chain, dl, SPReg, VT); in LowerDYNAMIC_STACKALLOC()
2709 Chain = DAG.getCopyToReg(SP.getValue(1), dl, SPReg, NewSP); // Output chain in LowerDYNAMIC_STACKALLOC()
/llvm-project-15.0.7/llvm/lib/CodeGen/SelectionDAG/
H A DLegalizeDAG.cpp1690 Register SPReg = TLI.getStackPointerRegisterToSaveRestore(); in ExpandDYNAMIC_STACKALLOC() local
1691 assert(SPReg && "Target cannot require DYNAMIC_STACKALLOC expansion and" in ExpandDYNAMIC_STACKALLOC()
1705 SDValue SP = DAG.getCopyFromReg(Chain, dl, SPReg, VT); in ExpandDYNAMIC_STACKALLOC()
1718 Chain = DAG.getCopyToReg(Chain, dl, SPReg, Tmp1); // Output chain in ExpandDYNAMIC_STACKALLOC()

12