648   Register SPReg       = isPPC64 ? PPC::X1  : PPC::R1;  in emitPrologue()  local
810         .addReg(SPReg);  in emitPrologue()
824         .addReg(SPReg);  in emitPrologue()
829         .addReg(SPReg);  in emitPrologue()
834         .addReg(SPReg);  in emitPrologue()
844         .addReg(SPReg);  in emitPrologue()
862           .addReg(SPReg);  in emitPrologue()
872       .addReg(SPReg);  in emitPrologue()
885       .addReg(SPReg)  in emitPrologue()
886       .addReg(SPReg);  in emitPrologue()
911           .addReg(SPReg);  in emitPrologue()
919             .addReg(SPReg)  in emitPrologue()
924             .addReg(SPReg)  in emitPrologue()
940       BuildMI(MBB, MBBI, dl, StoreUpdtIdxInst, SPReg)  in emitPrologue()
941           .addReg(SPReg, RegState::Kill)  in emitPrologue()
942           .addReg(SPReg)  in emitPrologue()
947       BuildMI(MBB, StackUpdateLoc, dl, StoreUpdtInst, SPReg)  in emitPrologue()
948           .addReg(SPReg)  in emitPrologue()
950           .addReg(SPReg);  in emitPrologue()
954       BuildMI(MBB, MBBI, dl, StoreUpdtIdxInst, SPReg)  in emitPrologue()
955           .addReg(SPReg, RegState::Kill)  in emitPrologue()
956           .addReg(SPReg)  in emitPrologue()
969       .addReg(SPReg);  in emitPrologue()
987         .addReg(SPReg);  in emitPrologue()
1067           .addReg(SPReg);  in emitPrologue()
1072           .addReg(SPReg);  in emitPrologue()
1077           .addReg(SPReg);  in emitPrologue()
1079           .addReg(SPReg)  in emitPrologue()
1145       .addReg(SPReg)  in emitPrologue()
1146       .addReg(SPReg);  in emitPrologue()
1246   Register SPReg = isPPC64 ? PPC::X1 : PPC::R1;  in inlineStackProbe()  local
1297       BuildMI(MBB, MBBI, DL, TII.get(isPPC64 ? PPC::STDU : PPC::STWU), SPReg)  in inlineStackProbe()
1300           .addReg(SPReg);  in inlineStackProbe()
1302       BuildMI(MBB, MBBI, DL, TII.get(isPPC64 ? PPC::STDUX : PPC::STWUX), SPReg)  in inlineStackProbe()
1304           .addReg(SPReg)  in inlineStackProbe()
1391           .addReg(SPReg)  in inlineStackProbe()
1394         BuildMI(&MBB, DL, CopyInst, TempReg).addReg(SPReg).addReg(SPReg);  in inlineStackProbe()
1437           .addReg(SPReg)  in inlineStackProbe()
1442           .addReg(SPReg)  in inlineStackProbe()
1449         .addReg(SPReg);  in inlineStackProbe()
1460     BuildMI(*CurrentMBB, {MI}, DL, CopyInst, FPReg).addReg(SPReg).addReg(SPReg);  in inlineStackProbe()
1482         buildDefCFAReg(*CurrentMBB, {MI}, SPReg);  in inlineStackProbe()
1516         buildDefCFAReg(*ExitMBB, ExitMBB->begin(), SPReg);  in inlineStackProbe()
1559   Register SPReg      = isPPC64 ? PPC::X1  : PPC::R1;  in emitEpilogue()  local
1659   unsigned RBReg = SPReg;  in emitEpilogue()
1726         BuildMI(MBB, StackUpdateLoc, dl, AddImmInst, SPReg)  in emitEpilogue()
1727           .addReg(SPReg)  in emitEpilogue()
1752         .addReg(SPReg);  in emitEpilogue()
1768       .addReg(SPReg);  in emitEpilogue()
1779   if (MustSaveLR && RBReg == SPReg && isInt<16>(LROffset+SPAdd)) {  in emitEpilogue()
1787     assert(RBReg == SPReg && "Should be using SP as a base register");  in emitEpilogue()
1796     if (HasRedZone || RBReg == SPReg)  in emitEpilogue()
1799         .addReg(SPReg);  in emitEpilogue()
1818   if (RBReg != SPReg || SPAdd != 0) {  in emitEpilogue()
1822       BuildMI(MBB, MBBI, dl, OrInst, SPReg)  in emitEpilogue()
1826       BuildMI(MBB, MBBI, dl, AddImmInst, SPReg)  in emitEpilogue()
1840         .addReg(SPReg);  in emitEpilogue()
1862           .addReg(SPReg);  in emitEpilogue()
1878         BuildMI(MBB, MBBI, dl, AddImmInst, SPReg)  in emitEpilogue()
1879           .addReg(SPReg).addImm(CallerAllocatedAmt);  in emitEpilogue()
1887           .addReg(SPReg)  in emitEpilogue()