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Searched refs:SETLE (Results 1 – 25 of 55) sorted by relevance

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/llvm-project-15.0.7/llvm/include/llvm/CodeGen/
H A DISDOpcodes.h1448 SETLE, // 1 X 1 0 1 True if less than or equal enumerator
1458 return Code == SETGT || Code == SETGE || Code == SETLT || Code == SETLE; in isSignedIntSetCC()
/llvm-project-15.0.7/llvm/lib/Target/VE/
H A DVEISelDAGToDAG.cpp40 case ISD::SETLE: in intCondCode2Icc()
74 case ISD::SETLE: in fpCondCode2Fcc()
/llvm-project-15.0.7/llvm/lib/CodeGen/
H A DAnalysis.cpp214 case ISD::SETOLE: case ISD::SETULE: return ISD::SETLE; in getFCmpCodeWithoutNaN()
225 case ICmpInst::ICMP_SLE: return ISD::SETLE; in getICmpCondCode()
244 case ISD::SETLE: in getICmpCondCode()
H A DTargetLoweringBase.cpp686 CCs[RTLIB::OLE_F32] = ISD::SETLE; in InitCmpLibcallCCs()
687 CCs[RTLIB::OLE_F64] = ISD::SETLE; in InitCmpLibcallCCs()
688 CCs[RTLIB::OLE_F128] = ISD::SETLE; in InitCmpLibcallCCs()
689 CCs[RTLIB::OLE_PPCF128] = ISD::SETLE; in InitCmpLibcallCCs()
/llvm-project-15.0.7/llvm/lib/Target/RISCV/
H A DRISCVInstrInfoZfh.td310 // FIXME: SETEQ/SETLT/SETLE imply nonans, can we pick better instructions for
318 def : PatSetCC<FPR16, strict_fsetcc, SETLE, PseudoQuietFLE_H>;
336 def : PatSetCC<FPR16, any_fsetccs, SETLE, FLE_H>;
H A DRISCVInstrInfoD.td308 // FIXME: SETEQ/SETLT/SETLE imply nonans, can we pick better instructions for
316 def : PatSetCC<FPR64, strict_fsetcc, SETLE, PseudoQuietFLE_D>;
334 def : PatSetCC<FPR64, any_fsetccs, SETLE, FLE_D>;
H A DRISCVInstrInfoF.td538 // FIXME: SETEQ/SETLT/SETLE imply nonans, can we pick better instructions for
546 def : PatSetCC<FPR32, strict_fsetcc, SETLE, PseudoQuietFLE_S>;
564 def : PatSetCC<FPR32, any_fsetccs, SETLE, FLE_S>;
H A DRISCVInstrInfoVSDPatterns.td692 defm : VPatIntegerSetCCSDNode_VV_Swappable<"PseudoVMSLE", SETLE, SETGE>;
699 defm : VPatIntegerSetCCSDNode_VX_Swappable<"PseudoVMSLE", SETLE, SETGE>;
707 defm : VPatIntegerSetCCSDNode_VI<"PseudoVMSLE", SETLE>;
963 defm : VPatFPSetCCSDNode_VV_VF_FV<SETLE, "PseudoVMFLE", "PseudoVMFGE">;
H A DRISCVInstrInfoVVLPatterns.td1068 defm : VPatIntegerSetCCVL_VV_Swappable<vti, "PseudoVMSLE", SETLE, SETGE>;
1075 defm : VPatIntegerSetCCVL_VX_Swappable<vti, "PseudoVMSLE", SETLE, SETGE>;
1083 defm : VPatIntegerSetCCVL_VI_Swappable<vti, "PseudoVMSLE", SETLE, SETGE>;
1092 defm : VPatIntegerSetCCVL_VIPlus1_Swappable<vti, "PseudoVMSGT", SETGE, SETLE,
1296 defm : VPatFPSetCCVL_VV_VF_FV<SETLE, "PseudoVMFLE", "PseudoVMFGE">;
/llvm-project-15.0.7/llvm/lib/Target/BPF/
H A DBPFISelLowering.cpp585 case ISD::SETLE: in NegateCC()
795 SET_NEWCC(SETLE, JSLE); in EmitInstrWithCustomInserter()
805 CC == ISD::SETLE); in EmitInstrWithCustomInserter()
H A DBPFInstrInfo.td97 [{return (N->getZExtValue() == ISD::SETLE);}]>;
117 [{return (N->getZExtValue() == ISD::SETLE);}]>;
/llvm-project-15.0.7/llvm/lib/Target/CSKY/
H A DCSKYInstrInfoF2.td369 defm : BRCond_Bin_SWAP_F2<SETLE, "f2FCMPHS", BT32, MVC32>;
422 def : Pat<(brcond (i32 (setcc FPR32Op:$rs1, fpimm0, SETLE)), bb:$imm16),
424 def : Pat<(i32 (setcc FPR32Op:$rs1, fpimm0, SETLE)),
426 def : Pat<(select (i32 (setcc FPR32Op:$rs1, fpimm0, SETLE)), FPR32Op:$rx, FPR32Op:$false),
H A DCSKYInstrInfoF1.td349 defm : BRCond_Bin_SWAP<SETLE, "FCMPHS", BT32, MVC32>;
394 def : Pat<(brcond (i32 (setcc sFPR32Op:$rs1, fpimm0, SETLE)), bb:$imm16),
396 def : Pat<(i32 (setcc sFPR32Op:$rs1, fpimm0, SETLE)),
/llvm-project-15.0.7/llvm/lib/Target/WebAssembly/
H A DWebAssemblyInstrInteger.td80 defm LE_S : ComparisonInt<SETLE, "le_s", 0x4c, 0x57>;
/llvm-project-15.0.7/llvm/lib/Target/AMDGPU/
H A DAMDGPUInstructions.td330 def COND_OLE : PatFrags<(ops), [(OtherVT SETOLE), (OtherVT SETLE)]>;
356 def COND_SLE : PatFrag<(ops), (OtherVT SETLE)>;
/llvm-project-15.0.7/llvm/lib/Target/X86/
H A DX86IntrinsicsInfo.h1239 X86_INTRINSIC_DATA(sse_comile_ss, COMI, X86ISD::COMI, ISD::SETLE),
1256 X86_INTRINSIC_DATA(sse_ucomile_ss, COMI, X86ISD::UCOMI, ISD::SETLE),
1264 X86_INTRINSIC_DATA(sse2_comile_sd, COMI, X86ISD::COMI, ISD::SETLE),
1311 X86_INTRINSIC_DATA(sse2_ucomile_sd, COMI, X86ISD::UCOMI, ISD::SETLE),
/llvm-project-15.0.7/llvm/lib/Target/MSP430/
H A DMSP430ISelLowering.cpp203 { RTLIB::OLE_F64, "__mspabi_cmpd", ISD::SETLE }, in MSP430TargetLowering()
209 { RTLIB::OLE_F32, "__mspabi_cmpf", ISD::SETLE }, in MSP430TargetLowering()
1093 case ISD::SETLE: in EmitCMP()
/llvm-project-15.0.7/llvm/lib/Target/PowerPC/
H A DPPCISelDAGToDAG.cpp3205 case ISD::SETLE: { in get32BitZExtCompare()
3389 case ISD::SETLE: { in get32BitSExtCompare()
3547 case ISD::SETLE: { in get64BitZExtCompare()
3706 case ISD::SETLE: { in get64BitSExtCompare()
4062 case ISD::SETLE: in SelectCC()
4089 case ISD::SETLE: in SelectCC()
4134 case ISD::SETLE: in getPredicateForSetCC()
4167 case ISD::SETLE: Invert = true; return 1; // !Bit #1 = SETULE in getCRIdxForSetCC()
4194 case ISD::SETLE: CC = ISD::SETGE; Swap = true; break; in getVCmpInst()
4240 case ISD::SETGE: CC = ISD::SETLE; Swap = true; break; in getVCmpInst()
[all …]
H A DPPCInstrInfo.td3339 def : Pat<(i1 (setcc i1:$s1, i1:$s2, SETLE)),
3482 defm : ExtSetCCPat<SETLE,
3514 defm : ExtSetCCPat<SETLE,
3650 defm : CRNotPat<(i1 (setcc i32:$s1, imm32SExt16:$imm, SETLE)),
3667 defm : CRNotPat<(i1 (setcc i32:$s1, i32:$s2, SETLE)),
3679 defm : CRNotPat<(i1 (setcc i64:$s1, imm64SExt16:$imm, SETLE)),
3696 defm : CRNotPat<(i1 (setcc i64:$s1, i64:$s2, SETLE)),
3709 defm : CRNotPat<(i1 (SetCC Ty:$s1, Ty:$s2, SETLE)),
3781 defm : CRNotPat<(i1 (any_fsetccs f32:$s1, f32:$s2, SETLE)),
3808 defm : CRNotPat<(i1 (any_fsetccs f64:$s1, f64:$s2, SETLE)),
[all …]
H A DPPCInstrSPE.td842 def : Pat<(f32 (selectcc i1:$lhs, i1:$rhs, f32:$tval, f32:$fval, SETLE)),
863 def : Pat<(f64 (selectcc i1:$lhs, i1:$rhs, f64:$tval, f64:$fval, SETLE)),
/llvm-project-15.0.7/llvm/lib/Target/Lanai/
H A DLanaiISelLowering.cpp835 case ISD::SETLE: in IntCondCCodeToICC()
1312 SDValue SetCC = DAG.getSetCC(dl, MVT::i32, NegatedPlus32, Zero, ISD::SETLE); in LowerSRL_PARTS()
/llvm-project-15.0.7/llvm/lib/CodeGen/SelectionDAG/
H A DSelectionDAGDumper.cpp466 case ISD::SETLE: return "setle"; in getOperationName()
/llvm-project-15.0.7/llvm/lib/Target/ARC/
H A DARCISelLowering.cpp62 case ISD::SETLE: in ISDCCtoARCCC()
/llvm-project-15.0.7/llvm/lib/Target/Mips/
H A DMipsMSAInstrInfo.td120 def vfsetle_v4f32 : vfsetcc_type<v4i32, v4f32, SETLE>;
121 def vfsetle_v2f64 : vfsetcc_type<v2i64, v2f64, SETLE>;
166 def vsetle_v16i8 : vsetcc_type<v16i8, SETLE>;
167 def vsetle_v8i16 : vsetcc_type<v8i16, SETLE>;
168 def vsetle_v4i32 : vsetcc_type<v4i32, SETLE>;
169 def vsetle_v2i64 : vsetcc_type<v2i64, SETLE>;
/llvm-project-15.0.7/llvm/lib/Target/Hexagon/
H A DHexagonISelLoweringHVX.cpp229 setCondCodeAction(ISD::SETLE, T, Expand); in initializeHVXLowering()
297 setCondCodeAction(ISD::SETLE, MVT::v64f16, Expand); in initializeHVXLowering()
310 setCondCodeAction(ISD::SETLE, MVT::v32f32, Expand); in initializeHVXLowering()

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