[WebAssembly] Optimize out shift masks

WebAssembly's shift instructions implicitly masks the shift count, so optimize
out redundant explicit masks of the shift count. For vector shifts, this
current

[WebAssembly] Optimize out shift masks

WebAssembly's shift instructions implicitly masks the shift count, so optimize
out redundant explicit masks of the shift count. For vector shifts, this
currently only works if the mask is applied before splatting the shift count,
but this should be addressed in a future commit. Resolves PR49655.

Differential Revision: https://reviews.llvm.org/D105600

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[WebAssembly] Fix select of and (PR40805)

Fixes https://bugs.llvm.org/show_bug.cgi?id=40805 introduced by
patterns added in D53676.

I'm removing the patterns entirely here, as they are not correct

[WebAssembly] Fix select of and (PR40805)

Fixes https://bugs.llvm.org/show_bug.cgi?id=40805 introduced by
patterns added in D53676.

I'm removing the patterns entirely here, as they are not correct
in the general case. If necessary something more specific can be
added in the future.

Differential Revision: https://reviews.llvm.org/D58575

llvm-svn: 354733

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Update the file headers across all of the LLVM projects in the monorepo
to reflect the new license.

We understand that people may be surprised that we're moving the header
entirely to discuss the ne

Update the file headers across all of the LLVM projects in the monorepo
to reflect the new license.

We understand that people may be surprised that we're moving the header
entirely to discuss the new license. We checked this carefully with the
Foundation's lawyer and we believe this is the correct approach.

Essentially, all code in the project is now made available by the LLVM
project under our new license, so you will see that the license headers
include that license only. Some of our contributors have contributed
code under our old license, and accordingly, we have retained a copy of
our old license notice in the top-level files in each project and
repository.

llvm-svn: 351636

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[WebAssembly] Lower away condition truncations for scalar selects

Reviewers: aheejin, dschuff

Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits

Differential Revision: https://reviews.ll

[WebAssembly] Lower away condition truncations for scalar selects

Reviewers: aheejin, dschuff

Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits

Differential Revision: https://reviews.llvm.org/D53676

llvm-svn: 345521

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[WebAssembly][NFC] Remove repetition of Defs = [ARGUMENTS] (fixed)

llvm-svn: 344287

[WebAssembly] Revert rL344180, which was breaking expensive checks

llvm-svn: 344280

[WebAssembly][NFC] Remove repetition of Defs = [ARGUMENTS]

Summary:
By moving that line into the `I` multiclass.

Reviewers: aheejin

Subscribers: dschuff, sbc100, jgravelle-google, sunfish, llvm-co

[WebAssembly][NFC] Remove repetition of Defs = [ARGUMENTS]

Summary:
By moving that line into the `I` multiclass.

Reviewers: aheejin

Subscribers: dschuff, sbc100, jgravelle-google, sunfish, llvm-commits

Differential Revision: https://reviews.llvm.org/D53093

llvm-svn: 344180

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[WebAssembly][NFC] Move specific instruction formats to specific files

Summary:
WebAssemblyInstrFormats.td retains only multiclasses that are used in
multiple other tablegen files.

Reviewers: aheej

[WebAssembly][NFC] Move specific instruction formats to specific files

Summary:
WebAssemblyInstrFormats.td retains only multiclasses that are used in
multiple other tablegen files.

Reviewers: aheejin, dschuff

Subscribers: sbc100, jgravelle-google, sunfish, jfb, llvm-commits

Differential Revision: https://reviews.llvm.org/D51143

llvm-svn: 340503

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[WebAssembly] Modified tablegen defs to have 2 parallel instuction sets.

Summary:
One for register based, much like the existing definitions,
and one for stack based (suffix _S).

This allows us to

[WebAssembly] Modified tablegen defs to have 2 parallel instuction sets.

Summary:
One for register based, much like the existing definitions,
and one for stack based (suffix _S).

This allows us to use registers in most of LLVM (which works better),
and stack based in MC (which results in a simpler and more readable
assembler / disassembler).

Tried to keep this change as small as possible while passing tests,
follow-up commit will:
- Add reg->stack conversion in MI.
- Fix asm/disasm in MC to be stack based.
- Fix emitter to be stack based.

tests passing:
llvm-lit -v `find test -name WebAssembly`

test/CodeGen/WebAssembly
test/MC/WebAssembly
test/MC/Disassembler/WebAssembly
test/DebugInfo/WebAssembly
test/CodeGen/MIR/WebAssembly
test/tools/llvm-objdump/WebAssembly

Reviewers: dschuff, sbc100, jgravelle-google, sunfish

Subscribers: aheejin, JDevlieghere, llvm-commits

Differential Revision: https://reviews.llvm.org/D48183

llvm-svn: 334985

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Remove \brief commands from doxygen comments.

We've been running doxygen with the autobrief option for a couple of
years now. This makes the \brief markers into our comments
redundant. Since they ar

Remove \brief commands from doxygen comments.

We've been running doxygen with the autobrief option for a couple of
years now. This makes the \brief markers into our comments
redundant. Since they are a visual distraction and we don't want to
encourage more \brief markers in new code either, this patch removes
them all.

Patch produced by

for i in $(git grep -l '\\brief'); do perl -pi -e 's/\\brief //g' $i & done

Differential Revision: https://reviews.llvm.org/D46290

llvm-svn: 331272

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[WebAssembly] Fix the opcode values for i64.eq and i64.ne.

llvm-svn: 291424

[WebAssembly] Fix the opcode value for i64.rotr.

llvm-svn: 290281

[WebAssembly] Implement more WebAssembly binary encoding.

This changes locals from being declared by the emitLocal hook in
WebAssemblyTargetStreamer, rather than with an instruction. After exploring

[WebAssembly] Implement more WebAssembly binary encoding.

This changes locals from being declared by the emitLocal hook in
WebAssemblyTargetStreamer, rather than with an instruction. After exploring
the infastructure in LLVM more, this seems to make more sense since
declaring locals doesn't use an encoded opcode.

This also adds more 0xd opcodes, type encodings, and miscellaneous
binary encoding bits.

llvm-svn: 285040

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[WebAssembly] Update opcode values according to recent spec changes.

This corresponds to the "0xd" opcode renumbering.

llvm-svn: 285014

[WebAssembly] Add binary-encoding opcode values to instruction descriptions.

llvm-svn: 283389

[WebAssembly] Set ctlz_zero_undef/cttz_zero_undef to Expand so LegalizeDAG will convert them to ctlz/cttz. Remove the now unneccessary isel patterns. NFC

llvm-svn: 267264

[WebAssembly] Implement the rotate instructions.

llvm-svn: 264076

[WebAssembly] Implement the eqz instructions.

llvm-svn: 263976

[WebAssembly] Update the select instructions' operand orders to match the spec.

llvm-svn: 259893

[WebAssembly] Set several MCInstrDesc flags.

llvm-svn: 254271

[WebAssembly] Fold setne and seteq comparisons into selects.

llvm-svn: 254104

[WebAssembly] Use a physical register to describe ARGUMENT liveness.

Instead of trying to move ARGUMENT instructions back up to the top after
they've been scheduled or sunk down, use a fake physical

[WebAssembly] Use a physical register to describe ARGUMENT liveness.

Instead of trying to move ARGUMENT instructions back up to the top after
they've been scheduled or sunk down, use a fake physical register to
create a liveness constraint that prevents ARGUMENT instructions from
moving down in the first place. This is still not entirely ideal, however
it is more robust than letting them move and moving them back.

llvm-svn: 254084

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[WebAssembly] Add some spaces to the assembly output to vertically align operands.

llvm-svn: 253468

[WebAssembly] Use tabs instead of spaces in assembly output.

This seems to be the most popular convention among the other backends.

llvm-svn: 253172

[WebAssembly] Fix copypasta.

Noticed by dschff in http://reviews.llvm.org/rL252203

llvm-svn: 252208