| /llvm-project-15.0.7/llvm/include/llvm/Support/ |
| H A D | ThreadPool.h | 119 template <typename ResTy> 120 static std::pair<std::function<void()>, std::future<ResTy>> 121 createTaskAndFuture(std::function<ResTy()> Task) { in createTaskAndFuture() 122 std::shared_ptr<std::promise<ResTy>> Promise = in createTaskAndFuture() 123 std::make_shared<std::promise<ResTy>>(); in createTaskAndFuture() 147 template <typename ResTy> 148 std::shared_future<ResTy> asyncImpl(std::function<ResTy()> Task, in asyncImpl()
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| /llvm-project-15.0.7/llvm/lib/Target/Hexagon/ |
| H A D | HexagonISelLoweringHVX.cpp | 1117 assert(ResTy.getSizeInBits() == 32 || ResTy.getSizeInBits() == 64); in extractHvxSubvectorReg() 1640 MVT ResTy = ty(Op); in LowerHvxAnyExt() local 1650 MVT ResTy = ty(Op); in LowerHvxSignExt() local 1660 MVT ResTy = ty(Op); in LowerHvxZeroExt() local 1673 MVT ResTy = ty(Op); in LowerHvxCttz() local 1700 MVT ResTy = ty(Op); in LowerHvxMulh() local 1767 MVT PairTy = typeJoin({ResTy, ResTy}); in LowerHvxMulh() 1789 MVT PairTy = typeJoin({ResTy, ResTy}); in LowerHvxMulh() 1821 MVT ResTy = ty(Op); in LowerHvxBitcast() local 1908 MVT ResTy = ty(Op); in LowerHvxSelect() local [all …]
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| H A D | HexagonISelLowering.h | 355 MVT ValTy, MVT ResTy, SelectionDAG &DAG) const; 363 SDValue appendUndef(SDValue Val, MVT ResTy, SelectionDAG &DAG) const; 380 SDValue getInt(unsigned IntId, MVT ResTy, ArrayRef<SDValue> Ops, 437 MVT ResTy, SelectionDAG &DAG) const; 439 MVT ResTy, SelectionDAG &DAG) const; 445 MVT ResTy, SelectionDAG &DAG) const; 447 MVT ResTy, SelectionDAG &DAG) const; 452 SDValue extendHvxVectorPred(SDValue VecV, const SDLoc &dl, MVT ResTy, 454 SDValue compressHvxPred(SDValue VecQ, const SDLoc &dl, MVT ResTy,
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| H A D | HexagonISelDAGToDAGHVX.cpp | 1644 MVT ElemTy = ResTy.getVectorElementType(); in scalarizeShuffle() 1733 MVT ResTy = getSingleVT(MVT::i8); in contracting() local 1806 Res.Ty = ResTy; in contracting() 1836 Res.Ty = ResTy; in contracting() 2211 MVT ResTy = getSingleVT(MVT::i8); in butterfly() local 2243 Results.push(Hexagon::V6_vrdelta, ResTy, in butterfly() 2272 MVT ResTy = N->getValueType(0).getSimpleVT(); in selectShuffle() local 2274 assert(ResTy.isVector() && ResTy.getVectorElementType() == MVT::i8); in selectShuffle() 2285 assert(ResTy.getSizeInBits() / 8 == VecLen); in selectShuffle() 2316 Results.push(TargetOpcode::COPY, ResTy, {Vec0}); in selectShuffle() [all …]
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| H A D | HexagonISelDAGToDAG.h | 124 SDValue selectUndef(const SDLoc &dl, MVT ResTy) { in selectUndef() argument 125 SDNode *U = CurDAG->getMachineNode(TargetOpcode::IMPLICIT_DEF, dl, ResTy); in selectUndef()
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| H A D | HexagonISelDAGToDAG.cpp | 771 MVT ResTy = N->getValueType(0).getSimpleVT(); in SelectVAlign() local 772 if (HST->isHVXVectorType(ResTy, true)) in SelectVAlign() 776 unsigned VecLen = ResTy.getSizeInBits(); in SelectVAlign() 841 MVT ResTy = N->getValueType(0).getSimpleVT(); in SelectP2D() local 849 MVT ResTy = N->getValueType(0).getSimpleVT(); in SelectD2P() local 851 SDNode *T = CurDAG->getMachineNode(Hexagon::A4_vcmpbgtui, dl, ResTy, in SelectD2P() 858 MVT ResTy = N->getValueType(0).getSimpleVT(); in SelectV2Q() local 865 SDNode *T = CurDAG->getMachineNode(Hexagon::V6_vandvrt, dl, ResTy, in SelectV2Q() 872 MVT ResTy = N->getValueType(0).getSimpleVT(); in SelectQ2V() local 874 assert(HST->getVectorLength() * 8 == ResTy.getSizeInBits()); in SelectQ2V() [all …]
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| H A D | HexagonISelLowering.cpp | 1034 MVT ResTy = ty(Op); in LowerSETCC() local 1042 return DAG.getSetCC(dl, ResTy, in LowerSETCC() 1048 if (ResTy.isVector()) in LowerSETCC() 1080 return DAG.getSetCC(dl, ResTy, in LowerSETCC() 2360 MVT ResTy = ty(Op); in LowerBITCAST() local 2363 assert(ResTy.getSizeInBits() == InpTy.getSizeInBits()); in LowerBITCAST() 2368 if (ResTy == MVT::v8i1) { in LowerBITCAST() 2619 return DAG.getNode(HexagonISD::D2P, dl, ResTy, T1); in extractVector() 2656 ExtV = DAG.getZExtOrTrunc(ExtV, dl, tyScalar(ResTy)); in extractVector() 2657 ExtV = DAG.getBitcast(ResTy, ExtV); in extractVector() [all …]
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| /llvm-project-15.0.7/llvm/lib/Target/Mips/ |
| H A D | MipsSEISelLowering.cpp | 406 EVT ResTy = Op->getValueType(0); in lowerSELECT() local 1357 EVT ResTy = Op->getValueType(0); in lowerMSACopyIntr() local 1501 EVT ResTy = Op->getValueType(0); in truncateVecElts() local 1513 EVT ResTy = Op->getValueType(0); in lowerMSABitClear() local 1524 EVT ResTy = Op->getValueType(0); in lowerMSABitClearImm() local 2291 EVT ResTy = Op->getValueType(0); in lowerMSALoadIntr() local 2404 EVT ResTy = Op->getValueType(0); in lowerEXTRACT_VECTOR_ELT() local 2411 if (ResTy.isInteger()) { in lowerEXTRACT_VECTOR_ELT() 2500 if (ViaVecTy != ResTy) in lowerBUILD_VECTOR() 2512 assert(ResTy.isVector()); in lowerBUILD_VECTOR() [all …]
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| H A D | MipsSEISelDAGToDAG.cpp | 960 MVT ResTy = Node->getSimpleValueType(0); in trySelect() local 961 assert((ResTy == MVT::f64 || ResTy == MVT::f32) && in trySelect() 964 if (ResTy == MVT::f64) in trySelect() 986 CurDAG->getMachineNode(Opc, DL, ResTy, Node->getOperand(0))); in trySelect() 1010 MVT ResTy = Node->getSimpleValueType(0); in trySelect() local 1021 if (ResTy != MVT::i32 && ResTy != MVT::i64) in trySelect() 1025 if (ResTy == MVT::i32) { in trySelect() 1042 ReplaceNode(Node, CurDAG->getMachineNode(Opcode, DL, ResTy, Ops)); in trySelect()
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| /llvm-project-15.0.7/llvm/lib/CodeGen/GlobalISel/ |
| H A D | MachineIRBuilder.cpp | 219 LLT ResTy = Res.getLLTTy(*getMRI()); in buildPadVectorWithUndefElements() local 223 assert((ResTy.getElementType() == Op0Ty.getElementType()) && in buildPadVectorWithUndefElements() 225 assert((ResTy.getNumElements() > Op0Ty.getNumElements()) && in buildPadVectorWithUndefElements() 242 LLT ResTy = Res.getLLTTy(*getMRI()); in buildDeleteTrailingVectorElements() local 248 assert((ResTy.getNumElements() < Op0Ty.getNumElements()) && in buildDeleteTrailingVectorElements() 253 for (unsigned i = 0; i < ResTy.getNumElements(); ++i) in buildDeleteTrailingVectorElements() 535 LLT ResTy = Res.getLLTTy(*getMRI()); in buildZExtInReg() local 537 ResTy, APInt::getLowBitsSet(ResTy.getScalarSizeInBits(), ImmOp)); in buildZExtInReg() 1009 assert((ResTy.isScalar() || ResTy.isVector() || ResTy.isPointer()) && in validateSelectOp() 1011 assert((ResTy == Op0Ty && ResTy == Op1Ty) && "type mismatch"); in validateSelectOp() [all …]
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| H A D | InlineAsmLowering.cpp | 625 LLT ResTy = MRI->getType(ResRegs[i]); in lowerInlineAsm() local 626 if (ResTy.isScalar() && ResTy.getSizeInBits() < SrcSize) { in lowerInlineAsm() 634 } else if (ResTy.getSizeInBits() == SrcSize) { in lowerInlineAsm()
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| /llvm-project-15.0.7/llvm/lib/Target/SystemZ/AsmParser/ |
| H A D | SystemZAsmParser.cpp | 1270 OperandMatchResultTy ResTy; in ParseDirectiveInsn() local 1272 ResTy = parseAnyReg(Operands); in ParseDirectiveInsn() 1274 ResTy = parseVR128(Operands); in ParseDirectiveInsn() 1276 ResTy = parseBDXAddr64(Operands); in ParseDirectiveInsn() 1278 ResTy = parseBDAddr64(Operands); in ParseDirectiveInsn() 1282 ResTy = parsePCRel32(Operands); in ParseDirectiveInsn() 1284 ResTy = parsePCRel16(Operands); in ParseDirectiveInsn() 1298 ResTy = MatchOperand_Success; in ParseDirectiveInsn() 1301 if (ResTy != MatchOperand_Success) in ParseDirectiveInsn() 1476 if (ResTy == MatchOperand_Success) in parseOperand() [all …]
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| /llvm-project-15.0.7/llvm/lib/Target/Sparc/AsmParser/ |
| H A D | SparcAsmParser.cpp | 1033 OperandMatchResultTy ResTy = MatchOperandParserImpl(Operands, Mnemonic); in parseOperand() local 1038 if (ResTy == MatchOperand_Success || ResTy == MatchOperand_ParseFail) in parseOperand() 1039 return ResTy; in parseOperand() 1060 ResTy = MatchOperand_Success; in parseOperand() 1062 ResTy = parseMEMOperand(Operands); in parseOperand() 1065 if (ResTy != MatchOperand_Success) in parseOperand() 1066 return ResTy; in parseOperand() 1078 ResTy = parseSparcAsmOperand(Op, false); in parseOperand() 1079 if (ResTy != MatchOperand_Success || !Op) in parseOperand() 1088 ResTy = parseSparcAsmOperand(Op, (Mnemonic == "call")); in parseOperand() [all …]
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| /llvm-project-15.0.7/llvm/lib/Target/ARM/ |
| H A D | ARMInstrNEON.td | 2698 [(set (ResTy QPR:$Vd), 2699 (ResTy (ShOp (ResTy QPR:$Vn), 2712 (ResTy (ShOp (ResTy QPR:$Vn), 2820 (ResTy (IntOp (ResTy QPR:$Vn), 2832 (ResTy (IntOp (ResTy QPR:$Vn), 2902 (ResTy (ShOp (ResTy QPR:$src1), 2916 (ResTy (ShOp (ResTy QPR:$src1), 3024 (ResTy (IntOp (ResTy QPR:$src1), 3037 (ResTy (IntOp (ResTy QPR:$src1), 3193 [(set DPR:$Vd, (ResTy (IntOp (ResTy DPR:$src1), (OpTy DPR:$Vm))))]>; [all …]
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| H A D | ARMTargetTransformInfo.h | 279 Type *ResTy, VectorType *ValTy,
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| /llvm-project-15.0.7/llvm/lib/Target/VE/AsmParser/ |
| H A D | VEAsmParser.cpp | 1437 OperandMatchResultTy ResTy = MatchOperandParserImpl(Operands, Mnemonic); in parseOperand() local 1442 if (ResTy == MatchOperand_Success || ResTy == MatchOperand_ParseFail) in parseOperand() 1443 return ResTy; in parseOperand() 1480 ResTy = parseVEAsmOperand(Op); in parseOperand() 1481 if (ResTy != MatchOperand_Success || !Op) in parseOperand() 1496 ResTy = parseVEAsmOperand(Op2); in parseOperand() 1497 if (ResTy != MatchOperand_Success || !Op2) in parseOperand()
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| /llvm-project-15.0.7/llvm/lib/Target/Mips/AsmParser/ |
| H A D | MipsAsmParser.cpp | 6601 OperandMatchResultTy ResTy = in searchSymbolAlias() local 6682 OperandMatchResultTy ResTy = in matchAnyRegisterWithoutDollar() local 6684 return ResTy; in matchAnyRegisterWithoutDollar() 6736 return ResTy; in parseAnyRegister() 6749 return ResTy; in parseJumpTarget() 7639 if (ResTy == MatchOperand_NoMatch || ResTy == MatchOperand_ParseFail) { in parseDirectiveCpAdd() 7672 if (ResTy == MatchOperand_NoMatch || ResTy == MatchOperand_ParseFail) { in parseDirectiveCpLoad() 7701 if (ResTy == MatchOperand_NoMatch || ResTy == MatchOperand_ParseFail) { in parseDirectiveCpLocal() 7797 ResTy = parseAnyRegister(TmpReg); in parseDirectiveCPSetup() 8672 if (ResTy == MatchOperand_NoMatch || ResTy == MatchOperand_ParseFail) { in ParseDirective() [all …]
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| /llvm-project-15.0.7/llvm/lib/Target/X86/ |
| H A D | X86InstCombineIntrinsic.cpp | 441 Type *ResTy = II.getType(); in simplifyX86pack() local 445 return UndefValue::get(ResTy); in simplifyX86pack() 448 unsigned NumLanes = ResTy->getPrimitiveSizeInBits() / 128; in simplifyX86pack() 450 assert(cast<FixedVectorType>(ResTy)->getNumElements() == (2 * NumSrcElts) && in simplifyX86pack() 454 unsigned DstScalarSizeInBits = ResTy->getScalarSizeInBits(); in simplifyX86pack() 500 return Builder.CreateTrunc(Shuffle, ResTy); in simplifyX86pack() 506 Type *ResTy = II.getType(); in simplifyX86movmsk() local 510 return Constant::getNullValue(ResTy); in simplifyX86movmsk() 528 Res = Builder.CreateZExtOrTrunc(Res, ResTy); in simplifyX86movmsk()
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| /llvm-project-15.0.7/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPULegalizerInfo.cpp | 3755 LLT ResTy = MRI.getType(Res); in legalizeFastUnsafeFDIV() local 3804 LLT ResTy = MRI.getType(Res); in legalizeFastUnsafeFDIV64() local 3813 auto NegY = B.buildFNeg(ResTy, Y); in legalizeFastUnsafeFDIV64() 3814 auto One = B.buildFConstant(ResTy, 1.0); in legalizeFastUnsafeFDIV64() 3820 auto Tmp0 = B.buildFMA(ResTy, NegY, R, One); in legalizeFastUnsafeFDIV64() 3821 R = B.buildFMA(ResTy, Tmp0, R, R); in legalizeFastUnsafeFDIV64() 3823 auto Tmp1 = B.buildFMA(ResTy, NegY, R, One); in legalizeFastUnsafeFDIV64() 3824 R = B.buildFMA(ResTy, Tmp1, R, R); in legalizeFastUnsafeFDIV64() 3826 auto Ret = B.buildFMul(ResTy, X, R); in legalizeFastUnsafeFDIV64() 5178 LLT ResTy = MRI->getType(ResultRegs[0]); in legalizeImageIntrinsic() local [all …]
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| /llvm-project-15.0.7/clang/lib/CodeGen/ |
| H A D | CodeGenFunction.cpp | 1276 QualType ResTy = FD->getReturnType(); in BuildFunctionArgList() local 1281 ResTy = MD->getThisType(); in BuildFunctionArgList() 1283 ResTy = CGM.getContext().VoidPtrTy; in BuildFunctionArgList() 1311 CGM.getCXXABI().addImplicitStructorParams(*this, ResTy, Args); in BuildFunctionArgList() 1313 return ResTy; in BuildFunctionArgList() 1323 QualType ResTy = BuildFunctionArgList(GD, Args); in GenerateCode() local 1405 StartFunction(GD, ResTy, Fn, FnInfo, Args, Loc, BodyRange.getBegin()); in GenerateCode()
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| H A D | CGExprScalar.cpp | 1430 llvm::Type *ResTy = DstTy; in EmitScalarConversion() local 1459 if (DstTy != ResTy) { in EmitScalarConversion() 1466 Res = Builder.CreateFPTrunc(Res, ResTy, "conv"); in EmitScalarConversion() 4337 llvm::Type *ResTy = ConvertType(E->getType()); in VisitBinLAnd() local 4364 return Builder.CreateZExtOrBitCast(RHSCond, ResTy, "land.ext"); in VisitBinLAnd() 4369 return llvm::Constant::getNullValue(ResTy); in VisitBinLAnd() 4428 return Builder.CreateZExtOrBitCast(PN, ResTy, "land.ext"); in VisitBinLAnd() 4453 llvm::Type *ResTy = ConvertType(E->getType()); in VisitBinLOr() local 4480 return Builder.CreateZExtOrBitCast(RHSCond, ResTy, "lor.ext"); in VisitBinLOr() 4485 return llvm::ConstantInt::get(ResTy, 1); in VisitBinLOr() [all …]
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| /llvm-project-15.0.7/clang/lib/StaticAnalyzer/Checkers/ |
| H A D | CallAndMessageChecker.cpp | 642 QualType ResTy = msg.getResultType(); in emitNilReceiverBug() local 649 if (ResTy->isReferenceType()) { in emitNilReceiverBug()
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| /llvm-project-15.0.7/llvm/lib/Transforms/Instrumentation/ |
| H A D | MemorySanitizer.cpp | 2950 Type *ResTy = isX86_MMX ? IntegerType::get(*MS.C, 64) : I.getType(); in handleVectorSadIntrinsic() local 2952 ResTy->getScalarSizeInBits() - SignificantBitsPerResultElement; in handleVectorSadIntrinsic() 2956 S = IRB.CreateBitCast(S, ResTy); in handleVectorSadIntrinsic() 2957 S = IRB.CreateSExt(IRB.CreateICmpNE(S, Constant::getNullValue(ResTy)), in handleVectorSadIntrinsic() 2958 ResTy); in handleVectorSadIntrinsic() 2969 Type *ResTy = isX86_MMX ? getMMXVectorTy(EltSizeInBits * 2) : I.getType(); in handleVectorPmaddIntrinsic() local 2972 S = IRB.CreateBitCast(S, ResTy); in handleVectorPmaddIntrinsic() 2973 S = IRB.CreateSExt(IRB.CreateICmpNE(S, Constant::getNullValue(ResTy)), in handleVectorPmaddIntrinsic() 2974 ResTy); in handleVectorPmaddIntrinsic() 2985 Type *ResTy = getShadowTy(&I); in handleVectorComparePackedIntrinsic() local [all …]
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| /llvm-project-15.0.7/llvm/include/llvm/Analysis/ |
| H A D | TargetTransformInfo.h | 1271 bool IsMLA, bool IsUnsigned, Type *ResTy, VectorType *Ty, 1777 bool IsMLA, bool IsUnsigned, Type *ResTy, VectorType *Ty, 2343 bool IsMLA, bool IsUnsigned, Type *ResTy, VectorType *Ty, 2345 return Impl.getExtendedAddReductionCost(IsMLA, IsUnsigned, ResTy, Ty,
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| /llvm-project-15.0.7/clang/lib/Sema/ |
| H A D | SemaExpr.cpp | 3544 QualType ResTy; in BuildPredefinedExpr() local 3556 ResTy = in BuildPredefinedExpr() 3561 ResTy = Context.getConstantArrayType(ResTy, LengthI, nullptr, in BuildPredefinedExpr() 3568 ResTy = Context.getConstantArrayType(ResTy, LengthI, nullptr, in BuildPredefinedExpr() 8665 QualType ResTy = in CheckConditionalOperands() local 8702 LHS = ImpCastExprToType(LHS.get(), ResTy, PrepareScalarCast(LHS, ResTy)); in CheckConditionalOperands() 8705 return ResTy; in CheckConditionalOperands() 9062 return ResTy; in computeConditionalNullability() 9099 return ResTy; in computeConditionalNullability() 9103 ResTy = ResTy.getSingleStepDesugaredType(Ctx); in computeConditionalNullability() [all …]
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