Searched refs:RegisterClasses (Results 1 – 11 of 11) sorted by relevance
| /llvm-project-15.0.7/llvm/utils/TableGen/ |
| H A D | RegisterInfoEmitter.cpp | 136 if (!RegisterClasses.empty()) { in runEnums()
139 assert(RegisterClasses.size() <= 0xffff && in runEnums()
146 for (const auto &RC : RegisterClasses) in runEnums()
1047 for (const auto &RC : RegisterClasses) { in runMCDesc()
1083 for (const auto &RC : RegisterClasses) { in runMCDesc()
1200 if (!RegisterClasses.empty()) { in runTargetHeader()
1204 for (const auto &RC : RegisterClasses) { in runTargetHeader()
1241 for (const auto &RC : RegisterClasses) { in runTargetDesc()
1287 if (!RegisterClasses.empty()) { in runTargetDesc()
1449 for (const auto &RC : RegisterClasses) in runTargetDesc()
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| H A D | InstrInfoEmitter.cpp | 361 std::vector<Record *> RegisterClasses = in emitOperandTypeMappings() local
373 {&Operands, &RegisterOperands, &RegisterClasses}) { in emitOperandTypeMappings()
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| H A D | AsmMatcherEmitter.cpp | 740 RegisterClassesTy RegisterClasses; member in __anon8d06870a0111::AsmMatcherInfo
1336 RegisterClasses[It.first] = RegisterSetClasses[It.second]; in buildRegisterClasses()
1340 ClassInfo *CI = RegisterClasses[Rec]; in buildRegisterClasses()
1585 Op.Class = RegisterClasses[RegRecord]; in buildInfo()
2500 for (const auto &RC : Info.RegisterClasses) in emitValidateOperandClass()
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| H A D | CodeGenSchedule.cpp | 1863 RecVec RegisterClasses = RF->getValueAsListOfDefs("RegClasses"); in collectRegisterFiles() local
1866 for (unsigned I = 0, E = RegisterClasses.size(); I < E; ++I) { in collectRegisterFiles()
1875 CGRF.Costs.emplace_back(RegisterClasses[I], Cost, AllowMoveElim); in collectRegisterFiles()
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| /llvm-project-15.0.7/llvm/test/TableGen/ |
| H A D | RegisterInfoEmitter-regcost.td | 36 // CHECK: TargetRegisterInfo(&MyTargetRegInfoDesc, RegisterClasses, RegisterClasses+2,
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| H A D | RegisterInfoEmitter-regcost-list.td | 34 // CHECK: TargetRegisterInfo(&MyTargetRegInfoDesc, RegisterClasses, RegisterClasses+2,
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| H A D | RegisterInfoEmitter-regcost-tuple.td | 71 // CHECK: TargetRegisterInfo(&MyTargetRegInfoDesc, RegisterClasses, RegisterClasses+3,
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| /llvm-project-15.0.7/llvm/include/llvm/Target/GlobalISel/ |
| H A D | RegisterBank.td | 14 list<RegisterClass> RegisterClasses = classes;
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| /llvm-project-15.0.7/llvm/tools/llvm-exegesis/lib/ |
| H A D | RegisterAliasing.h | 103 RegisterClasses; member
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| H A D | RegisterAliasing.cpp | 75 auto &Found = RegisterClasses[RegClassIndex]; in getRegisterClass()
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| /llvm-project-15.0.7/llvm/include/llvm/Target/ |
| H A D | Target.td | 394 // RegisterCategory - This class is a list of RegisterClasses that belong to a
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