| /llvm-project-15.0.7/llvm/lib/Target/AVR/Disassembler/ |
| H A D | AVRDisassembler.cpp | 281 Inst.addOperand(MCOperand::createReg(RegBase)); in decodeLoadStore()
314 unsigned RegBase; in decodeLoadStore() local
317 RegBase = AVR::R27R26; in decodeLoadStore()
320 RegBase = AVR::R29R28; in decodeLoadStore()
323 RegBase = AVR::R31R30; in decodeLoadStore()
333 Inst.addOperand(MCOperand::createReg(RegBase)); in decodeLoadStore()
345 Inst.addOperand(MCOperand::createReg(RegBase)); in decodeLoadStore()
360 Inst.addOperand(MCOperand::createReg(RegBase)); in decodeLoadStore()
361 Inst.addOperand(MCOperand::createReg(RegBase)); in decodeLoadStore()
363 Inst.addOperand(MCOperand::createReg(RegBase)); in decodeLoadStore()
[all …]
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| /llvm-project-15.0.7/llvm/lib/Target/X86/ |
| H A D | X86InstrBuilder.h | 44 RegBase, enumerator
60 : BaseType(RegBase), Scale(1), IndexReg(0), Disp(0), GV(nullptr), in X86AddressMode()
68 if (BaseType == X86AddressMode::RegBase) in getFullAddress()
97 AM.BaseType = X86AddressMode::RegBase; in getAddressFromInstr()
176 if (AM.BaseType == X86AddressMode::RegBase) in addFullAddress()
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| H A D | X86ISelDAGToDAG.cpp | 60 RegBase, enumerator
62 } BaseType = RegBase;
96 if (BaseType != RegBase) return false; in isRIPRelative()
104 BaseType = RegBase; in setBaseReg()
1807 AM.BaseType == X86ISelAddressMode::RegBase && in matchAddress()
1820 AM.BaseType == X86ISelAddressMode::RegBase && in matchAddress()
1835 AM.BaseType == X86ISelAddressMode::RegBase && in matchAddress()
1869 if (AM.BaseType == X86ISelAddressMode::RegBase && in matchAdd()
2241 if (AM.BaseType == X86ISelAddressMode::RegBase && in matchAddressRecursively()
2317 if (AM.BaseType == X86ISelAddressMode::RegBase && in matchAddressRecursively()
[all …]
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| H A D | X86FastISel.cpp | 3800 if (AM.BaseType == X86AddressMode::RegBase && in X86MaterializeGV()
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| /llvm-project-15.0.7/llvm/lib/Target/MSP430/ |
| H A D | MSP430ISelDAGToDAG.cpp | 37 RegBase, enumerator
39 } BaseType = RegBase;
63 if (BaseType == RegBase && Base.Reg.getNode() != nullptr) { in dump()
168 if (AM.BaseType != MSP430ISelAddressMode::RegBase || AM.Base.Reg.getNode()) { in MatchAddressBase()
174 AM.BaseType = MSP430ISelAddressMode::RegBase; in MatchAddressBase()
196 if (AM.BaseType == MSP430ISelAddressMode::RegBase in MatchAddress()
250 if (AM.BaseType == MSP430ISelAddressMode::RegBase) in SelectAddr()
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| /llvm-project-15.0.7/llvm/lib/Target/M68k/ |
| H A D | M68kISelDAGToDAG.cpp | 60 enum class Base { RegBase, FrameIndexBase }; enumerator
83 : AM(AT), BaseType(Base::RegBase), Disp(0), BaseFrameIndex(0), IndexReg(), in M68kISelAddressMode()
99 return BaseType == Base::RegBase && BaseReg.getNode() != nullptr; in hasBaseReg()
103 return BaseType == Base::RegBase && IndexReg.getNode() != nullptr; in hasIndexReg()
135 if (BaseType != Base::RegBase) in isPCRelative()
143 BaseType = Base::RegBase; in setBaseReg()
412 AM.BaseType = M68kISelAddressMode::Base::RegBase; in matchAddressBase()
487 AM.BaseType == M68kISelAddressMode::Base::RegBase && in matchAddressRecursively()
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| /llvm-project-15.0.7/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyFastISel.cpp | 55 using BaseKind = enum { RegBase, FrameIndexBase };
58 BaseKind Kind = RegBase;
79 bool isRegBase() const { return Kind == RegBase; } in isRegBase()
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| /llvm-project-15.0.7/llvm/lib/Target/Mips/ |
| H A D | MipsFastISel.cpp | 87 using BaseKind = enum { RegBase, FrameIndexBase };
90 BaseKind Kind = RegBase;
106 bool isRegBase() const { return Kind == RegBase; } in isRegBase()
1253 Addr.setKind(Address::RegBase); in processCallArgs()
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| /llvm-project-15.0.7/llvm/lib/Target/ARM/ |
| H A D | ARMFastISel.cpp | 90 RegBase, enumerator
92 } BaseType = RegBase;
840 Addr.BaseType = Address::RegBase; in ARMSimplifyAddress()
2009 Addr.BaseType = Address::RegBase; in ProcessCallArgs()
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| /llvm-project-15.0.7/llvm/lib/Target/PowerPC/ |
| H A D | PPCFastISel.cpp | 68 RegBase, enumerator
81 : BaseType(RegBase), Offset(0) { in Address()
435 Addr.BaseType = Address::RegBase; in PPCSimplifyAddress()
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| /llvm-project-15.0.7/llvm/lib/Target/AArch64/ |
| H A D | AArch64FastISel.cpp | 84 RegBase,
89 BaseKind Kind = RegBase;
107 bool isRegBase() const { return Kind == RegBase; } in isRegBase()
1043 Addr.setKind(Address::RegBase); in simplifyAddress()
3065 Addr.setKind(Address::RegBase); in processCallArgs()
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| /llvm-project-15.0.7/clang/lib/CodeGen/ |
| H A D | TargetInfo.cpp | 7670 llvm::Value *RegBase = in EmitVAArg() local
7674 CGF.Builder.CreateAdd(ScaledRegCount, RegBase, "reg_offset"); in EmitVAArg()
|