| /llvm-project-15.0.7/llvm/lib/ExecutionEngine/JITLink/ |
| H A D | MachO_arm64.cpp | 56 switch (RI.r_type) { in getRelocationKind() 69 if (!RI.r_pcrel && RI.r_extern) { in getRelocationKind() 77 if (RI.r_pcrel && RI.r_extern && RI.r_length == 2) in getRelocationKind() 81 if (RI.r_pcrel && RI.r_extern && RI.r_length == 2) in getRelocationKind() 85 if (!RI.r_pcrel && RI.r_extern && RI.r_length == 2) in getRelocationKind() 89 if (RI.r_pcrel && RI.r_extern && RI.r_length == 2) in getRelocationKind() 93 if (!RI.r_pcrel && RI.r_extern && RI.r_length == 2) in getRelocationKind() 97 if (RI.r_pcrel && RI.r_extern && RI.r_length == 2) in getRelocationKind() 101 if (!RI.r_pcrel && !RI.r_extern && RI.r_length == 2) in getRelocationKind() 105 if (RI.r_pcrel && RI.r_extern && RI.r_length == 2) in getRelocationKind() [all …]
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| H A D | MachO_x86_64.cpp | 55 switch (RI.r_type) { in getRelocKind() 60 else if (RI.r_extern && RI.r_length == 2) in getRelocKind() 65 if (RI.r_pcrel && RI.r_length == 2) in getRelocKind() 69 if (RI.r_pcrel && RI.r_extern && RI.r_length == 2) in getRelocKind() 73 if (RI.r_pcrel && RI.r_extern && RI.r_length == 2) in getRelocKind() 77 if (RI.r_pcrel && RI.r_extern && RI.r_length == 2) in getRelocKind() 81 if (!RI.r_pcrel && RI.r_extern) { in getRelocKind() 89 if (RI.r_pcrel && RI.r_length == 2) in getRelocKind() 93 if (RI.r_pcrel && RI.r_length == 2) in getRelocKind() 97 if (RI.r_pcrel && RI.r_length == 2) in getRelocKind() [all …]
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| /llvm-project-15.0.7/polly/lib/CodeGen/ |
| H A D | Utils.cpp | 33 LoopInfo *LI, RegionInfo *RI) { in splitEdge() argument 53 if (RI) { in splitEdge() 54 Region *PrevRegion = RI->getRegionFor(Prev); in splitEdge() 55 Region *SuccRegion = RI->getRegionFor(Succ); in splitEdge() 57 RI->setRegionFor(MiddleBlock, PrevRegion); in splitEdge() 59 RI->setRegionFor(MiddleBlock, SuccRegion); in splitEdge() 108 Region *PrevRegion = RI.getRegionFor(EnteringBB); in executeScopConditionally() 113 RI.setRegionFor(SplitBlock, PrevRegion); in executeScopConditionally() 125 RI.setRegionFor(MergeBlock, R.getParent()); in executeScopConditionally() 157 RI.setRegionFor(StartBlock, RI.getRegionFor(SplitBlock)); in executeScopConditionally() [all …]
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| H A D | CodeGeneration.cpp | 106 static void fixRegionInfo(Function &F, Region &ParentRegion, RegionInfo &RI) { in fixRegionInfo() argument 108 if (RI.getRegionFor(&BB)) in fixRegionInfo() 111 RI.setRegionFor(&BB, &ParentRegion); in fixRegionInfo() 170 RegionInfo &RI) { in generateCode() argument 206 simplifyRegion(R, &DT, &LI, &RI); in generateCode() 221 std::get<0>(executeScopConditionally(S, Builder.getTrue(), DT, RI, LI)); in generateCode() 285 fixRegionInfo(*EnteringBB->getParent(), *R->getParent(), RI); in generateCode() 319 RegionInfo *RI; member in __anone6cb5aa00111::CodeGeneration 335 RI = &getAnalysis<RegionInfoPass>().getRegionInfo(); in runOnScop() 336 return generateCode(S, *AI, *LI, *DT, *SE, *RI); in runOnScop() [all …]
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| /llvm-project-15.0.7/llvm/tools/llvm-diff/lib/ |
| H A D | DifferenceEngine.cpp | 219 ++RI; in diff() 225 for (LI = L->begin(), RI = R->begin(); LI != LE; ++LI, ++RI) in diff() 622 LI != LE && RI != RE; ++LI, ++RI) in diff() 668 for (BasicBlock::const_iterator RI = RStart; RI != RE; ++RI) { in runBlockDiff() local 712 unify(&*LI, &*RI); in runBlockDiff() 715 ++RI; in runBlockDiff() 727 ++LI; ++RI; in runBlockDiff() 739 ++RI; in runBlockDiff() 747 assert(RI != RE); in runBlockDiff() 748 unify(&*LI, &*RI); in runBlockDiff() [all …]
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| /llvm-project-15.0.7/llvm/include/llvm/CodeGen/ |
| H A D | MachineRegionInfo.h | 64 MachineRegionInfo *RI, MachineDominatorTree *DT, 86 MachineRegionInfo RI; 94 MachineRegionInfo &getRegionInfo() { return RI; } 96 const MachineRegionInfo &getRegionInfo() const { return RI; } 142 static NodeRef getEntryNode(MachineRegionInfo *RI) { 144 RI->getTopLevelRegion()); 147 static nodes_iterator nodes_begin(MachineRegionInfo *RI) { 148 return nodes_iterator::begin(getEntryNode(RI)); 151 static nodes_iterator nodes_end(MachineRegionInfo *RI) { 152 return nodes_iterator::end(getEntryNode(RI)); [all …]
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| /llvm-project-15.0.7/libcxx/test/std/algorithms/alg.sorting/alg.sort/stable.sort/ |
| H A D | stable_sort.pass.cpp | 26 template <class RI> 28 test_sort_helper(RI f, RI l) in test_sort_helper() 30 typedef typename std::iterator_traits<RI>::value_type value_type; in test_sort_helper() 31 typedef typename std::iterator_traits<RI>::difference_type difference_type; in test_sort_helper() 47 template <class RI> 49 test_sort_driver_driver(RI f, RI l, int start, RI real_last) in test_sort_driver_driver() 51 for (RI i = l; i > f + start;) in test_sort_driver_driver() 63 template <class RI> 65 test_sort_driver(RI f, RI l, int start) in test_sort_driver()
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| /llvm-project-15.0.7/libcxx/test/std/algorithms/alg.nonmodifying/alg.find.first.of/ |
| H A D | find_first_of.pass.cpp | 29 typedef random_access_iterator<int*> RI; in test_constexpr() typedef 35 …&& (std::find_first_of(RI(std::begin(ic)), RI(std::end(ic)), RI(std::begin(ia)), RI(std::end(ia)))… in test_constexpr() 36 …&& (std::find_first_of(RI(std::begin(ic)), RI(std::end(ic)), RI(std::begin(ib)), RI(std::end(ib)))… in test_constexpr()
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| H A D | find_first_of_pred.pass.cpp | 31 typedef random_access_iterator<int*> RI; in test_constexpr() typedef 37 …&& (std::find_first_of(RI(std::begin(ic)), RI(std::end(ic)), RI(std::begin(ia)), RI(std::end(ia)),… in test_constexpr() 38 …&& (std::find_first_of(RI(std::begin(ic)), RI(std::end(ic)), RI(std::begin(ib)), RI(std::end(ib)),… in test_constexpr()
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| /llvm-project-15.0.7/llvm/unittests/ADT/ |
| H A D | IListIteratorTest.cpp | 31 EXPECT_EQ(RI, RI); in TEST() 32 EXPECT_EQ(RI, CRI); in TEST() 33 EXPECT_EQ(CRI, RI); in TEST() 55 EXPECT_NE(RI, L.rbegin()); in TEST() 56 EXPECT_NE(RI, L.rend()); in TEST() 125 auto RI = L.rbegin(); in TEST() local 126 EXPECT_EQ(&B, &*RI); in TEST() 127 L.remove(*RI++); in TEST() 128 EXPECT_EQ(&A, &*RI); in TEST() 129 L.remove(*RI++); in TEST() [all …]
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| /llvm-project-15.0.7/llvm/lib/CodeGen/ |
| H A D | DwarfEHPrepare.cpp | 93 Value *V = RI->getOperand(0); in GetExceptionObject() 113 ExnObj = ExtractValueInst::Create(RI->getOperand(0), 0, "exn.obj", RI); in GetExceptionObject() 115 RI->eraseFromParent(); in GetExceptionObject() 136 for (auto *RI : Resumes) { in pruneUnreachableResumes() local 155 ResumeInst *RI = Resumes[I]; in pruneUnreachableResumes() local 157 Resumes[ResumesLeft++] = RI; in pruneUnreachableResumes() 160 new UnreachableInst(Ctx, RI); in pruneUnreachableResumes() 161 RI->eraseFromParent(); in pruneUnreachableResumes() 178 Resumes.push_back(RI); in InsertUnwindResumeCalls() 241 ResumeInst *RI = Resumes.front(); in InsertUnwindResumeCalls() local [all …]
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| H A D | MachineRegionInfo.cpp | 38 MachineRegionInfo* RI, in MachineRegion() argument 40 RegionBase<RegionTraits<MachineFunction>>(Entry, Exit, RI, DT, Parent) {} in MachineRegion() 91 RI.recalculate(F, DT, PDT, DF); in runOnMachineFunction() 93 LLVM_DEBUG(RI.dump()); in runOnMachineFunction() 99 RI.releaseMemory(); in releaseMemory() 107 RI.verifyAnalysis(); in verifyAnalysis() 119 RI.print(OS); in print() 124 RI.dump(); in dump()
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| /llvm-project-15.0.7/llvm/lib/Transforms/Instrumentation/ |
| H A D | ControlHeightReduction.cpp | 364 RegionInfo &RI; member in __anonfd3f65480111::CHR 433 if (RI.HasBranch) in print() 671 Region *R = RI.R; in getBranchInsertPoint() 763 RegInfo RI(R); in findScope() local 825 RegInfo RI(R); in findScope() local 866 Region *R = RI.R; in checkScopeHoistable() 1018 if (RI.HasBranch) { in getCHRConditionValuesForRegion() 1374 Region *R = RI.R; in setCHRRegions() 1477 Region *R = RI.R; in hoistScopeConditions() 1635 Region *R = RI.R; in assertBranchOrSelectConditionHoisted() [all …]
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| /llvm-project-15.0.7/llvm/lib/Target/Lanai/ |
| H A D | LanaiDelaySlotFiller.cpp | 107 assert(RI->getOpcode() == Lanai::LDW_RI && RI->getOperand(0).isReg() && in runOnMachineBasicBlock() 108 RI->getOperand(0).getReg() == Lanai::FP && in runOnMachineBasicBlock() 109 RI->getOperand(1).isReg() && in runOnMachineBasicBlock() 110 RI->getOperand(1).getReg() == Lanai::FP && in runOnMachineBasicBlock() 111 RI->getOperand(2).isImm() && RI->getOperand(2).getImm() == -8); in runOnMachineBasicBlock() 112 ++RI; in runOnMachineBasicBlock() 113 assert(RI->getOpcode() == Lanai::ADD_I_LO && in runOnMachineBasicBlock() 114 RI->getOperand(0).isReg() && in runOnMachineBasicBlock() 115 RI->getOperand(0).getReg() == Lanai::SP && in runOnMachineBasicBlock() 116 RI->getOperand(1).isReg() && in runOnMachineBasicBlock() [all …]
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| /llvm-project-15.0.7/llvm/lib/Analysis/ |
| H A D | RegionPrinter.cpp | 108 for (const auto &RI : R) in printRegionCluster() local 109 printRegionCluster(*RI, GW, depth + 1); in printRegionCluster() 114 if (RI.getRegionFor(BB) == &R) in printRegionCluster() 116 << static_cast<const void*>(RI.getTopLevelRegion()->getBBNode(BB)) in printRegionCluster() 220 static void viewRegionInfo(RegionInfo *RI, bool ShortNames) { in viewRegionInfo() argument 221 assert(RI && "Argument must be non-null"); in viewRegionInfo() 223 llvm::Function *F = RI->getTopLevelRegion()->getEntry()->getParent(); in viewRegionInfo() 224 std::string GraphName = DOTGraphTraits<RegionInfo *>::getGraphName(RI); in viewRegionInfo() 226 llvm::ViewGraph(RI, "reg", ShortNames, in viewRegionInfo() 245 void llvm::viewRegion(RegionInfo *RI) { viewRegionInfo(RI, false); } in viewRegion() argument [all …]
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| H A D | RegionInfo.cpp | 63 RegionInfo* RI, in Region() argument 65 RegionBase<RegionTraits<Function>>(Entry, Exit, RI, DT, Parent) { in Region() 131 RI.recalculate(F, DT, PDT, DF); in runOnFunction() 136 RI.releaseMemory(); in releaseMemory() 140 RI.verifyAnalysis(); in verifyAnalysis() 151 RI.print(OS); in print() 156 RI.dump(); in dump() 189 RegionInfo RI; in run() local 194 RI.recalculate(F, DT, PDT, DF); in run() 195 return RI; in run()
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| /llvm-project-15.0.7/llvm/lib/MC/ |
| H A D | MCInstrDesc.cpp | 21 const MCRegisterInfo &RI) const { in mayAffectControlFlow() 24 unsigned PC = RI.getProgramCounter(); in mayAffectControlFlow() 27 if (hasDefOfPhysReg(MI, PC, RI)) in mayAffectControlFlow() 42 const MCRegisterInfo &RI) const { in hasDefOfPhysReg() 45 RI.isSubRegisterEq(Reg, MI.getOperand(i).getReg())) in hasDefOfPhysReg() 50 RI.isSubRegisterEq(Reg, MI.getOperand(i).getReg())) in hasDefOfPhysReg() 52 return hasImplicitDefOfPhysReg(Reg, &RI); in hasDefOfPhysReg()
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| /llvm-project-15.0.7/libcxx/test/std/algorithms/alg.nonmodifying/alg.find.end/ |
| H A D | find_end.pass.cpp | 29 typedef random_access_iterator<int*> RI; in test_constexpr() typedef 35 …&& (std::find_end(RI(std::begin(ic)), RI(std::end(ic)), RI(std::begin(ia)), RI(std::end(ia))) == R… in test_constexpr() 36 …&& (std::find_end(RI(std::begin(ic)), RI(std::end(ic)), RI(std::begin(ib)), RI(std::end(ib))) == R… in test_constexpr()
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| H A D | find_end_pred.pass.cpp | 39 typedef random_access_iterator<int*> RI; in test_constexpr() typedef 45 …&& (std::find_end(RI(std::begin(ic)), RI(std::end(ic)), RI(std::begin(ia)), RI(std::end(ia)), eq) … in test_constexpr() 46 …&& (std::find_end(RI(std::begin(ic)), RI(std::end(ic)), RI(std::begin(ib)), RI(std::end(ib)), eq) … in test_constexpr()
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| /llvm-project-15.0.7/llvm/include/llvm-c/ |
| H A D | Object.h | 184 void LLVMDisposeRelocationIterator(LLVMRelocationIteratorRef RI); 186 LLVMRelocationIteratorRef RI); 187 void LLVMMoveToNextRelocation(LLVMRelocationIteratorRef RI); 196 uint64_t LLVMGetRelocationOffset(LLVMRelocationIteratorRef RI); 197 LLVMSymbolIteratorRef LLVMGetRelocationSymbol(LLVMRelocationIteratorRef RI); 198 uint64_t LLVMGetRelocationType(LLVMRelocationIteratorRef RI); 201 const char *LLVMGetRelocationTypeName(LLVMRelocationIteratorRef RI); 202 const char *LLVMGetRelocationValueString(LLVMRelocationIteratorRef RI);
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| /llvm-project-15.0.7/libcxx/test/std/experimental/algorithms/alg.search/ |
| H A D | search.pass.cpp | 40 typedef int * RI; in main() typedef 41 …static_assert((std::is_same<RI, decltype(std::experimental::search(RI(), RI(), MySearcher()))>::va… in main() 43 RI it(nullptr); in main()
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| /llvm-project-15.0.7/libcxx/test/libcxx/iterators/predef.iterators/__unconstrained_reverse_iterator/reverse.iter.elem/ |
| H A D | dereference.pass.cpp | 52 typedef std::__unconstrained_reverse_iterator<const char *> RI; in main() typedef 53 constexpr RI it1 = RI(p+1); in main() 54 constexpr RI it2 = RI(p+2); in main()
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| /llvm-project-15.0.7/llvm/tools/llvm-reduce/deltas/ |
| H A D | ReduceInstructionsMIR.cpp | 27 MachineBasicBlock::reverse_iterator &RI, in getPrevDefOfRCInMBB() argument 31 for (MachineBasicBlock::reverse_instr_iterator E = MBB.instr_rend(); RI != E; in getPrevDefOfRCInMBB() 32 ++RI) { in getPrevDefOfRCInMBB() 33 auto &MI = *RI; in getPrevDefOfRCInMBB() 106 MachineBasicBlock::reverse_iterator RI(*MI); in extractInstrFromFunction() local 108 ++RI; in extractInstrFromFunction() 112 NewReg = getPrevDefOfRCInMBB(*BB, RI, RegRC, RegTy, ToDelete); in extractInstrFromFunction() 116 RI = BB->rbegin(); in extractInstrFromFunction()
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| /llvm-project-15.0.7/llvm/lib/Target/Hexagon/MCTargetDesc/ |
| H A D | HexagonMCChecker.cpp | 71 HexagonMCInstrInfo::isPredReg(RI, R)) { in initReg() 82 for (MCRegAliasIterator SRI(R, &RI, !MCSubRegIterator(R, &RI).isValid()); in initReg() 84 if (!MCSubRegIterator(*SRI, &RI).isValid()) in initReg() 129 else if (HexagonMCInstrInfo::isPredReg(RI, R) && in init() 151 for (MCRegAliasIterator SRI(R, &RI, !MCSubRegIterator(R, &RI).isValid()); in init() 153 if (MCSubRegIterator(*SRI, &RI).isValid()) in init() 173 HexagonMCInstrInfo::isPredReg(RI, *SRI)) in init() 199 if (HexagonMCInstrInfo::isPredReg(RI, P)) in init() 215 : Context(Other.Context), MCB(Other.MCB), RI(Other.RI), MCII(Other.MCII), in HexagonMCChecker() 776 reportError("register `" + Twine(RI.getName(Register)) + in reportErrorRegisters() [all …]
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| /llvm-project-15.0.7/llvm/lib/Target/AMDGPU/ |
| H A D | SIInstrInfo.cpp | 69 RI(ST), ST(ST) { in SIInstrInfo() 724 (RI.getRegSizeInBits(*RI.getPhysRegClass(SrcReg)) == 16))) { in copyPhysReg() 927 if (RC == RI.getVGPR64Class() && (SrcRC == RC || RI.isSGPRClass(SrcRC))) { in copyPhysReg() 949 const bool Forward = RI.getHWRegIndex(DestReg) <= RI.getHWRegIndex(SrcReg); in copyPhysReg() 971 } else if (RI.hasVGPRs(RC) && RI.isAGPRClass(SrcRC)) { in copyPhysReg() 1282 } else if (RI.getRegSizeInBits(*DstRC) == 64 && RI.isSGPRClass(DstRC)) { in getMovOpcode() 1284 } else if (RI.getRegSizeInBits(*DstRC) == 64 && !RI.isSGPRClass(DstRC)) { in getMovOpcode() 3070 RI.isSGPRClass(RI.getPhysRegClass(Src1->getReg()))) || in FoldImmediate() 4799 return RI.getProperlyAlignedRC(RI.getRegClass(RCID)); in adjustAllocatableRegClass() 5243 if (RI.hasAGPRs(RI.getRegClassForReg(MRI, MO.getReg())) && in legalizeOperandsVOP3() [all …]
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