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Revision tags: llvmorg-20.1.0, llvmorg-20.1.0-rc3, llvmorg-20.1.0-rc2, llvmorg-20.1.0-rc1, llvmorg-21-init, llvmorg-19.1.7, llvmorg-19.1.6, llvmorg-19.1.5, llvmorg-19.1.4, llvmorg-19.1.3, llvmorg-19.1.2, llvmorg-19.1.1, llvmorg-19.1.0, llvmorg-19.1.0-rc4, llvmorg-19.1.0-rc3, llvmorg-19.1.0-rc2, llvmorg-19.1.0-rc1, llvmorg-20-init, llvmorg-18.1.8, llvmorg-18.1.7, llvmorg-18.1.6, llvmorg-18.1.5, llvmorg-18.1.4, llvmorg-18.1.3, llvmorg-18.1.2, llvmorg-18.1.1, llvmorg-18.1.0, llvmorg-18.1.0-rc4, llvmorg-18.1.0-rc3, llvmorg-18.1.0-rc2, llvmorg-18.1.0-rc1, llvmorg-19-init, llvmorg-17.0.6, llvmorg-17.0.5, llvmorg-17.0.4, llvmorg-17.0.3, llvmorg-17.0.2, llvmorg-17.0.1, llvmorg-17.0.0, llvmorg-17.0.0-rc4, llvmorg-17.0.0-rc3, llvmorg-17.0.0-rc2, llvmorg-17.0.0-rc1, llvmorg-18-init, llvmorg-16.0.6, llvmorg-16.0.5, llvmorg-16.0.4, llvmorg-16.0.3, llvmorg-16.0.2, llvmorg-16.0.1, llvmorg-16.0.0, llvmorg-16.0.0-rc4, llvmorg-16.0.0-rc3, llvmorg-16.0.0-rc2, llvmorg-16.0.0-rc1, llvmorg-17-init, llvmorg-15.0.7, llvmorg-15.0.6, llvmorg-15.0.5, llvmorg-15.0.4, llvmorg-15.0.3, llvmorg-15.0.2, llvmorg-15.0.1, llvmorg-15.0.0, llvmorg-15.0.0-rc3, llvmorg-15.0.0-rc2, llvmorg-15.0.0-rc1, llvmorg-16-init |
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| #
f9d6f372 |
| 16-Jul-2022 |
Fangrui Song <[email protected]> |
[LegacyPM] Remove ControlHeightReductionLegacyPass
This pass tries to reduce the number of conditional branches in the hot path based on profile. It's mostly a no-op after legacy PGO passes are move
[LegacyPM] Remove ControlHeightReductionLegacyPass
This pass tries to reduce the number of conditional branches in the hot path based on profile. It's mostly a no-op after legacy PGO passes are moved.
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Revision tags: llvmorg-14.0.6 |
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| #
129b531c |
| 19-Jun-2022 |
Kazu Hirata <[email protected]> |
[llvm] Use value_or instead of getValueOr (NFC)
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df792bcb |
| 13-Jun-2022 |
Kazu Hirata <[email protected]> |
[Transforms] Use default member initialization (NFC)
Identified with modernize-use-default-member-init.
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Revision tags: llvmorg-14.0.5 |
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c8eb83f2 |
| 26-May-2022 |
Nikita Popov <[email protected]> |
[ControlHeightReduction] Use logical and
Use logical instead of bitwise and to combine conditions, to avoid propagating poison from a later condition if an earlier one is already false. This avoids
[ControlHeightReduction] Use logical and
Use logical instead of bitwise and to combine conditions, to avoid propagating poison from a later condition if an earlier one is already false. This avoids introducing branch on poison.
Differential Revision: https://reviews.llvm.org/D125898
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Revision tags: llvmorg-14.0.4 |
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| #
7ba48466 |
| 10-May-2022 |
Nikita Popov <[email protected]> |
[ControlHeightReduction] Freeze condition when converting select to branch
While select conditions can be poison, branch on poison is immediate UB. As such, we need to freeze the condition when conv
[ControlHeightReduction] Freeze condition when converting select to branch
While select conditions can be poison, branch on poison is immediate UB. As such, we need to freeze the condition when converting a select into a branch.
Differential Revision: https://reviews.llvm.org/D125398
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afc21c7e |
| 13-May-2022 |
Nikita Popov <[email protected]> |
[ControlHeightReduction] Simplify addToMergedCondition() (NFC)
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Revision tags: llvmorg-14.0.3, llvmorg-14.0.2 |
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26a0d53b |
| 25-Apr-2022 |
Wei Wang <[email protected]> |
[CHR] Skip region containing llvm.coro.id
When a block containing llvm.coro.id is cloned during CHR, it inserts an invalid PHI node with token type to the beginning of the block containing llvm.coro
[CHR] Skip region containing llvm.coro.id
When a block containing llvm.coro.id is cloned during CHR, it inserts an invalid PHI node with token type to the beginning of the block containing llvm.coro.begin. To avoid such case, we exclude regions with llvm.coro.id.
Reviewed By: ChuanqiXu
Differential Revision: https://reviews.llvm.org/D124418
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Revision tags: llvmorg-14.0.1 |
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| #
bce1bf0e |
| 20-Mar-2022 |
Kazu Hirata <[email protected]> |
[Transform] Apply clang-tidy fixes for readability-redundant-smartptr-get (NFC)
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Revision tags: llvmorg-14.0.0, llvmorg-14.0.0-rc4, llvmorg-14.0.0-rc3, llvmorg-14.0.0-rc2 |
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fda6a1ad |
| 13-Feb-2022 |
Kazu Hirata <[email protected]> |
[Transforms] Use default member initialization in CHRStats (NFC)
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Revision tags: llvmorg-14.0.0-rc1, llvmorg-15-init, llvmorg-13.0.1, llvmorg-13.0.1-rc3, llvmorg-13.0.1-rc2, llvmorg-13.0.1-rc1 |
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c714da2c |
| 31-Oct-2021 |
Kazu Hirata <[email protected]> |
[Transforms] Use {DenseSet,SetVector,SmallPtrSet}::contains (NFC)
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c8b1ed5f |
| 31-Oct-2021 |
Kazu Hirata <[email protected]> |
[clang, llvm] Use Optional::getValueOr (NFC)
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Revision tags: llvmorg-13.0.0, llvmorg-13.0.0-rc4, llvmorg-13.0.0-rc3, llvmorg-13.0.0-rc2, llvmorg-13.0.0-rc1, llvmorg-14-init, llvmorg-12.0.1, llvmorg-12.0.1-rc4, llvmorg-12.0.1-rc3, llvmorg-12.0.1-rc2 |
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| #
fae7deba |
| 12-Jun-2021 |
Xun Li <[email protected]> |
[CHR] Don't run ControlHeightReduction if any BB has address taken
This patch is to address https://bugs.llvm.org/show_bug.cgi?id=50610. In computed goto pattern, there are usually a list of basic b
[CHR] Don't run ControlHeightReduction if any BB has address taken
This patch is to address https://bugs.llvm.org/show_bug.cgi?id=50610. In computed goto pattern, there are usually a list of basic blocks that are all targets of indirectbr instruction, and each basic block also has address taken and stored in a variable. CHR pass could potentially clone these basic blocks, which would generate a cloned version of the indirectbr and clonved version of all basic blocks in the list. However these basic blocks will not have their addresses taken and stored anywhere. So latter SimplifyCFG pass will simply remove all tehse cloned basic blocks, resulting in incorrect code. To fix this, when searching for scopes, we skip scopes that contains BBs with addresses taken. Added a few test cases.
Reviewed By: aeubanks, wenlei, hoy
Differential Revision: https://reviews.llvm.org/D103867
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Revision tags: llvmorg-12.0.1-rc1 |
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| #
6b9524a0 |
| 06-May-2021 |
Arthur Eubanks <[email protected]> |
[NewPM] Don't mark AA analyses as preserved
Currently all AA analyses marked as preserved are stateless, not taking into account their dependent analyses. So there's no need to mark them as preserve
[NewPM] Don't mark AA analyses as preserved
Currently all AA analyses marked as preserved are stateless, not taking into account their dependent analyses. So there's no need to mark them as preserved, they won't be invalidated unless their analyses are.
SCEVAAResults was the one exception to this, it was treated like a typical analysis result. Make it like the others and don't invalidate unless SCEV is invalidated.
Reviewed By: asbirlea
Differential Revision: https://reviews.llvm.org/D102032
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Revision tags: llvmorg-12.0.0, llvmorg-12.0.0-rc5, llvmorg-12.0.0-rc4, llvmorg-12.0.0-rc3, llvmorg-12.0.0-rc2, llvmorg-11.1.0, llvmorg-11.1.0-rc3, llvmorg-12.0.0-rc1, llvmorg-13-init, llvmorg-11.1.0-rc2, llvmorg-11.1.0-rc1 |
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| #
33bf1cad |
| 08-Jan-2021 |
Kazu Hirata <[email protected]> |
[llvm] Use *Set::contains (NFC)
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8299fb8f |
| 27-Dec-2020 |
Kazu Hirata <[email protected]> |
[Transforms] Use llvm::append_range (NFC)
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df812115 |
| 24-Dec-2020 |
Kazu Hirata <[email protected]> |
[CodeGen, Transforms] Use llvm::any_of (NFC)
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Revision tags: llvmorg-11.0.1, llvmorg-11.0.1-rc2 |
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b6211167 |
| 18-Dec-2020 |
Kazu Hirata <[email protected]> |
[Transforms] Use llvm::erase_if (NFC)
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Revision tags: llvmorg-11.0.1-rc1 |
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1c82d320 |
| 25-Nov-2020 |
Kazu Hirata <[email protected]> |
[CHR] Use pred_size (NFC)
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| #
5c31b8b9 |
| 31-Oct-2020 |
Arthur Eubanks <[email protected]> |
Revert "Use uint64_t for branch weights instead of uint32_t"
This reverts commit 10f2a0d662d8d72eaac48d3e9b31ca8dc90df5a4.
More uint64_t overflows.
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Revision tags: llvmorg-11.0.0, llvmorg-11.0.0-rc6 |
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| #
10f2a0d6 |
| 30-Sep-2020 |
Arthur Eubanks <[email protected]> |
Use uint64_t for branch weights instead of uint32_t
CallInst::updateProfWeight() creates branch_weights with i64 instead of i32. To be more consistent everywhere and remove lots of casts from uint64
Use uint64_t for branch weights instead of uint32_t
CallInst::updateProfWeight() creates branch_weights with i64 instead of i32. To be more consistent everywhere and remove lots of casts from uint64_t to uint32_t, use i64 for branch_weights.
Reviewed By: davidxl
Differential Revision: https://reviews.llvm.org/D88609
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2a4e704c |
| 27-Oct-2020 |
Nico Weber <[email protected]> |
Revert "Use uint64_t for branch weights instead of uint32_t"
This reverts commit e5766f25c62c185632e3a75bf45b313eadab774b. Makes clang assert when building Chromium, see https://crbug.com/1142813 fo
Revert "Use uint64_t for branch weights instead of uint32_t"
This reverts commit e5766f25c62c185632e3a75bf45b313eadab774b. Makes clang assert when building Chromium, see https://crbug.com/1142813 for a repro.
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| #
e5766f25 |
| 30-Sep-2020 |
Arthur Eubanks <[email protected]> |
Use uint64_t for branch weights instead of uint32_t
CallInst::updateProfWeight() creates branch_weights with i64 instead of i32. To be more consistent everywhere and remove lots of casts from uint64
Use uint64_t for branch weights instead of uint32_t
CallInst::updateProfWeight() creates branch_weights with i64 instead of i32. To be more consistent everywhere and remove lots of casts from uint64_t to uint32_t, use i64 for branch_weights.
Reviewed By: davidxl
Differential Revision: https://reviews.llvm.org/D88609
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Revision tags: llvmorg-11.0.0-rc5, llvmorg-11.0.0-rc4, llvmorg-11.0.0-rc3, llvmorg-11.0.0-rc2, llvmorg-11.0.0-rc1, llvmorg-12-init, llvmorg-10.0.1, llvmorg-10.0.1-rc4, llvmorg-10.0.1-rc3, llvmorg-10.0.1-rc2, llvmorg-10.0.1-rc1, llvmorg-10.0.0, llvmorg-10.0.0-rc6, llvmorg-10.0.0-rc5, llvmorg-10.0.0-rc4, llvmorg-10.0.0-rc3, llvmorg-10.0.0-rc2, llvmorg-10.0.0-rc1, llvmorg-11-init |
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| #
bd541b21 |
| 14-Jan-2020 |
Alina Sbirlea <[email protected]> |
[NewPassManager] Add assertions when getting statefull cached analysis.
Summary: Analyses that are statefull should not be retrieved through a proxy from an outer IR unit, as these analyses are only
[NewPassManager] Add assertions when getting statefull cached analysis.
Summary: Analyses that are statefull should not be retrieved through a proxy from an outer IR unit, as these analyses are only invalidated at the end of the inner IR unit manager. This patch disallows getting the outer manager and provides an API to get a cached analysis through the proxy. If the analysis is not stateless, the call to getCachedResult will assert.
Reviewers: chandlerc
Subscribers: mehdi_amini, eraman, hiraditya, zzheng, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D72893
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| #
f1542efd |
| 13-Apr-2020 |
Benjamin Kramer <[email protected]> |
[CHR] Clean up some code and reduce copying. NFCI.
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7b9f8e17 |
| 13-Jan-2020 |
Hiroshi Yamauchi <[email protected]> |
[PGO][CHR] Guard against 0-to-0 branch weight and avoid division by zero crash.
Summary: This fixes a crash in internal builds under SamplePGO.
Reviewers: davidxl
Subscribers: hiraditya, llvm-comm
[PGO][CHR] Guard against 0-to-0 branch weight and avoid division by zero crash.
Summary: This fixes a crash in internal builds under SamplePGO.
Reviewers: davidxl
Subscribers: hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D72653
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