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Searched refs:OrigBB (Results 1 – 16 of 16) sorted by relevance

/llvm-project-15.0.7/llvm/lib/CodeGen/
H A DBranchRelaxation.cpp222 MachineBasicBlock *OrigBB = MI.getParent(); in splitBlockBeforeInstr() local
226 MF->CreateMachineBasicBlock(OrigBB->getBasicBlock()); in splitBlockBeforeInstr()
227 MF->insert(++OrigBB->getIterator(), NewBB); in splitBlockBeforeInstr()
230 NewBB->splice(NewBB->end(), OrigBB, MI.getIterator(), OrigBB->end()); in splitBlockBeforeInstr()
236 TII->insertUnconditionalBranch(*OrigBB, NewBB, DebugLoc()); in splitBlockBeforeInstr()
241 NewBB->transferSuccessors(OrigBB); in splitBlockBeforeInstr()
242 OrigBB->addSuccessor(NewBB); in splitBlockBeforeInstr()
243 OrigBB->addSuccessor(DestBB); in splitBlockBeforeInstr()
247 OrigBB->updateTerminator(NewBB); in splitBlockBeforeInstr()
254 BlockInfo[OrigBB->getNumber()].Size = computeBlockSize(*OrigBB); in splitBlockBeforeInstr()
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H A DModuloSchedule.cpp244 unsigned LastStage, MachineBasicBlock *KernelBB, MachineBasicBlock *OrigBB, in generateEpilog() argument
315 assert((OrigBB == TBB || OrigBB == FBB) && in generateEpilog()
317 if (OrigBB != TBB) in generateEpilog()
H A DRegisterCoalescer.cpp3959 const MachineBasicBlock *OrigBB = Copy.getParent(); in applyTerminalRule() local
3968 if (&MI == &Copy || !MI.isCopyLike() || MI.getParent() != OrigBB) in applyTerminalRule()
/llvm-project-15.0.7/llvm/lib/Transforms/Utils/
H A DBasicBlockUtils.cpp1203 OrigBB->getParent(), OrigBB); in SplitLandingPadPredecessorsImpl()
1207 BranchInst *BI1 = BranchInst::Create(OrigBB, NewBB1); in SplitLandingPadPredecessorsImpl()
1225 UpdatePHINodes(OrigBB, NewBB1, Preds, BI1, HasLoopExit); in SplitLandingPadPredecessorsImpl()
1229 for (pred_iterator i = pred_begin(OrigBB), e = pred_end(OrigBB); in SplitLandingPadPredecessorsImpl()
1236 e = pred_end(OrigBB); in SplitLandingPadPredecessorsImpl()
1242 NewBB2 = BasicBlock::Create(OrigBB->getContext(), in SplitLandingPadPredecessorsImpl()
1244 OrigBB->getParent(), OrigBB); in SplitLandingPadPredecessorsImpl()
1248 BranchInst *BI2 = BranchInst::Create(OrigBB, NewBB2); in SplitLandingPadPredecessorsImpl()
1264 LandingPadInst *LPad = OrigBB->getLandingPadInst(); in SplitLandingPadPredecessorsImpl()
1294 void llvm::SplitLandingPadPredecessors(BasicBlock *OrigBB, in SplitLandingPadPredecessors() argument
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H A DLowerMemIntrinsics.cpp384 BasicBlock *OrigBB = InsertBefore->getParent(); in createMemMoveLoop() local
385 Function *F = OrigBB->getParent(); in createMemMoveLoop()
427 new ICmpInst(OrigBB->getTerminator(), ICmpInst::ICMP_EQ, CopyLen, in createMemMoveLoop()
476 BasicBlock *OrigBB = InsertBefore->getParent(); in createMemSetLoop() local
477 Function *F = OrigBB->getParent(); in createMemSetLoop()
480 OrigBB->splitBasicBlock(InsertBefore, "split"); in createMemSetLoop()
484 IRBuilder<> Builder(OrigBB->getTerminator()); in createMemSetLoop()
494 OrigBB->getTerminator()->eraseFromParent(); in createMemSetLoop()
501 LoopIndex->addIncoming(ConstantInt::get(TypeOfCopyLen, 0), OrigBB); in createMemSetLoop()
H A DInlineFunction.cpp1613 auto *OrigBB = cast<BasicBlock>(Entry.first); in updateCallerBFI() local
1615 uint64_t Freq = CalleeBFI->getBlockFreq(OrigBB).getFrequency(); in updateCallerBFI()
1826 BasicBlock *OrigBB = CB.getParent(); in InlineFunction() local
1827 Function *Caller = OrigBB->getParent(); in InlineFunction()
2009 updateCallerBFI(OrigBB, VMap, IFI.CallerBFI, IFI.CalleeBFI, in InlineFunction()
2531 OrigBB->splitBasicBlock(CreatedBranchToNormalDest->getIterator(), in InlineFunction()
2538 AfterCallBB = OrigBB->splitBasicBlock(CB.getIterator(), in InlineFunction()
2545 AfterCallBB, IFI.CallerBFI->getBlockFreq(OrigBB).getFrequency()); in InlineFunction()
2551 Instruction *Br = OrigBB->getTerminator(); in InlineFunction()
2651 CalleeEntry->replaceAllUsesWith(OrigBB); // Update PHI nodes in InlineFunction()
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H A DLowerSwitch.cpp120 BasicBlock *SuccBB, BasicBlock *OrigBB, BasicBlock *NewBB, in FixPhis() argument
129 if (PN->getIncomingBlock(Idx) == OrigBB) { in FixPhis()
143 if (PN->getIncomingBlock(Idx) == OrigBB) { in FixPhis()
/llvm-project-15.0.7/llvm/lib/Target/CSKY/
H A DCSKYConstantIslandPass.cpp652 MachineBasicBlock *OrigBB = MI.getParent(); in splitBlockBeforeInstr() local
656 MF->CreateMachineBasicBlock(OrigBB->getBasicBlock()); in splitBlockBeforeInstr()
657 MachineFunction::iterator MBBI = ++OrigBB->getIterator(); in splitBlockBeforeInstr()
661 NewBB->splice(NewBB->end(), OrigBB, MI, OrigBB->end()); in splitBlockBeforeInstr()
673 NewBB->transferSuccessors(OrigBB); in splitBlockBeforeInstr()
676 OrigBB->addSuccessor(NewBB); in splitBlockBeforeInstr()
693 if (WaterBB == OrigBB) in splitBlockBeforeInstr()
696 WaterList.insert(IP, OrigBB); in splitBlockBeforeInstr()
697 NewWaterList.insert(OrigBB); in splitBlockBeforeInstr()
704 computeBlockSize(OrigBB); in splitBlockBeforeInstr()
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/llvm-project-15.0.7/llvm/lib/Target/Mips/
H A DMipsConstantIslandPass.cpp845 MachineBasicBlock *OrigBB = MI.getParent(); in splitBlockBeforeInstr() local
849 MF->CreateMachineBasicBlock(OrigBB->getBasicBlock()); in splitBlockBeforeInstr()
850 MachineFunction::iterator MBBI = ++OrigBB->getIterator(); in splitBlockBeforeInstr()
854 NewBB->splice(NewBB->end(), OrigBB, MI, OrigBB->end()); in splitBlockBeforeInstr()
864 NewBB->transferSuccessors(OrigBB); in splitBlockBeforeInstr()
867 OrigBB->addSuccessor(NewBB); in splitBlockBeforeInstr()
884 if (WaterBB == OrigBB) in splitBlockBeforeInstr()
887 WaterList.insert(IP, OrigBB); in splitBlockBeforeInstr()
888 NewWaterList.insert(OrigBB); in splitBlockBeforeInstr()
895 computeBlockSize(OrigBB); in splitBlockBeforeInstr()
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/llvm-project-15.0.7/llvm/lib/Target/ARM/
H A DARMConstantIslandPass.cpp976 MachineBasicBlock *OrigBB = MI->getParent(); in splitBlockBeforeInstr() local
980 LRs.addLiveOuts(*OrigBB); in splitBlockBeforeInstr()
992 NewBB->splice(NewBB->end(), OrigBB, MI, OrigBB->end()); in splitBlockBeforeInstr()
1002 BuildMI(OrigBB, DebugLoc(), TII->get(Opc)) in splitBlockBeforeInstr()
1008 NewBB->transferSuccessors(OrigBB); in splitBlockBeforeInstr()
1011 OrigBB->addSuccessor(NewBB); in splitBlockBeforeInstr()
1034 if (WaterBB == OrigBB) in splitBlockBeforeInstr()
1037 WaterList.insert(IP, OrigBB); in splitBlockBeforeInstr()
1038 NewWaterList.insert(OrigBB); in splitBlockBeforeInstr()
1045 BBUtils->computeBlockSize(OrigBB); in splitBlockBeforeInstr()
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/llvm-project-15.0.7/llvm/lib/Transforms/Scalar/
H A DPlaceSafepoints.cpp625 BasicBlock *OrigBB = InsertBefore->getParent(); in INITIALIZE_PASS_DEPENDENCY() local
644 if (Before == OrigBB->begin()) in INITIALIZE_PASS_DEPENDENCY()
650 assert(After != OrigBB->end() && "must have successor"); in INITIALIZE_PASS_DEPENDENCY()
666 BasicBlock::iterator Start = IsBegin ? OrigBB->begin() : std::next(Before); in INITIALIZE_PASS_DEPENDENCY()
/llvm-project-15.0.7/llvm/include/llvm/Transforms/Utils/
H A DBasicBlockUtils.h363 void SplitLandingPadPredecessors(BasicBlock *OrigBB,
383 BasicBlock *OrigBB, ArrayRef<BasicBlock *> Preds, const char *Suffix,
/llvm-project-15.0.7/llvm/include/llvm/CodeGen/
H A DModuloSchedule.h194 MachineBasicBlock *OrigBB, ValueMapTy *VRMap,
/llvm-project-15.0.7/clang/lib/CodeGen/
H A DCGExprComplex.cpp730 llvm::BasicBlock *OrigBB = Branch->getParent(); in EmitBinMul() local
755 RealPHI->addIncoming(ResR, OrigBB); in EmitBinMul()
759 ImagPHI->addIncoming(ResI, OrigBB); in EmitBinMul()
/llvm-project-15.0.7/llvm/lib/Target/AMDGPU/
H A DSIISelLowering.cpp3586 MachineBasicBlock &OrigBB, MachineBasicBlock &LoopBB, in emitLoadM0FromVGPRLoop() argument
3592 MachineFunction *MF = OrigBB.getParent(); in emitLoadM0FromVGPRLoop()
3605 .addMBB(&OrigBB) in emitLoadM0FromVGPRLoop()
3611 .addMBB(&OrigBB) in emitLoadM0FromVGPRLoop()
H A DSIInstrInfo.cpp5475 MachineBasicBlock &OrigBB, MachineBasicBlock &LoopBB, in emitLoadSRsrcFromVGPRLoop() argument
5478 MachineFunction &MF = *OrigBB.getParent(); in emitLoadSRsrcFromVGPRLoop()