| /llvm-project-15.0.7/llvm/lib/CodeGen/ |
| H A D | TwoAddressInstructionPass.cpp | 1307 SmallVector<MachineInstr *, 2> NewMIs; in tryInstructionTransform() local
1314 assert(NewMIs.size() == 2 && in tryInstructionTransform()
1317 NewMIs[1]->addRegisterKilled(Reg, TRI); in tryInstructionTransform()
1321 MBB->insert(mi, NewMIs[0]); in tryInstructionTransform()
1322 MBB->insert(mi, NewMIs[1]); in tryInstructionTransform()
1332 MachineBasicBlock::iterator NewMI = NewMIs[1]; in tryInstructionTransform()
1388 mi = NewMIs[1]; in tryInstructionTransform()
1394 NewMIs[0]->eraseFromParent(); in tryInstructionTransform()
1395 NewMIs[1]->eraseFromParent(); in tryInstructionTransform()
1396 DistanceMap.erase(NewMIs[0]); in tryInstructionTransform()
[all …]
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| H A D | MachineLICM.cpp | 1266 SmallVector<MachineInstr *, 2> NewMIs; in ExtractHoistableLoad() local
1269 /*UnfoldStore=*/false, NewMIs); in ExtractHoistableLoad()
1274 assert(NewMIs.size() == 2 && in ExtractHoistableLoad()
1278 MBB->insert(Pos, NewMIs[0]); in ExtractHoistableLoad()
1279 MBB->insert(Pos, NewMIs[1]); in ExtractHoistableLoad()
1282 if (!IsLoopInvariantInst(*NewMIs[0]) || !IsProfitableToHoist(*NewMIs[0])) { in ExtractHoistableLoad()
1283 NewMIs[0]->eraseFromParent(); in ExtractHoistableLoad()
1284 NewMIs[1]->eraseFromParent(); in ExtractHoistableLoad()
1289 UpdateRegPressure(NewMIs[1]); in ExtractHoistableLoad()
1298 return NewMIs[0]; in ExtractHoistableLoad()
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| H A D | MachinePipeliner.cpp | 623 for (auto &KV : NewMIs) { in schedule()
652 for (auto &KV : NewMIs) in finishBlock()
654 NewMIs.clear(); in finishBlock()
2246 NewMIs[MI] = NewMI; in applyInstrChange()
2925 NewMIs[MI] = NewMI; in fixupRegisterOverlaps()
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| /llvm-project-15.0.7/llvm/lib/CodeGen/GlobalISel/ |
| H A D | Legalizer.cpp | 121 SmallVector<MachineInstr *, 4> NewMIs; member in __anon0a9913700111::LegalizerWorkListManager
141 LLVM_DEBUG(NewMIs.push_back(&MI)); in createdInstr()
147 for (const auto *MI : NewMIs) in printNewInstrs()
149 NewMIs.clear(); in printNewInstrs()
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| /llvm-project-15.0.7/llvm/lib/Target/X86/ |
| H A D | X86CmovConversion.cpp | 769 SmallVector<MachineInstr *, 4> NewMIs; in convertCmovInstsToBranches() local
772 /*UnfoldStore*/ false, NewMIs); in convertCmovInstsToBranches()
778 auto *NewCMOV = NewMIs.pop_back_val(); in convertCmovInstsToBranches()
788 for (auto *NewMI : NewMIs) { in convertCmovInstsToBranches()
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| H A D | X86SpeculativeLoadHardening.cpp | 911 SmallVector<MachineInstr *, 2> NewMIs; in unfoldCallAndJumpLoads() local
916 /*UnfoldStore*/ false, NewMIs); in unfoldCallAndJumpLoads()
921 for (auto *NewMI : NewMIs) in unfoldCallAndJumpLoads()
931 for (auto *NewMI : NewMIs) { in unfoldCallAndJumpLoads()
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| H A D | X86InstrInfo.h | 410 SmallVectorImpl<MachineInstr *> &NewMIs) const override;
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| H A D | X86InstrInfo.cpp | 6846 bool UnfoldStore, SmallVectorImpl<MachineInstr *> &NewMIs) const { in unfoldMemoryOperand()
6907 NewMIs.push_back(MIB); in unfoldMemoryOperand()
6912 MachineOperand &MO = NewMIs[0]->getOperand(i); in unfoldMemoryOperand()
6968 NewMIs.push_back(DataMI); in unfoldMemoryOperand()
6983 NewMIs.push_back(MIB); in unfoldMemoryOperand()
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| /llvm-project-15.0.7/llvm/lib/Target/PowerPC/ |
| H A D | PPCInstrInfo.h | 201 SmallVectorImpl<MachineInstr *> &NewMIs) const;
205 SmallVectorImpl<MachineInstr *> &NewMIs) const;
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| H A D | PPCInstrInfo.cpp | 1935 SmallVectorImpl<MachineInstr *> &NewMIs) const { in StoreRegToStackSlot()
1942 NewMIs.push_back(addFrameReference( in StoreRegToStackSlot()
1959 SmallVector<MachineInstr *, 4> NewMIs; in storeRegToStackSlotNoUpd() local
1963 for (unsigned i = 0, e = NewMIs.size(); i != e; ++i) in storeRegToStackSlotNoUpd()
1964 MBB.insert(MI, NewMIs[i]); in storeRegToStackSlotNoUpd()
1971 NewMIs.back()->addMemOperand(MF, MMO); in storeRegToStackSlotNoUpd()
2014 SmallVector<MachineInstr*, 4> NewMIs; in loadRegFromStackSlotNoUpd() local
2021 LoadRegFromStackSlot(MF, DL, DestReg, FrameIdx, RC, NewMIs); in loadRegFromStackSlotNoUpd()
2023 for (unsigned i = 0, e = NewMIs.size(); i != e; ++i) in loadRegFromStackSlotNoUpd()
2024 MBB.insert(MI, NewMIs[i]); in loadRegFromStackSlotNoUpd()
[all …]
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| /llvm-project-15.0.7/llvm/include/llvm/CodeGen/ |
| H A D | TargetInstrInfo.h | 959 SmallPtrSetImpl<MachineInstr *> &NewMIs,
1288 SmallVectorImpl<MachineInstr *> &NewMIs) const { in unfoldMemoryOperand() argument
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| H A D | MachinePipeliner.h | 155 DenseMap<MachineInstr*, MachineInstr *> NewMIs; variable
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| /llvm-project-15.0.7/llvm/lib/Target/ARM/ |
| H A D | ARMBaseInstrInfo.cpp | 274 std::vector<MachineInstr*> NewMIs; in convertToThreeAddress() local
289 NewMIs.push_back(MemMI); in convertToThreeAddress()
290 NewMIs.push_back(UpdateMI); in convertToThreeAddress()
307 NewMIs.push_back(UpdateMI); in convertToThreeAddress()
308 NewMIs.push_back(MemMI); in convertToThreeAddress()
326 MachineInstr *NewMI = NewMIs[j]; in convertToThreeAddress()
340 MBB.insert(MI, NewMIs[1]); in convertToThreeAddress()
341 MBB.insert(MI, NewMIs[0]); in convertToThreeAddress()
342 return NewMIs[0]; in convertToThreeAddress()
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| /llvm-project-15.0.7/llvm/lib/Target/Hexagon/ |
| H A D | HexagonBitSimplify.cpp | 1816 std::vector<MachineInstr*> NewMIs; member in __anon7ae497e50811::BitSimplification
2313 for (MachineInstr *In : NewMIs) { in genBitSplit()
2338 NewMIs.push_back(NewBS); in genBitSplit()
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