| /llvm-project-15.0.7/llvm/lib/Target/AVR/ |
| H A D | AVR.h | 73 inline bool isProgramMemoryAccess(MemSDNode const *N) { in isProgramMemoryAccess() 84 inline int getProgramMemoryBank(MemSDNode const *N) { in getProgramMemoryBank()
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| H A D | AVRISelDAGToDAG.cpp | 107 MVT VT = cast<MemSDNode>(Op)->getMemoryVT().getSimpleVT(); in SelectAddr()
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| /llvm-project-15.0.7/llvm/lib/Target/VE/ |
| H A D | VECustomDAG.cpp | 219 if (MemSDNode *MemN = dyn_cast<MemSDNode>(Op.getNode())) in getNodeChain() 231 if (auto *MemN = dyn_cast<MemSDNode>(Op.getNode())) in getMemoryPtr() 247 if (auto MemN = dyn_cast<MemSDNode>(Op)) in getIdiomaticVectorType() 305 if (isa<MemSDNode>(Op.getNode())) { in getLoadStoreStride()
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| /llvm-project-15.0.7/llvm/include/llvm/CodeGen/ |
| H A D | SelectionDAGNodes.h | 479 friend class MemSDNode; 497 friend class MemSDNode; 1260 class MemSDNode : public SDNode { 1429 class AtomicSDNode : public MemSDNode { 1433 : MemSDNode(Opc, Order, dl, VTL, MemVT, MMO) { 1485 class MemIntrinsicSDNode : public MemSDNode { 2291 class LSBaseSDNode : public MemSDNode { 2384 class VPBaseLoadStoreSDNode : public MemSDNode { 2592 class MaskedLoadStoreSDNode : public MemSDNode { 2699 class VPGatherScatterSDNode : public MemSDNode { [all …]
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| /llvm-project-15.0.7/llvm/lib/Target/AMDGPU/ |
| H A D | R600ISelDAGToDAG.cpp | 24 bool isConstantLoad(const MemSDNode *N, int cbID) const; 54 bool R600DAGToDAGISel::isConstantLoad(const MemSDNode *N, int CbId) const { in isConstantLoad()
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| H A D | SIISelLowering.h | 114 SDValue adjustLoadValueType(unsigned Opcode, MemSDNode *M, 118 SDValue lowerIntrinsicLoad(MemSDNode *M, bool IsFormat, SelectionDAG &DAG, 173 SDValue performMemSDNodeCombine(MemSDNode *N, DAGCombinerInfo &DCI) const; 253 ArrayRef<SDValue> Ops, MemSDNode *M) const; 258 MemSDNode *M) const;
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| H A D | SIISelLowering.cpp | 7208 MemSDNode *M = cast<MemSDNode>(Op); in LowerINTRINSIC_W_CHAIN() 7261 MemSDNode *M = cast<MemSDNode>(Op); in LowerINTRINSIC_W_CHAIN() 7277 MemSDNode *M = cast<MemSDNode>(Op); in LowerINTRINSIC_W_CHAIN() 7383 MemSDNode *M = cast<MemSDNode>(Op); in LowerINTRINSIC_W_CHAIN() 7411 MemSDNode *M = cast<MemSDNode>(Op); in LowerINTRINSIC_W_CHAIN() 7435 MemSDNode *M = cast<MemSDNode>(Op); in LowerINTRINSIC_W_CHAIN() 7676 MemSDNode *M = cast<MemSDNode>(Op); in LowerINTRINSIC_W_CHAIN() 7819 MemSDNode *M = cast<MemSDNode>(Op); in LowerINTRINSIC_W_CHAIN() 8042 MemSDNode *M = cast<MemSDNode>(Op); in LowerINTRINSIC_VOID() 8067 MemSDNode *M = cast<MemSDNode>(Op); in LowerINTRINSIC_VOID() [all …]
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| H A D | R600Instructions.td | 290 …[{return cast<MemSDNode>(N)->getAddressSpace() == AMDGPUAS::GLOBAL_ADDRESS && (SDValue(N, 0).use_e… 295 …[{return cast<MemSDNode>(N)->getAddressSpace() == AMDGPUAS::GLOBAL_ADDRESS && (!SDValue(N, 0).use_… 299 return cast<MemSDNode>(N)->getAddressSpace() == AMDGPUAS::GLOBAL_ADDRESS; 341 const MemSDNode *LD = cast<MemSDNode>(N); 354 const MemSDNode *LD = cast<MemSDNode>(N);
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| H A D | AMDGPUISelDAGToDAG.cpp | 424 unsigned AS = cast<MemSDNode>(N)->getAddressSpace(); in glueCopyToM0LDSInit() 1519 static MemSDNode* findMemSDNode(SDNode *N) { in findMemSDNode() 1521 if (MemSDNode *MN = dyn_cast<MemSDNode>(N)) in findMemSDNode() 1525 if (MemSDNode *MN = in findMemSDNode() 1526 dyn_cast<MemSDNode>(AMDGPUTargetLowering::stripBitcast(V))) in findMemSDNode()
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| H A D | AMDGPUISelLowering.cpp | 539 if (isa<MemSDNode>(N)) in hasSourceMods() 649 MemSDNode *MN = cast<MemSDNode>(N); in shouldReduceLoadWidth() 2823 if (MemSDNode *M = dyn_cast<MemSDNode>(U)) { in hasVolatileUser()
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| /llvm-project-15.0.7/llvm/lib/Target/NVPTX/ |
| H A D | NVPTXISelDAGToDAG.cpp | 656 static unsigned int getCodeAddrSpace(MemSDNode *N) { in getCodeAddrSpace() 840 MemSDNode *LD = cast<MemSDNode>(N); in tryLoad() 995 MemSDNode *MemSD = cast<MemSDNode>(N); in tryLoadVector() 1230 MemSDNode *Mem; in tryLDGLDU() 1255 Mem = cast<MemSDNode>(N); in tryLDGLDU() 1701 MemSDNode *ST = cast<MemSDNode>(N); in tryStore() 1874 MemSDNode *MemSD = cast<MemSDNode>(N); in tryStoreVector() 2095 MemSDNode *Mem = cast<MemSDNode>(Node); in tryLoadParam() 2172 MemSDNode *Mem = cast<MemSDNode>(N); in tryStoreRetval() 2244 MemSDNode *Mem = cast<MemSDNode>(N); in tryStoreParam() [all …]
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| H A D | NVPTXISelLowering.cpp | 2359 MemSDNode *MemSD = cast<MemSDNode>(N); in LowerSTOREVector() 4642 MemSDNode *Mem = dyn_cast<MemSDNode>(Val); in PerformANDCombine()
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| /llvm-project-15.0.7/llvm/lib/Target/Mips/ |
| H A D | MipsISelDAGToDAG.cpp | 299 cast<MemSDNode>(Node)->getMemoryVT().getSizeInBits() / 8 <= in Select() 300 cast<MemSDNode>(Node)->getAlignment()) && in Select()
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| /llvm-project-15.0.7/llvm/test/TableGen/ |
| H A D | address-space-patfrags.td | 54 // SDAG-NEXT: unsigned AddrSpace = cast<MemSDNode>(N)->getAddressSpace(); 76 // SDAG-NEXT: if (cast<MemSDNode>(N)->getAlign() < Align(2))
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| H A D | HasNoUse.td | 15 // SDAG-NEXT: if (cast<MemSDNode>(N)->getMemoryVT() != MVT::i32) return false;
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| /llvm-project-15.0.7/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelDAGToDAG.cpp | 325 if (auto *MemOp = dyn_cast<MemSDNode>(Node)) in selectVLSEG() 369 if (auto *MemOp = dyn_cast<MemSDNode>(Node)) in selectVLSEGFF() 424 if (auto *MemOp = dyn_cast<MemSDNode>(Node)) in selectVLXSEG() 464 if (auto *MemOp = dyn_cast<MemSDNode>(Node)) in selectVSSEG() 506 if (auto *MemOp = dyn_cast<MemSDNode>(Node)) in selectVSXSEG() 1323 if (auto *MemOp = dyn_cast<MemSDNode>(Node)) in Select() 1365 if (auto *MemOp = dyn_cast<MemSDNode>(Node)) in Select() 1398 if (auto *MemOp = dyn_cast<MemSDNode>(Node)) in Select() 1523 if (auto *MemOp = dyn_cast<MemSDNode>(Node)) in Select() 1554 if (auto *MemOp = dyn_cast<MemSDNode>(Node)) in Select() [all …]
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| /llvm-project-15.0.7/llvm/lib/Target/Hexagon/ |
| H A D | HexagonISelDAGToDAG.h | 134 bool isAlignedMemNode(const MemSDNode *N) const;
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| H A D | HexagonPatternsHVX.td | 95 return isAlignedMemNode(cast<MemSDNode>(N)); 99 return !isAlignedMemNode(cast<MemSDNode>(N)); 103 return isAlignedMemNode(cast<MemSDNode>(N)); 107 return !isAlignedMemNode(cast<MemSDNode>(N));
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| H A D | HexagonISelDAGToDAG.cpp | 973 SDValue LDBasePtr = cast<MemSDNode>(SYNode)->getBasePtr(); in isMemOPCandidate() 974 SDValue STBasePtr = cast<MemSDNode>(UUse)->getBasePtr(); in isMemOPCandidate() 1583 bool HexagonDAGToDAGISel::isAlignedMemNode(const MemSDNode *N) const { in isAlignedMemNode() 2259 SDValue BasePtr = cast<MemSDNode>(N)->getBasePtr(); in rebalanceAddressTrees()
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| /llvm-project-15.0.7/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | LegalizeTypes.h | 837 void IncrementPointer(MemSDNode *N, EVT MemVT, MachinePointerInfo &MPI, 866 void SplitVecRes_Gather(MemSDNode *VPGT, SDValue &Lo, SDValue &Hi, 895 SDValue SplitVecOp_Scatter(MemSDNode *N, unsigned OpNo); 896 SDValue SplitVecOp_Gather(MemSDNode *MGT, unsigned OpNo);
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| H A D | SelectionDAGDumper.cpp | 799 } else if (const MemSDNode *M = dyn_cast<MemSDNode>(this)) { in print_details()
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| H A D | LegalizeVectorTypes.cpp | 983 SplitVecRes_Gather(cast<MemSDNode>(N), Lo, Hi, /*SplitSETCC*/ true); in SplitVectorResult() 1142 void DAGTypeLegalizer::IncrementPointer(MemSDNode *N, EVT MemVT, in IncrementPointer() 2008 void DAGTypeLegalizer::SplitVecRes_Gather(MemSDNode *N, SDValue &Lo, in SplitVecRes_Gather() 2715 Res = SplitVecOp_Scatter(cast<MemSDNode>(N), OpNo); in SplitVectorOperand() 2719 Res = SplitVecOp_Gather(cast<MemSDNode>(N), OpNo); in SplitVectorOperand() 3101 SDValue DAGTypeLegalizer::SplitVecOp_Gather(MemSDNode *N, unsigned OpNo) { in SplitVecOp_Gather() 3268 SDValue DAGTypeLegalizer::SplitVecOp_Scatter(MemSDNode *N, unsigned OpNo) { in SplitVecOp_Scatter()
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| /llvm-project-15.0.7/llvm/lib/Target/MSP430/ |
| H A D | MSP430ISelDAGToDAG.cpp | 358 MachineMemOperand *MemRef = cast<MemSDNode>(N1)->getMemOperand(); in tryIndexedBinOp()
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| /llvm-project-15.0.7/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelDAGToDAG.cpp | 571 if (!isa<MemSDNode>(*UI)) in isWorthFoldingSHL() 573 if (!isa<MemSDNode>(*UII)) in isWorthFoldingSHL() 935 if (isStrongerThanMonotonic(cast<MemSDNode>(Use)->getSuccessOrdering())) in isWorthFoldingADDlow() 1158 if (!isa<MemSDNode>(*UI)) in SelectAddrModeWRO() 1242 if (!isa<MemSDNode>(*UI)) in SelectAddrModeXRO() 1460 MachineMemOperand *MemOp = cast<MemSDNode>(N)->getMemOperand(); in tryIndexedLoad() 3185 EVT MemTy = cast<MemSDNode>(N)->getMemoryVT(); in SelectCMP_SWAP() 3208 MachineMemOperand *MemOp = cast<MemSDNode>(N)->getMemOperand(); in SelectCMP_SWAP() 5123 if (isa<MemSDNode>(Root)) in getMemVTFromNode() 5124 return cast<MemSDNode>(Root)->getMemoryVT(); in getMemVTFromNode()
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| /llvm-project-15.0.7/llvm/lib/Target/X86/ |
| H A D | X86ISelDAGToDAG.cpp | 222 bool selectVectorAddr(MemSDNode *Parent, SDValue BasePtr, SDValue IndexOp, 844 if (isa<MemSDNode>(Chain.getNode()) && in isCalleeLoad() 845 cast<MemSDNode>(Chain.getNode())->writeMem()) in isCalleeLoad() 1008 auto *MemNode = cast<MemSDNode>(N); in PreprocessISelDAG() 2603 bool X86DAGToDAGISel::selectVectorAddr(MemSDNode *Parent, SDValue BasePtr, in selectVectorAddr() 2654 cast<MemSDNode>(Parent)->getPointerInfo().getAddrSpace(); in selectAddr() 4288 CurDAG->setNodeMemRefs(MNode, {cast<MemSDNode>(C)->getMemOperand()}); in matchVPTERNLOG() 4669 CurDAG->setNodeMemRefs(CNode, {cast<MemSDNode>(Src1)->getMemOperand()}); in tryVPTESTM() 6156 CurDAG->setNodeMemRefs(Res, cast<MemSDNode>(Node)->getMemOperand()); in Select()
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