| /llvm-project-15.0.7/llvm/test/TableGen/ |
| H A D | GlobalISelEmitterSkippedPatterns.td | 8 let MIOperandInfo = (ops i32imm, i32imm); 15 let MIOperandInfo = (ops GPR32, GPR32);
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| H A D | get-operand-type-no-expand.td | 16 let MIOperandInfo = (ops i8imm, i32imm);
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| H A D | VarLenDecoder.td | 18 let MIOperandInfo = sub_ops;
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| H A D | VarLenEncoder.td | 20 let MIOperandInfo = sub_ops;
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| /llvm-project-15.0.7/llvm/utils/TableGen/ |
| H A D | InstrDocsEmitter.cpp | 162 cast<DefInit>(Op.MIOperandInfo->getArg(SubOpIdx))->getDef(); in EmitInstrDocs() 163 StringRef SubOpName = Op.MIOperandInfo->getArgNameStr(SubOpIdx); in EmitInstrDocs()
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| H A D | CodeGenInstruction.h | 114 DagInit *MIOperandInfo; member 125 MIOperandInfo(MIOI) {} in OperandInfo()
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| H A D | DecoderEmitter.cpp | 1876 if (Op.MIOperandInfo && Op.MIOperandInfo->getNumArgs() > 0) in parseVarLenInstOperand() 1877 for (auto *Arg : Op.MIOperandInfo->getArgs()) in parseVarLenInstOperand() 2079 if (Decoder == "" && CGI.Operands[SO.first].MIOperandInfo && in populateInstruction() 2080 CGI.Operands[SO.first].MIOperandInfo->getNumArgs()) { in populateInstruction() 2081 Init *Arg = CGI.Operands[SO.first].MIOperandInfo->getArg(SO.second); in populateInstruction() 2121 if (CGI.Operands[SO.first].MIOperandInfo && in populateInstruction() 2122 CGI.Operands[SO.first].MIOperandInfo->getNumArgs() > 1 && String && in populateInstruction()
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| H A D | CodeGenInstruction.cpp | 215 DagInit *MIOpInfo = OperandList[OpIdx].MIOperandInfo; in ParseOperandName() 745 DagInit *MIOI = ResultInst->Operands[i].MIOperandInfo; in CodeGenInstAlias() 764 DagInit *MIOI = ResultInst->Operands[i].MIOperandInfo; in CodeGenInstAlias()
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| H A D | InstrInfoEmitter.cpp | 142 DagInit *MIOI = Op.MIOperandInfo; in GetOperandInfo() 404 const DagInit *MIOI = Op.MIOperandInfo; in emitOperandTypeMappings() 511 auto *MIOI = Op.MIOperandInfo; in emitLogicalOperandSizeMappings()
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| /llvm-project-15.0.7/llvm/lib/Target/PowerPC/ |
| H A D | PPCRegisterInfo.td | 801 let MIOperandInfo = (ops dispRI34:$imm, ptr_rc_nor0:$reg); 809 let MIOperandInfo = (ops dispRI34:$imm, immZero:$reg); 874 let MIOperandInfo = (ops dispRI:$imm, ptr_rc_nor0:$reg); 886 let MIOperandInfo = (ops dispRIX:$imm, ptr_rc_nor0:$reg); 901 let MIOperandInfo = (ops dispRIX16:$imm, ptr_rc_nor0:$reg); 908 let MIOperandInfo = (ops dispSPE8:$imm, ptr_rc_nor0:$reg); 915 let MIOperandInfo = (ops dispSPE4:$imm, ptr_rc_nor0:$reg); 922 let MIOperandInfo = (ops dispSPE2:$imm, ptr_rc_nor0:$reg); 932 let MIOperandInfo = (ops ptr_rc_nor0:$ptrreg); 946 let MIOperandInfo = (ops calltarget:$func, tlsgd32:$sym); [all …]
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| /llvm-project-15.0.7/llvm/lib/Target/ARC/ |
| H A D | ARCInstrFormats.td | 39 let MIOperandInfo = (ops i32imm, i32imm); 43 let MIOperandInfo = (ops GPR32:$B, immS<9>:$S9); 49 let MIOperandInfo = (ops GPR32:$B, i32imm:$LImm); 969 let MIOperandInfo = (ops i32imm, i32imm); 974 let MIOperandInfo = (ops i32imm); 979 let MIOperandInfo = (ops i32imm);
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| /llvm-project-15.0.7/llvm/lib/Target/SystemZ/ |
| H A D | SystemZOperands.td | 85 let MIOperandInfo = (ops !cast<Operand>(self)); 112 let MIOperandInfo = operands; 569 let MIOperandInfo = (ops brtarget16:$func, tlssym:$sym); 574 let MIOperandInfo = (ops brtarget32:$func, tlssym:$sym);
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| /llvm-project-15.0.7/llvm/lib/Target/Mips/ |
| H A D | MicroMipsInstrInfo.td | 68 let MIOperandInfo = (ops ptr_gpr16mm_rc, simm4); 101 let MIOperandInfo = (ops ptr_sp_rc:$base, simm5:$offset); 109 let MIOperandInfo = (ops ptr_gp_rc:$base, simm7_lsl2:$offset); 117 let MIOperandInfo = (ops ptr_rc, simm9); 125 let MIOperandInfo = (ops GPR32, simm11); 133 let MIOperandInfo = (ops ptr_rc, simm12); 141 let MIOperandInfo = (ops ptr_rc, simm16); 158 let MIOperandInfo = (ops ptr_sp_rc, uimm8);
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| H A D | MipsInstrInfo.td | 1128 let MIOperandInfo = (ops ptr_rc, simm16); 1139 let MIOperandInfo = (ops ptr_rc, simm10); 1148 let MIOperandInfo = (ops ptr_rc, simm9); 1156 let MIOperandInfo = (ops ptr_rc, !cast<Operand>("simm" # I)); 1162 let MIOperandInfo = (ops ptr_rc, !cast<Operand>("simm10_lsl" # I)); 1173 let MIOperandInfo = (ops ptr_rc, simm16); 1179 let MIOperandInfo = (ops ptr_rc);
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| /llvm-project-15.0.7/llvm/lib/Target/CSKY/ |
| H A D | CSKYInstrFormatsF1.td | 221 let MIOperandInfo = (ops GPR, i32imm); 227 let MIOperandInfo = (ops GPR, GPR, i32imm);
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| H A D | CSKYInstrInfoF1.td | 18 let MIOperandInfo = (ops sFPR32, uimm5); 26 let MIOperandInfo = (ops sFPR64, uimm5);
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| H A D | CSKYInstrInfoF2.td | 18 let MIOperandInfo = (ops FPR32, uimm5); 26 let MIOperandInfo = (ops FPR64, uimm5);
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| /llvm-project-15.0.7/llvm/lib/Target/ARM/ |
| H A D | ARMInstrThumb.td | 191 let MIOperandInfo = (ops tGPR:$base, tGPR:$offsreg); 204 let MIOperandInfo = (ops tGPR:$base, tGPR:$offsreg); 220 let MIOperandInfo = (ops tGPR:$base, tGPR:$offsreg); 228 let MIOperandInfo = (ops tGPR:$base, tGPR:$offsreg); 236 let MIOperandInfo = (ops tGPR:$base, tGPR:$offsreg); 248 let MIOperandInfo = (ops tGPR:$base, i32imm:$offsimm); 260 let MIOperandInfo = (ops tGPR:$base, i32imm:$offsimm); 272 let MIOperandInfo = (ops tGPR:$base, i32imm:$offsimm); 286 let MIOperandInfo = (ops GPR:$base, i32imm:$offsimm);
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| H A D | ARMInstrInfo.td | 716 let MIOperandInfo = (ops i32imm); 737 let MIOperandInfo = (ops i32imm); 775 let MIOperandInfo = (ops GPR, i32imm); 797 let MIOperandInfo = (ops GPR, i32imm); 1138 let MIOperandInfo = (ops i32imm); 1150 let MIOperandInfo = (ops i32imm); 1229 let MIOperandInfo = (ops GPR, i32imm); 1289 let MIOperandInfo = (ops GPR); 1458 let MIOperandInfo = (ops GPR, i32imm); 1469 let MIOperandInfo = (ops GPR:$base); [all …]
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| H A D | ARMInstrThumb2.td | 63 let MIOperandInfo = (ops rGPR, i32imm); 178 let MIOperandInfo = (ops GPRnopc:$base); 188 let MIOperandInfo = (ops rGPR:$base); 199 let MIOperandInfo = (ops GPR:$base, i32imm:$offsimm); 231 let MIOperandInfo = (ops GPR:$base, i32imm:$offsimm); 245 let MIOperandInfo = (ops GPR:$base, i32imm:$offsimm); 258 let MIOperandInfo = (ops GPR:$base, i32imm:$offsimm); 284 let MIOperandInfo = (ops GPR:$base, i32imm:$offsimm); 308 let MIOperandInfo = (ops GPRnopc:$base, i32imm:$offsimm); 359 let MIOperandInfo = (ops GPR:$Rn, rGPR:$Rm); [all …]
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| /llvm-project-15.0.7/llvm/lib/Target/Lanai/ |
| H A D | LanaiInstrInfo.td | 192 let MIOperandInfo = (ops GPR:$base, i32lo16s:$offset, AluOp:$Opcode); 204 let MIOperandInfo = (ops GPR:$Op1, GPR:$Op2, AluOp:$Opcode); 214 let MIOperandInfo = (ops i32lo21:$offset); 226 let MIOperandInfo = (ops GPR:$base, imm10:$offset, AluOp:$Opcode);
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| /llvm-project-15.0.7/llvm/lib/Target/VE/ |
| H A D | VEInstrInfo.td | 328 let MIOperandInfo = (ops ptr_rc, ptr_rc, i64imm); 333 let MIOperandInfo = (ops ptr_rc, i32imm, i64imm); 338 let MIOperandInfo = (ops i32imm /* = 0 */, ptr_rc, i64imm); 343 let MIOperandInfo = (ops i32imm /* = 0 */, i32imm, i64imm); 361 let MIOperandInfo = (ops ptr_rc, i32imm); 366 let MIOperandInfo = (ops i32imm /* = 0 */, i32imm); 373 let MIOperandInfo = (ops ptr_rc, i32imm); 378 let MIOperandInfo = (ops i32imm /* = 0 */, i32imm); 385 let MIOperandInfo = (ops ptr_rc, i32imm); 390 let MIOperandInfo = (ops i32imm /* = 0 */, i32imm);
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| /llvm-project-15.0.7/llvm/lib/Target/MSP430/ |
| H A D | MSP430InstrInfo.td | 80 let MIOperandInfo = (ops GR16, i16imm); 88 let MIOperandInfo = (ops GR16, i16imm); 101 let MIOperandInfo = (ops GR16); 113 let MIOperandInfo = (ops GR16);
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| /llvm-project-15.0.7/llvm/lib/Target/AVR/ |
| H A D | AVRInstrInfo.td | 176 let MIOperandInfo = (ops PTRDISPREGS, i16imm); 187 let MIOperandInfo = (ops GPRSP, i16imm); 249 let MIOperandInfo = (ops PTRREGS); 259 let MIOperandInfo = (ops PTRDISPREGS);
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| /llvm-project-15.0.7/llvm/lib/Target/AMDGPU/ |
| H A D | R600Instructions.td | 30 let MIOperandInfo = (ops R600_TReg32_X:$ptr, i32imm:$index); 35 let MIOperandInfo = (ops R600_Reg32:$ptr, R600_Reg32:$index); 74 let MIOperandInfo = (ops R600_Reg32:$ptr, i32imm:$index);
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