| /llvm-project-15.0.7/llvm/lib/CodeGen/ |
| H A D | ExpandMemCmp.cpp | 339 const LoadPair Loads = in emitLoadCompareByteBlock() local 342 Value *Diff = Builder.CreateSub(Loads.Lhs, Loads.Rhs); in emitLoadCompareByteBlock() 395 const LoadPair Loads = getLoadPair( in getCompareLoadPairs() local 402 Diff = Builder.CreateXor(Loads.Lhs, Loads.Rhs); in getCompareLoadPairs() 407 Cmp = Builder.CreateICmpNE(Loads.Lhs, Loads.Rhs); in getCompareLoadPairs() 488 const LoadPair Loads = in emitLoadCompareBlock() local 499 Value *Cmp = Builder.CreateICmp(ICmpInst::ICMP_EQ, Loads.Lhs, Loads.Rhs); in emitLoadCompareBlock() 601 const LoadPair Loads = in getMemCmpOneBlock() local 604 return Builder.CreateSub(Loads.Lhs, Loads.Rhs); in getMemCmpOneBlock() 615 Value *CmpUGT = Builder.CreateICmpUGT(Loads.Lhs, Loads.Rhs); in getMemCmpOneBlock() [all …]
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| H A D | ScheduleDAGInstrs.cpp | 751 Value2SUsMap Stores, Loads(1 /*TrueMemOrderLatency*/); in buildSchedGraph() local 895 addBarrierChain(Loads); in buildSchedGraph() 939 addChainDependencies(SU, Loads); in buildSchedGraph() 953 addChainDependencies(SU, (ThisMayAlias ? Loads : NonAliasLoads), V); in buildSchedGraph() 966 addChainDependencies(SU, Loads, UnknownValue); in buildSchedGraph() 975 Loads.insert(SU, UnknownValue); in buildSchedGraph() 986 (ThisMayAlias ? Loads : NonAliasLoads).insert(SU, V); in buildSchedGraph() 994 if (Stores.size() + Loads.size() >= HugeRegion) { in buildSchedGraph() 996 reduceHugeMemNodeMaps(Stores, Loads, getReductionSize()); in buildSchedGraph()
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| H A D | WinEHPrepare.cpp | 83 DenseMap<BasicBlock *, Value *> &Loads, Function &F); 1105 DenseMap<BasicBlock *, Value *> Loads; in insertPHILoads() local 1113 replaceUseWithLoad(PN, U, SpillSlot, Loads, F); in insertPHILoads() 1174 DenseMap<BasicBlock *, Value *> &Loads, in replaceUseWithLoad() argument 1234 Value *&Load = Loads[IncomingBlock]; in replaceUseWithLoad()
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| /llvm-project-15.0.7/llvm/lib/Target/X86/ |
| H A D | X86PreAMXConfig.cpp | 109 bool checkVolatileModel(SmallSet<Value *, 4> &Loads, IntrinsicInst *Store, 206 bool X86PreAMXConfig::checkVolatileModel(SmallSet<Value *, 4> &Loads, in checkVolatileModel() argument 213 return (Loads.size() == 1) && Loads.contains(ST); in checkVolatileModel() 219 if (!Loads.erase(Op)) in checkVolatileModel() 225 return Loads.empty() && (ST == cast<Value>(KeyAMX)); in checkVolatileModel() 264 SmallSet<Value *, 4> Loads; in getShapesAndConfigPosEnd() local 274 Loads.insert(II); in getShapesAndConfigPosEnd() 276 if (!checkVolatileModel(Loads, II, KeyAMX)) in getShapesAndConfigPosEnd()
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| /llvm-project-15.0.7/llvm/lib/Target/ARM/ |
| H A D | ARMParallelDSP.cpp | 200 SmallVector<LoadInst*, 4> Loads; member in __anonea9789b90111::WidenedLoad 205 append_range(Loads, Lds); in WidenedLoad() 343 SmallVector<LoadInst*, 8> Loads; in RecordMemoryOps() local 358 Loads.push_back(Ld); in RecordMemoryOps() 361 if (Loads.empty() || Loads.size() > NumLoadLimit) in RecordMemoryOps() 371 for (auto Read : Loads) { in RecordMemoryOps() 404 for (auto *Base : Loads) { in RecordMemoryOps() 405 for (auto *Offset : Loads) { in RecordMemoryOps() 733 LoadInst* ARMParallelDSP::CreateWideLoad(MemInstList &Loads, in CreateWideLoad() argument 737 LoadInst *Base = Loads[0]; in CreateWideLoad() [all …]
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| H A D | ARMSelectionDAGInfo.cpp | 205 SDValue Loads[6]; in EmitTargetCodeForMemcpy() local 260 Loads[i] = DAG.getLoad(VT, dl, Chain, in EmitTargetCodeForMemcpy() 264 TFOps[i] = Loads[i].getValue(1); in EmitTargetCodeForMemcpy() 277 TFOps[i] = DAG.getStore(Chain, dl, Loads[i], in EmitTargetCodeForMemcpy()
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| H A D | ARMScheduleM4.td | 47 // Loads, MAC's and DIV all get a higher latency of 2 106 // Loads still take 2 cycles.
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| /llvm-project-15.0.7/llvm/lib/Transforms/Utils/ |
| H A D | DemoteRegToStack.cpp | 68 DenseMap<BasicBlock*, Value*> Loads; in DemoteRegToStack() local 71 Value *&V = Loads[PN->getIncomingBlock(i)]; in DemoteRegToStack()
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| /llvm-project-15.0.7/llvm/lib/Target/NVPTX/ |
| H A D | NVPTXLowerArgs.cpp | 266 SmallVector<Load> Loads; in adjustByValArgAlignment() local 276 Loads.push_back({I, Ctx.Offset}); in adjustByValArgAlignment() 305 for (Load &CurLoad : Loads) { in adjustByValArgAlignment()
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| /llvm-project-15.0.7/llvm/test/Analysis/ValueTracking/ |
| H A D | memory-dereferenceable.ll | 24 ; Loads from sret arguments 88 ; Loads from aligned arguments 96 ; Loads from GEPs 138 ; Loads from aligned allocas 208 ; Loads from byval arguments
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| /llvm-project-15.0.7/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | ScheduleDAGSDNodes.cpp | 268 SmallVector<SDNode*, 4> Loads; in ClusterNeighboringLoads() local 272 Loads.push_back(BaseLoad); in ClusterNeighboringLoads() 278 Loads.push_back(Load); in ClusterNeighboringLoads() 287 SDNode *Lead = Loads[0]; in ClusterNeighboringLoads() 291 for (unsigned I = 1, E = Loads.size(); I != E; ++I) { in ClusterNeighboringLoads() 293 SDNode *Load = Loads[I]; in ClusterNeighboringLoads()
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| /llvm-project-15.0.7/llvm/lib/Analysis/ |
| H A D | AliasAnalysisEvaluator.cpp | 114 SetVector<Value *> Loads; in runInternal() local 120 Loads.insert(LI); in runInternal() 164 for (Value *Load : Loads) { in runInternal()
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| H A D | CMakeLists.txt | 87 Loads.cpp
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| /llvm-project-15.0.7/llvm/lib/Transforms/Instrumentation/ |
| H A D | SanitizerCoverage.cpp | 224 void InjectTraceForLoadsAndStores(Function &F, ArrayRef<LoadInst *> Loads, 630 SmallVector<LoadInst *, 8> Loads; in instrumentFunction() local 663 Loads.push_back(LI); in instrumentFunction() 680 InjectTraceForLoadsAndStores(F, Loads, Stores); in instrumentFunction() 865 Function &, ArrayRef<LoadInst *> Loads, ArrayRef<StoreInst *> Stores) { in InjectTraceForLoadsAndStores() argument 877 for (auto LI : Loads) { in InjectTraceForLoadsAndStores()
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| /llvm-project-15.0.7/llvm/test/CodeGen/PowerPC/ |
| H A D | pr35688.ll | 6 ; Loads and stores to undef are treated as non-aliasing.
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| /llvm-project-15.0.7/polly/lib/Transform/ |
| H A D | ZoneAlgo.cpp | 326 auto Loads = makeEmptyUnionMap(); in collectIncompatibleElts() local 357 Loads = Loads.unite(AccRel); in collectIncompatibleElts() 364 if (Stmt->isRegionStmt() && !Loads.is_disjoint(AccRel)) { in collectIncompatibleElts()
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| /llvm-project-15.0.7/llvm/lib/Transforms/IPO/ |
| H A D | GlobalOpt.cpp | 1326 SmallVector<LoadInst *, 4> Loads; in isPointerValueDeadOnEntryToFunction() local 1332 Loads.push_back(LI); in isPointerValueDeadOnEntryToFunction() 1347 Loads.push_back(LI); in isPointerValueDeadOnEntryToFunction() 1370 if (Loads.size() * Stores.size() > Threshold) in isPointerValueDeadOnEntryToFunction() 1373 for (auto *L : Loads) { in isPointerValueDeadOnEntryToFunction() 1459 SmallVector<LoadInst *> Loads; in forwardStoredOnceStore() local 1464 Loads.push_back(LI); in forwardStoredOnceStore() 1469 if (!Loads.empty()) { in forwardStoredOnceStore() 1471 for (auto *LI : Loads) { in forwardStoredOnceStore()
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| H A D | ArgumentPromotion.cpp | 573 SmallVector<LoadInst *, 16> Loads; in findArgParts() local 598 Loads.push_back(LI); in findArgParts() 661 for (LoadInst *Load : Loads) { in findArgParts()
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| /llvm-project-15.0.7/llvm/test/Analysis/CostModel/SystemZ/ |
| H A D | memop-folding-int-arith.ll | 48 ; Loads with multiple uses are *not* folded 157 ; Loads with multiple uses are *not* folded 227 ; Loads with multiple uses are *not* folded 331 ; Loads with multiple uses are *not* folded 426 ; Loads with multiple uses are *not* folded 474 ; Loads with multiple uses are *not* folded 519 ; Loads with multiple uses are *not* folded 557 ; Loads with multiple uses are *not* folded 597 ; Loads with multiple uses are *not* folded 641 ; Loads with multiple uses are *not* folded [all …]
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| /llvm-project-15.0.7/llvm/utils/gn/secondary/llvm/lib/Analysis/ |
| H A D | BUILD.gn | 76 "Loads.cpp",
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| /llvm-project-15.0.7/llvm/lib/Target/RISCV/ |
| H A D | RISCVScheduleV.td | 12 // 7. Vector Loads and Stores 51 // 7.7. Vector Unit-stride Fault-Only-First Loads 272 // 7. Vector Loads and Stores 496 // 7. Vector Loads and Stores 555 // Vector Segment Loads and Stores 690 // 7. Vector Loads and Stores
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| /llvm-project-15.0.7/llvm/test/CodeGen/SystemZ/ |
| H A D | int-move-10.ll | 111 ;;; Loads 177 ;;; Loads folded into compare instructions
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| /llvm-project-15.0.7/llvm/test/CodeGen/X86/ |
| H A D | hipe-cc64.ll | 59 ; Loads are reading values just writen from corresponding register and are therefore noops.
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| /llvm-project-15.0.7/llvm/lib/Target/AArch64/ |
| H A D | AArch64SMEInstrInfo.td | 80 // Loads and stores
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| /llvm-project-15.0.7/llvm/test/Transforms/GVNHoist/ |
| H A D | ld_hoist_st_sink.ll | 2 ; Loads are hoisted into the header. Stores sunks into the footer.
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