| /llvm-project-15.0.7/llvm/lib/CodeGen/ |
| H A D | ExecutionDomainFix.cpp | 74 if (LiveRegs[rx] == dv) in setLiveReg()
76 if (LiveRegs[rx]) in setLiveReg()
77 release(LiveRegs[rx]); in setLiveReg()
84 if (!LiveRegs[rx]) in kill()
87 release(LiveRegs[rx]); in kill()
88 LiveRegs[rx] = nullptr; in kill()
159 if (LiveRegs.empty()) in enterBasicBlock()
219 LiveRegs.clear(); in leaveBasicBlock()
289 if (!LiveRegs.empty()) in visitSoftInstr()
387 if (!LiveRegs[rx] || (mo.isDef() && LiveRegs[rx] != dv)) { in visitSoftInstr()
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| H A D | LivePhysRegs.cpp | 34 while (LRI != LiveRegs.end()) { in removeRegsInMask()
38 LRI = LiveRegs.erase(LRI); in removeRegsInMask()
143 if (LiveRegs.count(Reg)) in available()
148 if (LiveRegs.count(*R)) in available()
178 LiveRegs.addReg(*CSR); in addCalleeSavedRegs()
253 LiveRegs.init(TRI); in computeLiveIns()
288 LivePhysRegs LiveRegs; in recomputeLivenessFlags() local
289 LiveRegs.init(TRI); in recomputeLivenessFlags()
320 LiveRegs.removeDefs(MI); in recomputeLivenessFlags()
337 LiveRegs.addUses(MI); in recomputeLivenessFlags()
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| H A D | ReachingDefAnalysis.cpp | 62 if (LiveRegs.empty()) in enterBasicBlock()
73 LiveRegs[*Unit] = -1; in enterBasicBlock()
94 LiveRegs[Unit] = std::max(LiveRegs[Unit], Incoming[Unit]); in enterBasicBlock()
118 LiveRegs.clear(); in leaveBasicBlock()
227 LiveRegs.clear(); in releaseMemory()
425 LivePhysRegs LiveRegs(*TRI); in getLiveOuts() local
426 LiveRegs.addLiveOuts(*MBB); in getLiveOuts()
473 LivePhysRegs LiveRegs(*TRI); in isRegUsedAfter() local
474 LiveRegs.addLiveOuts(*MBB); in isRegUsedAfter()
509 LiveRegs.addLiveOuts(*MBB); in isReachingDefLiveOut()
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| H A D | StackMapLivenessAnalysis.cpp | 52 LivePhysRegs LiveRegs; member in __anonc74b2c650111::StackMapLiveness
128 LiveRegs.init(*TRI); in calculateLiveness()
130 LiveRegs.addLiveOutsNoPristines(MBB); in calculateLiveness()
141 LLVM_DEBUG(dbgs() << " " << LiveRegs << " " << MI); in calculateLiveness()
142 LiveRegs.stepBackward(MI); in calculateLiveness()
164 for (auto Reg : LiveRegs) in createRegisterMask()
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| H A D | RegisterPressure.cpp | 256 LiveRegs.clear(); in reset()
289 LiveRegs.init(*MRI); in init()
326 P.LiveInRegs.reserve(LiveRegs.size()); in closeTop()
327 LiveRegs.appendTo(P.LiveInRegs); in closeTop()
338 P.LiveOutRegs.reserve(LiveRegs.size()); in closeBottom()
339 LiveRegs.appendTo(P.LiveOutRegs); in closeBottom()
709 LaneBitmask PrevMask = LiveRegs.insert(P); in addLiveRegs()
748 LaneBitmask LiveMask = LiveRegs.contains(Reg); in bumpDeadDefs()
754 LaneBitmask LiveMask = LiveRegs.contains(Reg); in bumpDeadDefs()
917 LaneBitmask LiveMask = LiveRegs.contains(Reg); in advance()
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| H A D | ScheduleDAGInstrs.cpp | 1086 static void toggleKills(const MachineRegisterInfo &MRI, LivePhysRegs &LiveRegs, in toggleKills() argument
1096 bool IsKill = LiveRegs.available(MRI, Reg); in toggleKills()
1099 LiveRegs.addReg(Reg); in toggleKills()
1106 LiveRegs.init(*TRI); in fixupKills()
1107 LiveRegs.addLiveOuts(MBB); in fixupKills()
1125 LiveRegs.removeReg(Reg); in fixupKills()
1127 LiveRegs.removeRegsInMask(MO); in fixupKills()
1133 toggleKills(MRI, LiveRegs, MI, true); in fixupKills()
1137 toggleKills(MRI, LiveRegs, MI, false); in fixupKills()
1147 toggleKills(MRI, LiveRegs, *I, true); in fixupKills()
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| H A D | BranchRelaxation.cpp | 81 LivePhysRegs LiveRegs; member in __anonb12d89e90111::BranchRelaxation
265 computeAndAddLiveIns(LiveRegs, *NewBB); in splitBlockBeforeInstr()
330 computeAndAddLiveIns(LiveRegs, *NewBB); in fixupConditionalBranch()
497 computeAndAddLiveIns(LiveRegs, *RestoreBB); in fixupUnconditionalBranch()
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| H A D | BranchFolding.cpp | 363 LiveRegs.clear(); in replaceTailWithBranchTo()
364 LiveRegs.addLiveOuts(OldMBB); in replaceTailWithBranchTo()
369 LiveRegs.stepBackward(*I); in replaceTailWithBranchTo()
381 if (!LiveRegs.available(*MRI, Reg)) in replaceTailWithBranchTo()
423 computeAndAddLiveIns(LiveRegs, *NewMBB); in SplitMBBAt()
852 LiveRegs.init(*TRI); in mergeCommonTails()
857 LiveRegs.clear(); in mergeCommonTails()
858 LiveRegs.addLiveOuts(*Pred); in mergeCommonTails()
861 if (!LiveRegs.available(*MRI, Reg)) in mergeCommonTails()
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| H A D | BranchFolding.h | 125 LivePhysRegs LiveRegs; variable
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| /llvm-project-15.0.7/llvm/include/llvm/CodeGen/ |
| H A D | LivePhysRegs.h | 53 RegisterSet LiveRegs; variable
61 LiveRegs.setUniverse(TRI.getNumRegs()); in LivePhysRegs()
70 LiveRegs.clear(); in init()
71 LiveRegs.setUniverse(TRI.getNumRegs()); in init()
75 void clear() { LiveRegs.clear(); } in clear()
78 bool empty() const { return LiveRegs.empty(); } in empty()
86 LiveRegs.insert(*SubRegs); in addReg()
95 LiveRegs.erase(*R); in removeReg()
157 const_iterator begin() const { return LiveRegs.begin(); } in begin()
158 const_iterator end() const { return LiveRegs.end(); } in end()
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| H A D | ExecutionDomainFix.h | 129 LiveRegsDVInfo LiveRegs; variable
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| /llvm-project-15.0.7/llvm/lib/Target/AMDGPU/ |
| H A D | GCNRegPressure.cpp | 273 LiveRegs[Reg] = LiveMask; in getLiveRegs()
275 return LiveRegs; in getLiveRegs()
284 if (&LiveRegs != LiveRegsCopy) in reset()
285 LiveRegs = *LiveRegsCopy; in reset()
323 auto I = LiveRegs.find(Reg); in recede()
324 if (I == LiveRegs.end()) in recede()
331 LiveRegs.erase(I); in recede()
366 for (auto &It : LiveRegs) { in advanceBeforeNext()
382 LiveRegs.erase(It.first); in advanceBeforeNext()
401 auto &LiveMask = LiveRegs[Reg]; in advanceToNext()
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| H A D | SIFrameLowering.cpp | 40 LiveRegs.addReg(CSRegs[i]); in findScratchNonCalleeSaveRegister()
138 LiveRegs.addReg(SpillReg); in buildPrologSpill()
214 LivePhysRegs LiveRegs; in emitEntryFunctionFlatScratchInit() local
215 LiveRegs.init(*TRI); in emitEntryFunctionFlatScratchInit()
693 if (LiveRegs.empty()) { in initLiveRegs()
694 LiveRegs.init(TRI); in initLiveRegs()
762 LivePhysRegs LiveRegs; in emitPrologue() local
899 LiveRegs.init(TRI); in emitPrologue()
970 LivePhysRegs LiveRegs; in emitEpilogue() local
1280 LivePhysRegs LiveRegs; in determineCalleeSaves() local
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| H A D | GCNRegPressure.h | 113 LiveRegSet LiveRegs; variable
125 const decltype(LiveRegs) &getLiveRegs() const { return LiveRegs; } in decltype() argument
137 decltype(LiveRegs) moveLiveRegs() { in moveLiveRegs()
138 return std::move(LiveRegs); in moveLiveRegs()
141 static void printLiveRegs(raw_ostream &OS, const LiveRegSet& LiveRegs,
151 void reset(const MachineInstr &MI, const LiveRegSet *LiveRegs = nullptr);
175 bool reset(const MachineInstr &MI, const LiveRegSet *LiveRegs = nullptr);
263 Range &&LiveRegs) { in getRegPressure() argument
265 for (const auto &RM : LiveRegs) in getRegPressure()
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| H A D | SIMachineScheduler.cpp | 1580 DAG->fillVgprSgprCost(LiveRegs.begin(), LiveRegs.end(), in pickBlock()
1592 : LiveRegs) dbgs() in pickBlock()
1654 (void) LiveRegs.insert(Reg); in addLiveRegs()
1662 std::set<unsigned>::iterator Pos = LiveRegs.find(Reg); in decreaseLiveRegs()
1663 assert (Pos != LiveRegs.end() && // Reg must be live. in decreaseLiveRegs()
1668 LiveRegs.erase(Pos); in decreaseLiveRegs()
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| /llvm-project-15.0.7/llvm/lib/Target/X86/ |
| H A D | X86FixupBWInsts.cpp | 149 LivePhysRegs LiveRegs; member in __anon7f6449270111::FixupBWInstPass
173 LiveRegs.init(TII->getRegisterInfo()); in runOnMachineFunction()
208 if (!LiveRegs.contains(SuperDestReg)) { in getSuperRegDestIfDead()
216 if (!LiveRegs.contains(getX86SubSuperRegister(OrigDestReg, 16)) && in getSuperRegDestIfDead()
217 !LiveRegs.contains(getX86SubSuperRegister(SuperDestReg, 8, in getSuperRegDestIfDead()
453 LiveRegs.clear(); in processBasicBlock()
455 LiveRegs.addLiveOuts(MBB); in processBasicBlock()
465 LiveRegs.stepBackward(MI); in processBasicBlock()
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| H A D | X86ExpandPseudo.cpp | 629 LivePhysRegs LiveRegs(*STI->getRegisterInfo()); in ExpandVastartSaveXmmRegs() local
632 LiveRegs.addLiveIns(*EntryBlk); in ExpandVastartSaveXmmRegs()
637 LiveRegs.stepForward(MI, Clobbers); in ExpandVastartSaveXmmRegs()
695 addLiveIns(*GuardedRegsBlk, LiveRegs); in ExpandVastartSaveXmmRegs()
696 addLiveIns(*TailBlk, LiveRegs); in ExpandVastartSaveXmmRegs()
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| /llvm-project-15.0.7/llvm/lib/Target/RISCV/ |
| H A D | RISCVExpandAtomicPseudoInsts.cpp | 372 LivePhysRegs LiveRegs; in expandAtomicBinOp() local
373 computeAndAddLiveIns(LiveRegs, *LoopMBB); in expandAtomicBinOp()
374 computeAndAddLiveIns(LiveRegs, *DoneMBB); in expandAtomicBinOp()
502 LivePhysRegs LiveRegs; in expandAtomicMinMaxOp() local
503 computeAndAddLiveIns(LiveRegs, *LoopHeadMBB); in expandAtomicMinMaxOp()
505 computeAndAddLiveIns(LiveRegs, *LoopTailMBB); in expandAtomicMinMaxOp()
506 computeAndAddLiveIns(LiveRegs, *DoneMBB); in expandAtomicMinMaxOp()
599 LivePhysRegs LiveRegs; in expandAtomicCmpXchg() local
600 computeAndAddLiveIns(LiveRegs, *LoopHeadMBB); in expandAtomicCmpXchg()
601 computeAndAddLiveIns(LiveRegs, *LoopTailMBB); in expandAtomicCmpXchg()
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| /llvm-project-15.0.7/llvm/lib/Target/SystemZ/ |
| H A D | SystemZShortenInst.cpp | 49 LivePhysRegs LiveRegs; member in __anon436205e40111::SystemZShortenInst
91 if (LiveRegs.contains(OtherReg)) in shortenIIF()
146 if (!LiveRegs.contains(SystemZ::CC) && shortenOn001(MI, Opcode)) { in shortenOn001AddCC()
211 LiveRegs.clear(); in processBlock()
212 LiveRegs.addLiveOuts(MBB); in processBlock()
380 LiveRegs.stepBackward(MI); in processBlock()
393 LiveRegs.init(*TRI); in runOnMachineFunction()
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| H A D | SystemZPostRewrite.cpp | 164 LivePhysRegs LiveRegs(TII->getRegisterInfo()); in expandCondMove() local
165 LiveRegs.addLiveOuts(MBB); in expandCondMove()
167 LiveRegs.stepBackward(*I); in expandCondMove()
174 for (MCPhysReg R : LiveRegs) in expandCondMove()
181 for (MCPhysReg R : LiveRegs) in expandCondMove()
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| H A D | SystemZElimCompare.cpp | 707 LivePhysRegs LiveRegs(*TRI); in processBlock() local
708 LiveRegs.addLiveOuts(MBB); in processBlock()
709 bool CompleteCCUsers = !LiveRegs.contains(SystemZ::CC); in processBlock()
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| /llvm-project-15.0.7/llvm/lib/Target/Mips/ |
| H A D | MipsExpandPseudo.cpp | 191 LivePhysRegs LiveRegs; in expandAtomicCmpSwapSubword() local
192 computeAndAddLiveIns(LiveRegs, *loop1MBB); in expandAtomicCmpSwapSubword()
193 computeAndAddLiveIns(LiveRegs, *loop2MBB); in expandAtomicCmpSwapSubword()
194 computeAndAddLiveIns(LiveRegs, *sinkMBB); in expandAtomicCmpSwapSubword()
195 computeAndAddLiveIns(LiveRegs, *exitMBB); in expandAtomicCmpSwapSubword()
292 LivePhysRegs LiveRegs; in expandAtomicCmpSwap() local
293 computeAndAddLiveIns(LiveRegs, *loop1MBB); in expandAtomicCmpSwap()
294 computeAndAddLiveIns(LiveRegs, *loop2MBB); in expandAtomicCmpSwap()
295 computeAndAddLiveIns(LiveRegs, *exitMBB); in expandAtomicCmpSwap()
566 LivePhysRegs LiveRegs; in expandAtomicBinOpSubword() local
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| /llvm-project-15.0.7/llvm/lib/Target/AArch64/ |
| H A D | AArch64ExpandPseudoInsts.cpp | 251 LivePhysRegs LiveRegs; in expandCMP_SWAP() local
252 computeAndAddLiveIns(LiveRegs, *DoneBB); in expandCMP_SWAP()
253 computeAndAddLiveIns(LiveRegs, *StoreBB); in expandCMP_SWAP()
257 computeAndAddLiveIns(LiveRegs, *StoreBB); in expandCMP_SWAP()
383 LivePhysRegs LiveRegs; in expandCMP_SWAP_128() local
384 computeAndAddLiveIns(LiveRegs, *DoneBB); in expandCMP_SWAP_128()
385 computeAndAddLiveIns(LiveRegs, *FailBB); in expandCMP_SWAP_128()
391 computeAndAddLiveIns(LiveRegs, *FailBB); in expandCMP_SWAP_128()
676 LivePhysRegs LiveRegs; in expandSetTagLoop() local
677 computeAndAddLiveIns(LiveRegs, *DoneBB); in expandSetTagLoop()
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| /llvm-project-15.0.7/llvm/lib/Target/ARM/ |
| H A D | ARMExpandPseudoInsts.cpp | 1820 LivePhysRegs LiveRegs; in ExpandCMP_SWAP() local
1821 computeAndAddLiveIns(LiveRegs, *DoneBB); in ExpandCMP_SWAP()
1822 computeAndAddLiveIns(LiveRegs, *StoreBB); in ExpandCMP_SWAP()
1826 computeAndAddLiveIns(LiveRegs, *StoreBB); in ExpandCMP_SWAP()
1941 LivePhysRegs LiveRegs; in ExpandCMP_SWAP_64() local
1942 computeAndAddLiveIns(LiveRegs, *DoneBB); in ExpandCMP_SWAP_64()
1943 computeAndAddLiveIns(LiveRegs, *StoreBB); in ExpandCMP_SWAP_64()
2226 LivePhysRegs LiveRegs(*TRI); in ExpandMI() local
2227 LiveRegs.addLiveOuts(MBB); in ExpandMI()
2229 LiveRegs.stepBackward(MI); in ExpandMI()
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| H A D | ARMBlockPlacement.cpp | 138 LivePhysRegs LiveRegs; in revertWhileToDoLoop() local
139 computeAndAddLiveIns(LiveRegs, *NewBlock); in revertWhileToDoLoop()
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