34                                                    LivePhysRegs &LiveRegs,  in findScratchNonCalleeSaveRegister()  argument
40     LiveRegs.addReg(CSRegs[i]);  in findScratchNonCalleeSaveRegister()
46       if (!MRI.isPhysRegUsed(Reg) && LiveRegs.available(MRI, Reg))  in findScratchNonCalleeSaveRegister()
51       if (LiveRegs.available(MRI, Reg))  in findScratchNonCalleeSaveRegister()
60                                            LivePhysRegs &LiveRegs,  in getVGPRSpillLaneOrTempRegister()  argument
92       MF.getRegInfo(), LiveRegs, AMDGPU::SReg_32_XM0_XEXECRegClass, true);  in getVGPRSpillLaneOrTempRegister()
126                              LivePhysRegs &LiveRegs, MachineFunction &MF,  in buildPrologSpill()  argument
138   LiveRegs.addReg(SpillReg);  in buildPrologSpill()
141                           &LiveRegs);  in buildPrologSpill()
142   LiveRegs.removeReg(SpillReg);  in buildPrologSpill()
148                                LivePhysRegs &LiveRegs, MachineFunction &MF,  in buildEpilogRestore()  argument
162                           &LiveRegs);  in buildEpilogRestore()
214     LivePhysRegs LiveRegs;  in emitEntryFunctionFlatScratchInit()  local
215     LiveRegs.init(*TRI);  in emitEntryFunctionFlatScratchInit()
216     LiveRegs.addLiveIns(MBB);  in emitEntryFunctionFlatScratchInit()
227       if (LiveRegs.available(MRI, Reg) && MRI.isAllocatable(Reg) &&  in emitEntryFunctionFlatScratchInit()
689 static void initLiveRegs(LivePhysRegs &LiveRegs, const SIRegisterInfo &TRI,  in initLiveRegs()  argument
693   if (LiveRegs.empty()) {  in initLiveRegs()
694     LiveRegs.init(TRI);  in initLiveRegs()
696       LiveRegs.addLiveIns(MBB);  in initLiveRegs()
699       LiveRegs.addLiveOuts(MBB);  in initLiveRegs()
700       LiveRegs.stepBackward(*MBBI);  in initLiveRegs()
706 static Register buildScratchExecCopy(LivePhysRegs &LiveRegs,  in buildScratchExecCopy()  argument
719   initLiveRegs(LiveRegs, TRI, FuncInfo, MF, MBB, MBBI, IsProlog);  in buildScratchExecCopy()
722       MRI, LiveRegs, *TRI.getWaveMaskRegClass());  in buildScratchExecCopy()
726   LiveRegs.addReg(ScratchExecCopy);  in buildScratchExecCopy()
762   LivePhysRegs LiveRegs;  in emitPrologue()  local
785       ScratchExecCopy = buildScratchExecCopy(LiveRegs, MF, MBB, MBBI,  in emitPrologue()
788     buildPrologSpill(ST, TRI, *FuncInfo, LiveRegs, MF, MBB, MBBI, DL, Reg.VGPR,  in emitPrologue()
795           buildScratchExecCopy(LiveRegs, MF, MBB, MBBI, /*IsProlog*/ true);  in emitPrologue()
797     buildPrologSpill(ST, TRI, *FuncInfo, LiveRegs, MF, MBB, MBBI, DL,  in emitPrologue()
807     LiveRegs.addReg(ScratchExecCopy);  in emitPrologue()
813     initLiveRegs(LiveRegs, TRI, FuncInfo, MF, MBB, MBBI, /*IsProlog*/ true);  in emitPrologue()
816         MRI, LiveRegs, AMDGPU::VGPR_32RegClass);  in emitPrologue()
823     buildPrologSpill(ST, TRI, *FuncInfo, LiveRegs, MF, MBB, MBBI, DL, TmpVGPR,  in emitPrologue()
887     if (!LiveRegs.empty()) {  in emitPrologue()
888       LiveRegs.addReg(FuncInfo->SGPRForFPSaveRestoreCopy);  in emitPrologue()
889       LiveRegs.addReg(FuncInfo->SGPRForBPSaveRestoreCopy);  in emitPrologue()
898     if (LiveRegs.empty()) {  in emitPrologue()
899       LiveRegs.init(TRI);  in emitPrologue()
900       LiveRegs.addLiveIns(MBB);  in emitPrologue()
970   LivePhysRegs LiveRegs;  in emitEpilogue()  local
1007     initLiveRegs(LiveRegs, TRI, FuncInfo, MF, MBB, MBBI, /*IsProlog*/ false);  in emitEpilogue()
1009         MRI, LiveRegs, AMDGPU::VGPR_32RegClass);  in emitEpilogue()
1012     buildEpilogRestore(ST, TRI, *FuncInfo, LiveRegs, MF, MBB, MBBI, DL, TmpVGPR,  in emitEpilogue()
1054           buildScratchExecCopy(LiveRegs, MF, MBB, MBBI, /*IsProlog*/ false);  in emitEpilogue()
1056     buildEpilogRestore(ST, TRI, *FuncInfo, LiveRegs, MF, MBB, MBBI, DL,  in emitEpilogue()
1063           buildScratchExecCopy(LiveRegs, MF, MBB, MBBI, /*IsProlog*/ false);  in emitEpilogue()
1065     buildEpilogRestore(ST, TRI, *FuncInfo, LiveRegs, MF, MBB, MBBI, DL,  in emitEpilogue()
1280   LivePhysRegs LiveRegs;  in determineCalleeSaves()  local
1281   LiveRegs.init(*TRI);  in determineCalleeSaves()
1286     getVGPRSpillLaneOrTempRegister(MF, LiveRegs, MFI->SGPRForFPSaveRestoreCopy,  in determineCalleeSaves()
1292       LiveRegs.addReg(MFI->SGPRForFPSaveRestoreCopy);  in determineCalleeSaves()
1296     getVGPRSpillLaneOrTempRegister(MF, LiveRegs, MFI->SGPRForBPSaveRestoreCopy,  in determineCalleeSaves()