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Searched refs:Live (Results 1 – 25 of 71) sorted by relevance

123

/llvm-project-15.0.7/polly/lib/Transform/
H A DDeadCodeElimination.cpp97 Live = Live.unite(MayWrites.domain()); in getLiveOut()
98 return Live.coalesce(); in getLiveOut()
114 isl::union_set Live = getLiveOut(S); in runDeadCodeElimination() local
120 Live = Live.affine_hull(); in runDeadCodeElimination()
127 isl::union_set Extra = Live.apply(Dep); in runDeadCodeElimination()
129 if (Extra.is_subset(Live)) in runDeadCodeElimination()
132 Live = Live.unite(Extra); in runDeadCodeElimination()
136 Live = Live.affine_hull(); in runDeadCodeElimination()
139 Live = Live.intersect(OriginalDomain); in runDeadCodeElimination()
142 Live = Live.coalesce(); in runDeadCodeElimination()
[all …]
/llvm-project-15.0.7/llvm/test/Transforms/LowerTypeTests/Inputs/
H A Dexport-icall.yaml4 - Live: true
10 Live: true
13 Live: true
16 Live: true
19 Live: true
22 Live: true
25 Live: true
28 Live: true
H A Dexported-funcs.yaml4 - Live: true
9 Live: true
12 Live: true
15 Live: true
18 Live: true
21 Live: true
H A Duse-typeid1-dead.yaml4 - Live: false
H A Duse-typeid1-typeid2.yaml4 - Live: true
H A Dimport-unsat.yaml4 - Live: true
/llvm-project-15.0.7/llvm/lib/Transforms/Scalar/
H A DADCE.cpp79 bool Live = false; member
88 bool Live = false; member
130 bool isLive(Instruction *I) { return InstInfo[I].Live; } in isLive()
316 EntryInfo.Live = true; in initialize()
380 if (Info.Live) in markLive()
384 Info.Live = true; in markLive()
405 if (BBInfo.Live) in markLive()
408 BBInfo.Live = true; in markLive()
586 InstInfo[Info.Terminator].Live = true; in updateDeadRegions()
671 InstInfo[PredTerm].Live = true; in makeUnconditional()
[all …]
/llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/
H A Dsgpr-regalloc-flags.ll22 ; DEFAULT-NEXT: Live Register Matrix
37 ; BASIC-DEFAULT-NEXT: Live Stack Slot Analysis
41 ; BASIC-DEFAULT-NEXT: Live Register Matrix
46 ; BASIC-DEFAULT-NEXT: Live Register Matrix
62 ; DEFAULT-BASIC-NEXT: Live Register Matrix
71 ; BASIC-BASIC-NEXT: Live Stack Slot Analysis
75 ; BASIC-BASIC-NEXT: Live Register Matrix
80 ; BASIC-BASIC-NEXT: Live Register Matrix
H A Dllc-pipeline.ll107 ; GCN-O0-NEXT: Live Interval Analysis
111 ; GCN-O0-NEXT: Live Register Matrix
327 ; GCN-O1-NEXT: Live Register Matrix
335 ; GCN-O1-NEXT: Live Register Matrix
344 ; GCN-O1-NEXT: Live Register Matrix
908 ; GCN-O2-NEXT: Live Register Matrix
917 ; GCN-O2-NEXT: Live Register Matrix
926 ; GCN-O2-NEXT: Live Register Matrix
1213 ; GCN-O3-NEXT: Live Register Matrix
1222 ; GCN-O3-NEXT: Live Register Matrix
[all …]
/llvm-project-15.0.7/clang/lib/StaticAnalyzer/Checkers/
H A DDeadStoresChecker.cpp155 bool isLive(const LiveVariables::LivenessValues &Live, const VarDecl *D) { in isLive() argument
156 if (Live.isLive(D)) in isLive()
267 const LiveVariables::LivenessValues &Live) { in CheckVarDecl() argument
276 if (!isLive(Live, VD) && in CheckVarDecl()
287 const LiveVariables::LivenessValues& Live) { in CheckDeclRef() argument
289 CheckVarDecl(VD, DR, Val, dsk, Live); in CheckDeclRef()
316 const LiveVariables::LivenessValues &Live) override { in observeStmt() argument
356 CheckVarDecl(VD, DR, B->getRHS(), dsk, Live); in observeStmt()
370 CheckDeclRef(DR, U, DeadIncrement, Live); in observeStmt()
403 if (!isLive(Live, V) && in observeStmt()
/llvm-project-15.0.7/llvm/test/CodeGen/Hexagon/
H A Dverify-liveness-at-def.mir40 # CHECK-SUB: Bad machine code: Live range continues after dead def flag
47 # CHECK-SUB: Bad machine code: Live range continues after dead def flag
54 # CHECK-SUB: Bad machine code: Live range continues after dead def flag
59 # CHECK-SUB: Bad machine code: Live range continues after dead def flag
70 # CHECK-NOSUB: Bad machine code: Live range continues after dead def flag
/llvm-project-15.0.7/llvm/lib/Transforms/IPO/
H A DDeadArgumentElimination.cpp365 return Live; in markIfNotLive()
404 if (Result != Live) in surveyUse()
424 if (Result == Live) in surveyUse()
437 return Live; in surveyUse()
447 return Live; in surveyUse()
459 return Live; in surveyUse()
476 if (Result == Live) in surveyUses()
575 if (RetValLiveness[Idx] != Live) { in surveyFunction()
591 if (RetValLiveness[Ri] != Live) in surveyFunction()
630 Result = Live; in surveyFunction()
[all …]
/llvm-project-15.0.7/llvm/test/ThinLTO/X86/
H A Ddeadstrip.ll39 ; Live, NotEligibleForImport, dso_local, Internal
41 ; Live, dso_local, Internal
43 ; Live, Local, WeakODR
45 ; Live, Local, LinkOnceODR
47 ; Live, Local, AvailableExternally
49 ; Live, Local, External
95 ; DEBUG-DAG: Live root: 2412314959268824392 (llvm.global_ctors)
96 ; DEBUG-DAG: Live root: 15822663052811949562 (main)
/llvm-project-15.0.7/llvm/test/CodeGen/PowerPC/
H A DO3-pipeline.ll127 ; CHECK-NEXT: Live Variable Analysis
129 ; CHECK-NEXT: Live Interval Analysis
138 ; CHECK-NEXT: Live Interval Analysis
145 ; CHECK-NEXT: Live Variable Analysis
151 ; CHECK-NEXT: Live Interval Analysis
159 ; CHECK-NEXT: Live Stack Slot Analysis
161 ; CHECK-NEXT: Live Register Matrix
206 ; CHECK-NEXT: Live DEBUG_VALUE analysis
/llvm-project-15.0.7/llvm/test/CodeGen/ARM/
H A DO3-pipeline.ll100 ; CHECK-NEXT: Live Interval Analysis
114 ; CHECK-NEXT: Live Variable Analysis
120 ; CHECK-NEXT: Live Interval Analysis
126 ; CHECK-NEXT: Live Stack Slot Analysis
128 ; CHECK-NEXT: Live Register Matrix
189 ; CHECK-NEXT: Live DEBUG_VALUE analysis
/llvm-project-15.0.7/pstl/test/std/algorithms/alg.sorting/
H A Dsort.pass.cpp121 Live = 0xabcd, enumerator
127 KeyCompare(OddTag) : status(Live) {} in KeyCompare()
132 EXPECT_TRUE(status == Live, "key comparison object not defined"); in operator ()()
/llvm-project-15.0.7/llvm/test/Transforms/LoopVectorize/
H A Dfirst-order-recurrence-sink-replicate-region.ll12 ; CHECK-NEXT: Live-in vp<[[VEC_TC:%.+]]> = vector-trip-count
14 ; CHECK-NEXT: Live-in vp<[[BTC:%.+]]> = backedge-taken count
100 ; CHECK-NEXT: Live-in vp<[[VEC_TC:%.+]]> = vector-trip-count
102 ; CHECK-NEXT: Live-in vp<[[BTC:%.+]]> = backedge-taken count
175 ; CHECK-NEXT: Live-in vp<[[VEC_TC:%.+]]> = vector-trip-count
177 ; CHECK-NEXT: Live-in vp<[[BTC:%.+]]> = backedge-taken count
224 ; CHECK-NEXT: Live-out i32 %res = ir<%and.red.next>
252 ; CHECK-NEXT: Live-in vp<[[VEC_TC:%.+]]> = vector-trip-count
254 ; CHECK-NEXT: Live-in vp<[[BTC:%.+]]> = backedge-taken count
348 ; CHECK-NEXT: Live-in vp<[[VEC_TC:%.+]]> = vector-trip-count
[all …]
H A Dvplan-sink-scalars-and-merge.ll14 ; CHECK-NEXT: Live-in vp<[[VEC_TC:%.+]]> = vector-trip-count
16 ; CHECK-NEXT: Live-in vp<[[BTC:%.+]]> = backedge-taken count
81 ; CHECK-NEXT: Live-in vp<[[VEC_TC:%.+]]> = vector-trip-count
83 ; CHECK-NEXT: Live-in vp<[[BTC:%.+]]> = backedge-taken count
160 ; CHECK-NEXT: Live-in vp<[[VEC_TC:%.+]]> = vector-trip-count
162 ; CHECK-NEXT: Live-in vp<[[BTC:%.+]]> = backedge-taken count
241 ; CHECK-NEXT: Live-in vp<[[VEC_TC:%.+]]> = vector-trip-count
243 ; CHECK-NEXT: Live-in vp<[[BTC:%.+]]> = backedge-taken count
316 ; CHECK-NEXT: Live-in vp<[[VEC_TC:%.+]]> = vector-trip-count
318 ; CHECK-NEXT: Live-in vp<[[BTC:%.+]]> = backedge-taken count
[all …]
H A Dvplan-printing.ll12 ; CHECK-NEXT: Live-in vp<[[VEC_TC:%.+]]> = vector-trip-count
58 ; CHECK-NEXT: Live-in vp<[[VEC_TC:%.+]]> = vector-trip-count
109 ; CHECK-NEXT: Live-in vp<[[VEC_TC:%.+]]> = vector-trip-count
131 ; CHECK-NEXT: Live-out float %red.next.lcssa = ir<%red.next>
154 ; CHECK-NEXT: Live-in vp<[[VEC_TC:%.+]]> = vector-trip-count
198 ; CHECK-NEXT: Live-in vp<[[VEC_TC:%.+]]> = vector-trip-count
277 ; CHECK-NEXT: Live-in vp<[[VEC_TC:%.+]]> = vector-trip-count
343 ; CHECK-NEXT: Live-in vp<[[VEC_TC:%.+]]> = vector-trip-count
368 ; CHECK-NEXT: Live-out float %muladd.lcssa = ir<%muladd>
487 ; CHECK-NEXT: Live-in vp<%0> = vector-trip-count
[all …]
/llvm-project-15.0.7/llvm/test/CodeGen/RISCV/
H A DO3-pipeline.ll104 ; CHECK-NEXT: Live Variable Analysis
109 ; CHECK-NEXT: Live Interval Analysis
115 ; CHECK-NEXT: Live Stack Slot Analysis
117 ; CHECK-NEXT: Live Register Matrix
159 ; CHECK-NEXT: Live DEBUG_VALUE analysis
/llvm-project-15.0.7/llvm/test/Other/
H A Dprint-changed-machine.ll7 ; VERBOSE-NEXT: Function Live Ins: $w0
14 ; VERBOSE-NEXT: Function Live Ins: $w0
/llvm-project-15.0.7/llvm/test/CodeGen/X86/
H A Dopt-pipeline.ll114 ; CHECK-NEXT: Live Range Shrink
130 ; CHECK-NEXT: Live Variable Analysis
134 ; CHECK-NEXT: Live Interval Analysis
140 ; CHECK-NEXT: Live Stack Slot Analysis
142 ; CHECK-NEXT: Live Register Matrix
204 ; CHECK-NEXT: Live DEBUG_VALUE analysis
/llvm-project-15.0.7/llvm/include/llvm/IR/
H A DModuleSummaryIndexYAML.h140 bool NotEligibleToImport, Live, IsLocal, CanAutoHide;
183 io.mapOptional("Live", summary.Live);
229 FSum.NotEligibleToImport, FSum.Live, FSum.IsLocal,
251 static_cast<bool>(FSum->flags().Live),
/llvm-project-15.0.7/llvm/test/Transforms/WholeProgramDevirt/Inputs/
H A Dexport.yaml4 - Live: true
H A Dimport-indir.yaml4 - Live: true

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