1; REQUIRES: asserts 2 3; RUN: opt -loop-vectorize -debug-only=loop-vectorize -force-vector-interleave=1 -force-vector-width=4 -prefer-inloop-reductions -enable-interleaved-mem-accesses=true -enable-masked-interleaved-mem-accesses -disable-output %s 2>&1 | FileCheck %s 4 5target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128" 6 7; Tests for printing VPlans. 8 9define void @print_call_and_memory(i64 %n, float* noalias %y, float* noalias %x) nounwind uwtable { 10; CHECK-LABEL: Checking a loop in 'print_call_and_memory' 11; CHECK: VPlan 'Initial VPlan for VF={4},UF>=1' { 12; CHECK-NEXT: Live-in vp<[[VEC_TC:%.+]]> = vector-trip-count 13; CHECK-EMPTY: 14; CHECK-NEXT: vector.ph: 15; CHECK-NEXT: Successor(s): vector loop 16; CHECK-EMPTY: 17; CHECK-NEXT: <x1> vector loop: { 18; CHECK-NEXT: vector.body: 19; CHECK-NEXT: EMIT vp<[[CAN_IV:%.+]]> = CANONICAL-INDUCTION 20; CHECK-NEXT: vp<[[STEPS:%.+]]> = SCALAR-STEPS vp<[[CAN_IV]]>, ir<0>, ir<1> 21; CHECK-NEXT: CLONE ir<%arrayidx> = getelementptr ir<%y>, vp<[[STEPS]]> 22; CHECK-NEXT: WIDEN ir<%lv> = load ir<%arrayidx> 23; CHECK-NEXT: WIDEN-CALL ir<%call> = call @llvm.sqrt.f32(ir<%lv>) 24; CHECK-NEXT: CLONE ir<%arrayidx2> = getelementptr ir<%x>, vp<[[STEPS]]> 25; CHECK-NEXT: WIDEN store ir<%arrayidx2>, ir<%call> 26; CHECK-NEXT: EMIT vp<[[CAN_IV_NEXT:%.+]]> = VF * UF +(nuw) vp<[[CAN_IV]]> 27; CHECK-NEXT: EMIT branch-on-count vp<[[CAN_IV_NEXT]]> vp<[[VEC_TC]]> 28; CHECK-NEXT: No successors 29; CHECK-NEXT: } 30; CHECK-NEXT: Successor(s): middle.block 31; CHECK-EMPTY: 32; CHECK-NEXT: middle.block: 33; CHECK-NEXT: No successors 34; CHECK-NEXT: } 35; 36entry: 37 %cmp6 = icmp sgt i64 %n, 0 38 br i1 %cmp6, label %for.body, label %for.end 39 40for.body: ; preds = %entry, %for.body 41 %iv = phi i64 [ %iv.next, %for.body ], [ 0, %entry ] 42 %arrayidx = getelementptr inbounds float, float* %y, i64 %iv 43 %lv = load float, float* %arrayidx, align 4 44 %call = tail call float @llvm.sqrt.f32(float %lv) nounwind readnone 45 %arrayidx2 = getelementptr inbounds float, float* %x, i64 %iv 46 store float %call, float* %arrayidx2, align 4 47 %iv.next = add i64 %iv, 1 48 %exitcond = icmp eq i64 %iv.next, %n 49 br i1 %exitcond, label %for.end, label %for.body 50 51for.end: ; preds = %for.body, %entry 52 ret void 53} 54 55define void @print_widen_gep_and_select(i64 %n, float* noalias %y, float* noalias %x, float* %z) nounwind uwtable { 56; CHECK-LABEL: Checking a loop in 'print_widen_gep_and_select' 57; CHECK: VPlan 'Initial VPlan for VF={4},UF>=1' { 58; CHECK-NEXT: Live-in vp<[[VEC_TC:%.+]]> = vector-trip-count 59; CHECK-EMPTY: 60; CHECK-NEXT: vector.ph: 61; CHECK-NEXT: Successor(s): vector loop 62; CHECK-EMPTY: 63; CHECK-NEXT: <x1> vector loop: { 64; CHECK-NEXT: vector.body: 65; CHECK-NEXT: EMIT vp<[[CAN_IV:%.+]]> = CANONICAL-INDUCTION 66; CHECK-NEXT: WIDEN-INDUCTION %iv = phi %iv.next, 0, ir<1> 67; CHECK-NEXT: vp<[[STEPS:%.+]]> = SCALAR-STEPS vp<[[CAN_IV]]>, ir<0>, ir<1> 68; CHECK-NEXT: WIDEN-GEP Inv[Var] ir<%arrayidx> = getelementptr ir<%y>, ir<%iv> 69; CHECK-NEXT: WIDEN ir<%lv> = load ir<%arrayidx> 70; CHECK-NEXT: WIDEN ir<%cmp> = icmp ir<%arrayidx>, ir<%z> 71; CHECK-NEXT: WIDEN-SELECT ir<%sel> = select ir<%cmp>, ir<1.000000e+01>, ir<2.000000e+01> 72; CHECK-NEXT: WIDEN ir<%add> = fadd ir<%lv>, ir<%sel> 73; CHECK-NEXT: CLONE ir<%arrayidx2> = getelementptr ir<%x>, vp<[[STEPS]]> 74; CHECK-NEXT: WIDEN store ir<%arrayidx2>, ir<%add> 75; CHECK-NEXT: EMIT vp<[[CAN_IV_NEXT:%.+]]> = VF * UF +(nuw) vp<[[CAN_IV]]> 76; CHECK-NEXT: EMIT branch-on-count vp<[[CAN_IV_NEXT]]> vp<[[VEC_TC]]> 77; CHECK-NEXT: No successors 78; CHECK-NEXT: } 79; CHECK-NEXT: Successor(s): middle.block 80; CHECK-EMPTY: 81; CHECK-NEXT: middle.block: 82; CHECK-NEXT: No successors 83; CHECK-NEXT: } 84; 85entry: 86 %cmp6 = icmp sgt i64 %n, 0 87 br i1 %cmp6, label %for.body, label %for.end 88 89for.body: ; preds = %entry, %for.body 90 %iv = phi i64 [ %iv.next, %for.body ], [ 0, %entry ] 91 %arrayidx = getelementptr inbounds float, float* %y, i64 %iv 92 %lv = load float, float* %arrayidx, align 4 93 %cmp = icmp eq float* %arrayidx, %z 94 %sel = select i1 %cmp, float 10.0, float 20.0 95 %add = fadd float %lv, %sel 96 %arrayidx2 = getelementptr inbounds float, float* %x, i64 %iv 97 store float %add, float* %arrayidx2, align 4 98 %iv.next = add i64 %iv, 1 99 %exitcond = icmp eq i64 %iv.next, %n 100 br i1 %exitcond, label %for.end, label %for.body 101 102for.end: ; preds = %for.body, %entry 103 ret void 104} 105 106define float @print_reduction(i64 %n, float* noalias %y) { 107; CHECK-LABEL: Checking a loop in 'print_reduction' 108; CHECK: VPlan 'Initial VPlan for VF={4},UF>=1' { 109; CHECK-NEXT: Live-in vp<[[VEC_TC:%.+]]> = vector-trip-count 110; CHECK-EMPTY: 111; CHECK-NEXT: vector.ph: 112; CHECK-NEXT: Successor(s): vector loop 113; CHECK-EMPTY: 114; CHECK-NEXT: <x1> vector loop: { 115; CHECK-NEXT: vector.body: 116; CHECK-NEXT: EMIT vp<[[CAN_IV:%.+]]> = CANONICAL-INDUCTION 117; CHECK-NEXT: WIDEN-REDUCTION-PHI ir<%red> = phi ir<0.000000e+00>, ir<%red.next> 118; CHECK-NEXT: vp<[[STEPS:%.+]]> = SCALAR-STEPS vp<[[CAN_IV]]>, ir<0>, ir<1> 119; CHECK-NEXT: CLONE ir<%arrayidx> = getelementptr ir<%y>, vp<[[STEPS]]> 120; CHECK-NEXT: WIDEN ir<%lv> = load ir<%arrayidx> 121; CHECK-NEXT: REDUCE ir<%red.next> = ir<%red> + fast reduce.fadd (ir<%lv>) 122; CHECK-NEXT: EMIT vp<[[CAN_IV_NEXT:%.+]]> = VF * UF +(nuw) vp<[[CAN_IV]]> 123; CHECK-NEXT: EMIT branch-on-count vp<[[CAN_IV_NEXT]]> vp<[[VEC_TC]]> 124; CHECK-NEXT: No successors 125; CHECK-NEXT: } 126; CHECK-NEXT: Successor(s): middle.block 127; CHECK-EMPTY: 128; CHECK-NEXT: middle.block: 129; CHECK-NEXT: No successors 130; CHECK-EMPTY: 131; CHECK-NEXT: Live-out float %red.next.lcssa = ir<%red.next> 132; CHECK-NEXT: } 133; 134entry: 135 br label %for.body 136 137for.body: ; preds = %entry, %for.body 138 %iv = phi i64 [ %iv.next, %for.body ], [ 0, %entry ] 139 %red = phi float [ %red.next, %for.body ], [ 0.0, %entry ] 140 %arrayidx = getelementptr inbounds float, float* %y, i64 %iv 141 %lv = load float, float* %arrayidx, align 4 142 %red.next = fadd fast float %lv, %red 143 %iv.next = add i64 %iv, 1 144 %exitcond = icmp eq i64 %iv.next, %n 145 br i1 %exitcond, label %for.end, label %for.body 146 147for.end: ; preds = %for.body, %entry 148 ret float %red.next 149} 150 151define void @print_reduction_with_invariant_store(i64 %n, float* noalias %y, float* noalias %dst) { 152; CHECK-LABEL: Checking a loop in 'print_reduction_with_invariant_store' 153; CHECK: VPlan 'Initial VPlan for VF={4},UF>=1' { 154; CHECK-NEXT: Live-in vp<[[VEC_TC:%.+]]> = vector-trip-count 155; CHECK-EMPTY: 156; CHECK-NEXT: vector.ph: 157; CHECK-NEXT: Successor(s): vector loop 158; CHECK-EMPTY: 159; CHECK-NEXT: <x1> vector loop: { 160; CHECK-NEXT: vector.body: 161; CHECK-NEXT: EMIT vp<[[CAN_IV:%.+]]> = CANONICAL-INDUCTION 162; CHECK-NEXT: WIDEN-REDUCTION-PHI ir<%red> = phi ir<0.000000e+00>, ir<%red.next> 163; CHECK-NEXT: vp<[[IV:%.+]]> = SCALAR-STEPS vp<[[CAN_IV]]>, ir<0>, ir<1> 164; CHECK-NEXT: CLONE ir<%arrayidx> = getelementptr ir<%y>, vp<[[IV]]> 165; CHECK-NEXT: WIDEN ir<%lv> = load ir<%arrayidx> 166; CHECK-NEXT: REDUCE ir<%red.next> = ir<%red> + fast reduce.fadd (ir<%lv>) (with final reduction value stored in invariant address sank outside of loop) 167; CHECK-NEXT: EMIT vp<[[CAN_IV_NEXT:%.+]]> = VF * UF +(nuw) vp<[[CAN_IV]]> 168; CHECK-NEXT: EMIT branch-on-count vp<[[CAN_IV_NEXT]]> vp<[[VEC_TC]]> 169; CHECK-NEXT: No successors 170; CHECK-NEXT: } 171; CHECK-NEXT: Successor(s): middle.block 172; CHECK-EMPTY: 173; CHECK-NEXT: middle.block: 174; CHECK-NEXT: No successors 175; CHECK-NEXT: } 176; 177entry: 178 br label %for.body 179 180for.body: ; preds = %entry, %for.body 181 %iv = phi i64 [ %iv.next, %for.body ], [ 0, %entry ] 182 %red = phi float [ %red.next, %for.body ], [ 0.0, %entry ] 183 %arrayidx = getelementptr inbounds float, float* %y, i64 %iv 184 %lv = load float, float* %arrayidx, align 4 185 %red.next = fadd fast float %lv, %red 186 store float %red.next, float* %dst, align 4 187 %iv.next = add i64 %iv, 1 188 %exitcond = icmp eq i64 %iv.next, %n 189 br i1 %exitcond, label %for.end, label %for.body 190 191for.end: ; preds = %for.body, %entry 192 ret void 193} 194 195define void @print_replicate_predicated_phi(i64 %n, i64* %x) { 196; CHECK-LABEL: Checking a loop in 'print_replicate_predicated_phi' 197; CHECK: VPlan 'Initial VPlan for VF={4},UF>=1' { 198; CHECK-NEXT: Live-in vp<[[VEC_TC:%.+]]> = vector-trip-count 199; CHECK-EMPTY: 200; CHECK-NEXT: vector.ph: 201; CHECK-NEXT: Successor(s): vector loop 202; CHECK-EMPTY: 203; CHECK-NEXT: <x1> vector loop: { 204; CHECK-NEXT: vector.body: 205; CHECK-NEXT: EMIT vp<[[CAN_IV:%.+]]> = CANONICAL-INDUCTION 206; CHECK-NEXT: WIDEN-INDUCTION %i = phi 0, %i.next, ir<1> 207; CHECK-NEXT: vp<[[STEPS:%.+]]> = SCALAR-STEPS vp<[[CAN_IV]]>, ir<0>, ir<1> 208; CHECK-NEXT: WIDEN ir<%cmp> = icmp ir<%i>, ir<5> 209; CHECK-NEXT: Successor(s): if.then 210; CHECK-EMPTY: 211; CHECK-NEXT: if.then: 212; CHECK-NEXT: Successor(s): pred.udiv 213; CHECK-EMPTY: 214; CHECK-NEXT: <xVFxUF> pred.udiv: { 215; CHECK-NEXT: pred.udiv.entry: 216; CHECK-NEXT: BRANCH-ON-MASK ir<%cmp> 217; CHECK-NEXT: Successor(s): pred.udiv.if, pred.udiv.continue 218; CHECK-EMPTY: 219; CHECK-NEXT: pred.udiv.if: 220; CHECK-NEXT: REPLICATE ir<%tmp4> = udiv ir<%n>, vp<[[STEPS]]> (S->V) 221; CHECK-NEXT: Successor(s): pred.udiv.continue 222; CHECK-EMPTY: 223; CHECK-NEXT: pred.udiv.continue: 224; CHECK-NEXT: PHI-PREDICATED-INSTRUCTION vp<[[PRED:%.+]]> = ir<%tmp4> 225; CHECK-NEXT: No successors 226; CHECK-NEXT: } 227; CHECK-NEXT: Successor(s): if.then.0 228; CHECK-EMPTY: 229; CHECK-NEXT: if.then.0: 230; CHECK-NEXT: Successor(s): for.inc 231; CHECK-EMPTY: 232; CHECK-NEXT: for.inc: 233; CHECK-NEXT: EMIT vp<[[NOT:%.+]]> = not ir<%cmp> 234; CHECK-NEXT: BLEND %d = ir<0>/vp<[[NOT]]> vp<[[PRED]]>/ir<%cmp> 235; CHECK-NEXT: CLONE ir<%idx> = getelementptr ir<%x>, vp<[[STEPS]]> 236; CHECK-NEXT: WIDEN store ir<%idx>, ir<%d> 237; CHECK-NEXT: EMIT vp<[[CAN_IV_NEXT:%.+]]> = VF * UF +(nuw) vp<[[CAN_IV]]> 238; CHECK-NEXT: EMIT branch-on-count vp<[[CAN_IV_NEXT]]> vp<[[VEC_TC]]> 239; CHECK-NEXT: No successors 240; CHECK-NEXT: } 241; CHECK-NEXT: Successor(s): middle.block 242; CHECK-EMPTY: 243; CHECK-NEXT: middle.block: 244; CHECK-NEXT: No successors 245; CHECK-NEXT: } 246; 247entry: 248 br label %for.body 249 250for.body: ; preds = %for.inc, %entry 251 %i = phi i64 [ 0, %entry ], [ %i.next, %for.inc ] 252 %cmp = icmp ult i64 %i, 5 253 br i1 %cmp, label %if.then, label %for.inc 254 255if.then: ; preds = %for.body 256 %tmp4 = udiv i64 %n, %i 257 br label %for.inc 258 259for.inc: ; preds = %if.then, %for.body 260 %d = phi i64 [ 0, %for.body ], [ %tmp4, %if.then ] 261 %idx = getelementptr i64, i64* %x, i64 %i 262 store i64 %d, i64* %idx 263 %i.next = add nuw nsw i64 %i, 1 264 %cond = icmp slt i64 %i.next, %n 265 br i1 %cond, label %for.body, label %for.end 266 267for.end: ; preds = %for.inc 268 ret void 269} 270 271@AB = common global [1024 x i32] zeroinitializer, align 4 272@CD = common global [1024 x i32] zeroinitializer, align 4 273 274define void @print_interleave_groups(i32 %C, i32 %D) { 275; CHECK-LABEL: Checking a loop in 'print_interleave_groups' 276; CHECK: VPlan 'Initial VPlan for VF={4},UF>=1' { 277; CHECK-NEXT: Live-in vp<[[VEC_TC:%.+]]> = vector-trip-count 278; CHECK-EMPTY: 279; CHECK-NEXT: vector.ph: 280; CHECK-NEXT: Successor(s): vector loop 281; CHECK-EMPTY: 282; CHECK-NEXT: <x1> vector loop: { 283; CHECK-NEXT: vector.body: 284; CHECK-NEXT: EMIT vp<[[CAN_IV:%.+]]> = CANONICAL-INDUCTION 285; CHECK-NEXT: vp<[[STEPS:%.+]]> = SCALAR-STEPS vp<[[CAN_IV]]>, ir<0>, ir<4> 286; CHECK-NEXT: CLONE ir<%gep.AB.0> = getelementptr ir<@AB>, ir<0>, vp<[[STEPS]]> 287; CHECK-NEXT: INTERLEAVE-GROUP with factor 4 at %AB.0, ir<%gep.AB.0> 288; CHECK-NEXT: ir<%AB.0> = load from index 0 289; CHECK-NEXT: ir<%AB.1> = load from index 1 290; CHECK-NEXT: ir<%AB.3> = load from index 3 291; CHECK-NEXT: CLONE ir<%iv.plus.3> = add vp<[[STEPS]]>, ir<3> 292; CHECK-NEXT: WIDEN ir<%add> = add ir<%AB.0>, ir<%AB.1> 293; CHECK-NEXT: CLONE ir<%gep.CD.3> = getelementptr ir<@CD>, ir<0>, ir<%iv.plus.3> 294; CHECK-NEXT: INTERLEAVE-GROUP with factor 4 at <badref>, ir<%gep.CD.3> 295; CHECK-NEXT: store ir<%add> to index 0 296; CHECK-NEXT: store ir<1> to index 1 297; CHECK-NEXT: store ir<2> to index 2 298; CHECK-NEXT: store ir<%AB.3> to index 3 299; CHECK-NEXT: EMIT vp<[[CAN_IV_NEXT:%.+]]> = VF * UF +(nuw) vp<[[CAN_IV]]> 300; CHECK-NEXT: EMIT branch-on-count vp<[[CAN_IV_NEXT]]> vp<[[VEC_TC]]> 301; CHECK-NEXT: No successors 302; CHECK-NEXT: } 303; CHECK-NEXT: Successor(s): middle.block 304; CHECK-EMPTY: 305; CHECK-NEXT: middle.block: 306; CHECK-NEXT: No successors 307; CHECK-NEXT: } 308; 309entry: 310 br label %for.body 311 312for.body: 313 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ] 314 %gep.AB.0= getelementptr inbounds [1024 x i32], [1024 x i32]* @AB, i64 0, i64 %iv 315 %AB.0 = load i32, i32* %gep.AB.0, align 4 316 %iv.plus.1 = add i64 %iv, 1 317 %gep.AB.1 = getelementptr inbounds [1024 x i32], [1024 x i32]* @AB, i64 0, i64 %iv.plus.1 318 %AB.1 = load i32, i32* %gep.AB.1, align 4 319 %iv.plus.2 = add i64 %iv, 2 320 %iv.plus.3 = add i64 %iv, 3 321 %gep.AB.3 = getelementptr inbounds [1024 x i32], [1024 x i32]* @AB, i64 0, i64 %iv.plus.3 322 %AB.3 = load i32, i32* %gep.AB.3, align 4 323 %add = add nsw i32 %AB.0, %AB.1 324 %gep.CD.0 = getelementptr inbounds [1024 x i32], [1024 x i32]* @CD, i64 0, i64 %iv 325 store i32 %add, i32* %gep.CD.0, align 4 326 %gep.CD.1 = getelementptr inbounds [1024 x i32], [1024 x i32]* @CD, i64 0, i64 %iv.plus.1 327 store i32 1, i32* %gep.CD.1, align 4 328 %gep.CD.2 = getelementptr inbounds [1024 x i32], [1024 x i32]* @CD, i64 0, i64 %iv.plus.2 329 store i32 2, i32* %gep.CD.2, align 4 330 %gep.CD.3 = getelementptr inbounds [1024 x i32], [1024 x i32]* @CD, i64 0, i64 %iv.plus.3 331 store i32 %AB.3, i32* %gep.CD.3, align 4 332 %iv.next = add nuw nsw i64 %iv, 4 333 %cmp = icmp slt i64 %iv.next, 1024 334 br i1 %cmp, label %for.body, label %for.end 335 336for.end: 337 ret void 338} 339 340define float @print_fmuladd_strict(float* %a, float* %b, i64 %n) { 341; CHECK-LABEL: Checking a loop in 'print_fmuladd_strict' 342; CHECK: VPlan 'Initial VPlan for VF={4},UF>=1' { 343; CHECK-NEXT: Live-in vp<[[VEC_TC:%.+]]> = vector-trip-count 344; CHECK-EMPTY: 345; CHECK-NEXT: vector.ph: 346; CHECK-NEXT: Successor(s): vector loop 347; CHECK-EMPTY: 348; CHECK-NEXT: <x1> vector loop: { 349; CHECK-NEXT: vector.body: 350; CHECK-NEXT: EMIT vp<[[CAN_IV:%.+]]> = CANONICAL-INDUCTION 351; CHECK-NEXT: WIDEN-REDUCTION-PHI ir<%sum.07> = phi ir<0.000000e+00>, ir<%muladd> 352; CHECK-NEXT: vp<[[STEPS:%.+]]> = SCALAR-STEPS vp<[[CAN_IV]]>, ir<0>, ir<1> 353; CHECK-NEXT: CLONE ir<%arrayidx> = getelementptr ir<%a>, vp<[[STEPS]]> 354; CHECK-NEXT: WIDEN ir<%l.a> = load ir<%arrayidx> 355; CHECK-NEXT: CLONE ir<%arrayidx2> = getelementptr ir<%b>, vp<[[STEPS]]> 356; CHECK-NEXT: WIDEN ir<%l.b> = load ir<%arrayidx2> 357; CHECK-NEXT: EMIT vp<[[FMUL:%.+]]> = fmul nnan ninf nsz ir<%l.a> ir<%l.b> 358; CHECK-NEXT: REDUCE ir<[[MULADD:%.+]]> = ir<%sum.07> + nnan ninf nsz reduce.fadd (vp<[[FMUL]]>) 359; CHECK-NEXT: EMIT vp<[[CAN_IV_NEXT:%.+]]> = VF * UF +(nuw) vp<[[CAN_IV]]> 360; CHECK-NEXT: EMIT branch-on-count vp<[[CAN_IV_NEXT]]> vp<[[VEC_TC]]> 361; CHECK-NEXT: No successors 362; CHECK-NEXT: } 363; CHECK-NEXT: Successor(s): middle.block 364; CHECK-EMPTY: 365; CHECK-NEXT: middle.block: 366; CHECK-NEXT: No successors 367; CHECK-EMPTY: 368; CHECK-NEXT: Live-out float %muladd.lcssa = ir<%muladd> 369; CHECK-NEXT:} 370 371entry: 372 br label %for.body 373 374for.body: 375 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ] 376 %sum.07 = phi float [ 0.000000e+00, %entry ], [ %muladd, %for.body ] 377 %arrayidx = getelementptr inbounds float, float* %a, i64 %iv 378 %l.a = load float, float* %arrayidx, align 4 379 %arrayidx2 = getelementptr inbounds float, float* %b, i64 %iv 380 %l.b = load float, float* %arrayidx2, align 4 381 %muladd = tail call nnan ninf nsz float @llvm.fmuladd.f32(float %l.a, float %l.b, float %sum.07) 382 %iv.next = add nuw nsw i64 %iv, 1 383 %exitcond.not = icmp eq i64 %iv.next, %n 384 br i1 %exitcond.not, label %for.end, label %for.body 385 386for.end: 387 ret float %muladd 388} 389 390define void @debug_loc_vpinstruction(i32* nocapture %asd, i32* nocapture %bsd) !dbg !5 { 391; CHECK-LABEL: Checking a loop in 'debug_loc_vpinstruction' 392; CHECK: VPlan 'Initial VPlan for VF={4},UF>=1' { 393; CHECK-NEXT: Live-in vp<[[VEC_TC:%.+]]> = vector-trip-count 394; CHECK-EMPTY: 395; CHECK-NEXT: vector.ph: 396; CHECK-NEXT: Successor(s): vector loop 397; CHECK-EMPTY: 398; CHECK-NEXT: <x1> vector loop: { 399; CHECK-NEXT: vector.body: 400; CHECK-NEXT: EMIT vp<[[CAN_IV:%.+]]> = CANONICAL-INDUCTION 401; CHECK-NEXT: vp<[[STEPS:%.+]]> = SCALAR-STEPS vp<[[CAN_IV]]>, ir<0>, ir<1> 402; CHECK-NEXT: CLONE ir<%isd> = getelementptr ir<%asd>, vp<[[STEPS]]> 403; CHECK-NEXT: WIDEN ir<%lsd> = load ir<%isd> 404; CHECK-NEXT: WIDEN ir<%psd> = add ir<%lsd>, ir<23> 405; CHECK-NEXT: WIDEN ir<%cmp1> = icmp ir<%lsd>, ir<100> 406; CHECK-NEXT: Successor(s): check 407; CHECK-EMPTY: 408; CHECK-NEXT: check: 409; CHECK-NEXT: WIDEN ir<%cmp2> = icmp ir<%lsd>, ir<200> 410; CHECK-NEXT: Successor(s): if.then 411; CHECK-EMPTY: 412; CHECK-NEXT: if.then: 413; CHECK-NEXT: EMIT vp<[[NOT1:%.+]]> = not ir<%cmp1>, !dbg /tmp/s.c:5:3 414; CHECK-NEXT: EMIT vp<[[SEL1:%.+]]> = select vp<[[NOT1]]> ir<%cmp2> ir<false>, !dbg /tmp/s.c:5:21 415; CHECK-NEXT: EMIT vp<[[OR1:%.+]]> = or vp<[[SEL1]]> ir<%cmp1> 416; CHECK-NEXT: Successor(s): pred.sdiv 417; CHECK-EMPTY: 418; CHECK-NEXT: <xVFxUF> pred.sdiv: { 419; CHECK-NEXT: pred.sdiv.entry: 420; CHECK-NEXT: BRANCH-ON-MASK vp<[[OR1]]> 421; CHECK-NEXT: Successor(s): pred.sdiv.if, pred.sdiv.continue 422; CHECK-EMPTY: 423; CHECK-NEXT: pred.sdiv.if: 424; CHECK-NEXT: REPLICATE ir<%sd1> = sdiv ir<%psd>, ir<%lsd> (S->V) 425; CHECK-NEXT: Successor(s): pred.sdiv.continue 426; CHECK-EMPTY: 427; CHECK-NEXT: pred.sdiv.continue: 428; CHECK-NEXT: PHI-PREDICATED-INSTRUCTION vp<[[PHI:%.+]]> = ir<%sd1> 429; CHECK-NEXT: No successors 430; CHECK-NEXT: } 431; CHECK-NEXT: Successor(s): if.then.0 432; CHECK-EMPTY: 433; CHECK-NEXT: if.then.0: 434; CHECK-NEXT: Successor(s): if.end 435; CHECK-EMPTY: 436; CHECK-NEXT: if.end: 437; CHECK-NEXT: EMIT vp<[[NOT2:%.+]]> = not ir<%cmp2> 438; CHECK-NEXT: EMIT vp<[[SEL2:%.+]]> = select vp<[[NOT1]]> vp<[[NOT2]]> ir<false> 439; CHECK-NEXT: BLEND %ysd.0 = vp<[[PHI]]>/vp<[[OR1]]> ir<%psd>/vp<[[SEL2]]> 440; CHECK-NEXT: WIDEN store ir<%isd>, ir<%ysd.0> 441; CHECK-NEXT: EMIT vp<[[CAN_IV_NEXT:%.+]]> = VF * UF +(nuw) vp<[[CAN_IV]]> 442; CHECK-NEXT: EMIT branch-on-count vp<[[CAN_IV_NEXT]]> vp<[[VEC_TC]]> 443; CHECK-NEXT: No successors 444; CHECK-NEXT:} 445; CHECK-NEXT: Successor(s): middle.block 446; CHECK-EMPTY: 447; CHECK-NEXT: middle.block: 448; CHECK-NEXT: No successors 449; CHECK-NEXT:} 450; 451entry: 452 br label %loop 453 454loop: 455 %iv = phi i64 [ 0, %entry ], [ %iv.next, %if.end ] 456 %isd = getelementptr inbounds i32, i32* %asd, i64 %iv 457 %lsd = load i32, i32* %isd, align 4 458 %psd = add nsw i32 %lsd, 23 459 %cmp1 = icmp slt i32 %lsd, 100 460 br i1 %cmp1, label %if.then, label %check, !dbg !7 461 462check: 463 %cmp2 = icmp sge i32 %lsd, 200 464 br i1 %cmp2, label %if.then, label %if.end, !dbg !8 465 466if.then: 467 %sd1 = sdiv i32 %psd, %lsd 468 br label %if.end 469 470if.end: 471 %ysd.0 = phi i32 [ %sd1, %if.then ], [ %psd, %check ] 472 store i32 %ysd.0, i32* %isd, align 4 473 %iv.next = add nuw nsw i64 %iv, 1 474 %exitcond = icmp eq i64 %iv.next, 128 475 br i1 %exitcond, label %exit, label %loop 476 477exit: 478 ret void 479} 480 481declare float @llvm.sqrt.f32(float) nounwind readnone 482declare float @llvm.fmuladd.f32(float, float, float) 483 484define void @print_expand_scev(i64 %y, i8* %ptr) { 485; CHECK-LABEL: Checking a loop in 'print_expand_scev' 486; CHECK: VPlan 'Initial VPlan for VF={4},UF>=1' { 487; CHECK-NEXT: Live-in vp<%0> = vector-trip-count 488; CHECK-EMPTY: 489; CHECK-NEXT: vector.ph: 490; CHECK-NEXT: EMIT vp<[[EXP_SCEV:%.+]]> = EXPAND SCEV (1 + (%y /u 492802768830814060))<nuw><nsw> 491; CHECK-NEXT: Successor(s): vector loop 492; CHECK-EMPTY: 493; CHECK-NEXT: <x1> vector loop: { 494; CHECK-NEXT: vector.body: 495; CHECK-NEXT: EMIT vp<[[CAN_IV:%.+]]> = CANONICAL-INDUCTION 496; CHECK-NEXT: WIDEN-INDUCTION\l" + 497; CHECK-NEXT: " %iv = phi %iv.next, 0\l" + 498; CHECK-NEXT: " ir<%v2>, vp<[[EXP_SCEV]]> 499; CHECK-NEXT: vp<[[STEPS:%.+]]> = SCALAR-STEPS vp<[[CAN_IV]]>, ir<0>, vp<[[EXP_SCEV]]> 500; CHECK-NEXT: WIDEN ir<%v3> = add ir<%v2>, ir<1> 501; CHECK-NEXT: REPLICATE ir<%gep> = getelementptr ir<%ptr>, vp<[[STEPS]]> 502; CHECK-NEXT: REPLICATE store ir<%v3>, ir<%gep> 503; CHECK-NEXT: EMIT vp<[[CAN_INC:%.+]]> = VF * UF +(nuw) vp<[[CAN_IV]]> 504; CHECK-NEXT: EMIT branch-on-count vp<[[CAN_INC]]> vp<%0> 505; CHECK-NEXT: No successors 506; CHECK-NEXT: } 507; CHECK-NEXT: Successor(s): middle.block 508; CHECK-EMPTY: 509; CHECK-NEXT: middle.block: 510; CHECK-NEXT: No successors 511; CHECK-NEXT: } 512; 513entry: 514 %div = udiv i64 %y, 492802768830814060 515 %inc = add i64 %div, 1 516 br label %loop 517 518loop: ; preds = %loop, %entry 519 %iv = phi i64 [ %iv.next, %loop ], [ 0, %entry ] 520 %v2 = trunc i64 %iv to i8 521 %v3 = add i8 %v2, 1 522 %gep = getelementptr inbounds i8, i8* %ptr, i64 %iv 523 store i8 %v3, i8* %gep 524 525 %cmp15 = icmp slt i8 %v3, 10000 526 %iv.next = add i64 %iv, %inc 527 br i1 %cmp15, label %loop, label %loop.exit 528 529loop.exit: 530 ret void 531} 532 533define i32 @print_exit_value(i8* %ptr, i32 %off) { 534; CHECK-LABEL: Checking a loop in 'print_exit_value' 535; CHECK: VPlan 'Initial VPlan for VF={4},UF>=1' { 536; CHECK-NEXT: Live-in vp<[[VEC_TC:%.+]]> = vector-trip-count 537; CHECK-EMPTY: 538; CHECK-NEXT: vector.ph: 539; CHECK-NEXT: Successor(s): vector loop 540; CHECK-EMPTY: 541; CHECK-NEXT: <x1> vector loop: { 542; CHECK-NEXT: vector.body: 543; CHECK-NEXT: EMIT vp<[[CAN_IV:%.+]]> = CANONICAL-INDUCTION 544; CHECK-NEXT: WIDEN-INDUCTION %iv = phi 0, %iv.next, ir<1> 545; CHECK-NEXT: vp<[[STEPS:%.+]]> = SCALAR-STEPS vp<[[CAN_IV]]>, ir<0>, ir<1> 546; CHECK-NEXT: CLONE ir<%gep> = getelementptr ir<%ptr>, vp<[[STEPS]]> 547; CHECK-NEXT: WIDEN ir<%add> = add ir<%iv>, ir<%off> 548; CHECK-NEXT: WIDEN store ir<%gep>, ir<0> 549; CHECK-NEXT: EMIT vp<[[CAN_IV_NEXT:%.+]]> = VF * UF +(nuw) vp<[[CAN_IV]]> 550; CHECK-NEXT: EMIT branch-on-count vp<[[CAN_IV_NEXT]]> vp<[[VEC_TC]]> 551; CHECK-NEXT: No successors 552; CHECK-NEXT: } 553; CHECK-NEXT: Successor(s): middle.block 554; CHECK-EMPTY: 555; CHECK-NEXT: middle.block: 556; CHECK-NEXT: No successors 557; CHECK-EMPTY: 558; CHECK-NEXT: Live-out i32 %lcssa = ir<%add> 559; CHECK-NEXT: } 560; 561entry: 562 br label %loop 563 564loop: 565 %iv = phi i32 [ 0, %entry ], [ %iv.next, %loop ] 566 %gep = getelementptr inbounds i8, i8* %ptr, i32 %iv 567 %add = add i32 %iv, %off 568 store i8 0, i8* %gep 569 %iv.next = add nsw i32 %iv, 1 570 %ec = icmp eq i32 %iv.next, 1000 571 br i1 %ec, label %exit, label %loop 572 573exit: 574 %lcssa = phi i32 [ %add, %loop ] 575 ret i32 %lcssa 576} 577 578!llvm.dbg.cu = !{!0} 579!llvm.module.flags = !{!3, !4} 580 581!0 = distinct !DICompileUnit(language: DW_LANG_C99, file: !1, producer: "clang", isOptimized: true, runtimeVersion: 0, emissionKind: NoDebug, enums: !2) 582!1 = !DIFile(filename: "/tmp/s.c", directory: "/tmp") 583!2 = !{} 584!3 = !{i32 2, !"Debug Info Version", i32 3} 585!4 = !{i32 7, !"PIC Level", i32 2} 586!5 = distinct !DISubprogram(name: "f", scope: !1, file: !1, line: 4, type: !6, scopeLine: 4, flags: DIFlagPrototyped, spFlags: DISPFlagDefinition | DISPFlagOptimized, unit: !0, retainedNodes: !2) 587!6 = !DISubroutineType(types: !2) 588!7 = !DILocation(line: 5, column: 3, scope: !5) 589!8 = !DILocation(line: 5, column: 21, scope: !5) 590