Searched refs:LaneSize (Results 1 – 5 of 5) sorted by relevance
| /llvm-project-15.0.7/llvm/lib/Target/X86/ |
| H A D | X86InterleavedAccess.cpp | 446 for (int i = 0, LaneSize = VF / LaneCount; i != LaneSize; ++i) in createShuffleStride() local 447 Mask.push_back((i * Stride) % LaneSize + LaneSize * Lane); in createShuffleStride()
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| H A D | X86ISelLowering.cpp | 11633 if (Mask[i] >= 0 && (Mask[i] % Size) / LaneSize != i / LaneSize) in isLaneCrossingShuffleMask() 11694 if ((Mask[i] % Size) / LaneSize != i / LaneSize) in isRepeatedShuffleMask() 11701 : Mask[i] % LaneSize + LaneSize; in isRepeatedShuffleMask() 11751 if ((Mask[i] % Size) / LaneSize != i / LaneSize) in isRepeatedTargetShuffleMask() 11758 int LocalM = (Mask[i] % LaneSize) + (LaneM * LaneSize); in isRepeatedTargetShuffleMask() 12090 if ((M / LaneSize) != ((i / NumEltBytes) / LaneSize)) in lowerShuffleWithPSHUFB() 12093 M = M % LaneSize; in lowerShuffleWithPSHUFB() 16883 !all_of(Mask, [LaneSize](int M) { return M < LaneSize; })) in lowerShuffleAsLanePermuteAndShuffle() 16893 if (Mask[i] >= 0 && ((Mask[i] % Size) / LaneSize) != (i / LaneSize)) in lowerShuffleAsLanePermuteAndShuffle() 16913 if (((M % Size) / LaneSize) != (i / LaneSize)) in lowerShuffleAsLanePermuteAndShuffle() [all …]
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| /llvm-project-15.0.7/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyISelLowering.cpp | 2201 size_t LaneSize = in LowerBUILD_VECTOR() local 2203 assert(LaneSize > DestLaneSize); in LowerBUILD_VECTOR() 2204 Scale1 = LaneSize / DestLaneSize; in LowerBUILD_VECTOR() 2208 size_t LaneSize = in LowerBUILD_VECTOR() local 2210 assert(LaneSize > DestLaneSize); in LowerBUILD_VECTOR() 2211 Scale2 = LaneSize / DestLaneSize; in LowerBUILD_VECTOR()
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| /llvm-project-15.0.7/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 10494 for (unsigned LaneSize : {64U, 32U, 16U}) { in LowerVECTOR_SHUFFLE() 10496 if (isWideDUPMask(ShuffleMask, VT, LaneSize, Lane)) { in LowerVECTOR_SHUFFLE() 10497 unsigned Opcode = LaneSize == 64 ? AArch64ISD::DUPLANE64 in LowerVECTOR_SHUFFLE() 10498 : LaneSize == 32 ? AArch64ISD::DUPLANE32 in LowerVECTOR_SHUFFLE() 10501 MVT NewEltTy = MVT::getIntegerVT(LaneSize); in LowerVECTOR_SHUFFLE() 10502 unsigned NewEltCount = VT.getSizeInBits() / LaneSize; in LowerVECTOR_SHUFFLE() 21763 for (unsigned LaneSize : {64U, 32U, 16U}) { in LowerFixedLengthVECTOR_SHUFFLEToSVE() 21764 if (isREVMask(ShuffleMask, VT, LaneSize)) { in LowerFixedLengthVECTOR_SHUFFLEToSVE() 21766 getPackedSVEVectorVT(EVT::getIntegerVT(*DAG.getContext(), LaneSize)); in LowerFixedLengthVECTOR_SHUFFLEToSVE()
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| /llvm-project-15.0.7/clang/lib/CodeGen/ |
| H A D | CGBuiltin.cpp | 8250 unsigned LaneSize = V->getType()->getScalarSizeInBits(); in ARMMVEVectorElementReverse() local 8251 unsigned Elements = 128 / LaneSize; in ARMMVEVectorElementReverse() 8252 unsigned Mask = ReverseWidth / LaneSize - 1; in ARMMVEVectorElementReverse()
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