| /llvm-project-15.0.7/llvm/include/llvm/CodeGen/ |
| H A D | RegisterPressure.h | 40 LaneBitmask LaneMask; member 42 RegisterMaskPair(Register RegUnit, LaneBitmask LaneMask) in RegisterMaskPair() 43 : RegUnit(RegUnit), LaneMask(LaneMask) {} in RegisterMaskPair() 263 LaneBitmask LaneMask; member 265 IndexMaskPair(unsigned Index, LaneBitmask LaneMask) in IndexMaskPair() 266 : Index(Index), LaneMask(LaneMask) {} in IndexMaskPair() 299 return I->LaneMask; in contains() 309 InsertRes.first->LaneMask |= Pair.LaneMask; in insert() 322 LaneBitmask PrevMask = I->LaneMask; in erase() 323 I->LaneMask &= ~Pair.LaneMask; in erase() [all …]
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| H A D | ScheduleDAGInstrs.h | 54 LaneBitmask LaneMask; member 57 VReg2SUnit(unsigned VReg, LaneBitmask LaneMask, SUnit *SU) in VReg2SUnit() 58 : VirtReg(VReg), LaneMask(LaneMask), SU(SU) {} in VReg2SUnit() 69 VReg2SUnitOperIdx(unsigned VReg, LaneBitmask LaneMask, in VReg2SUnitOperIdx() 71 : VReg2SUnit(VReg, LaneMask, SU), OperandIndex(OperandIndex) {} in VReg2SUnitOperIdx()
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| H A D | LiveInterval.h | 696 LaneBitmask LaneMask; variable 699 SubRange(LaneBitmask LaneMask) : LaneMask(LaneMask) {} in SubRange() argument 702 SubRange(LaneBitmask LaneMask, const LiveRange &Other, in SubRange() argument 704 : LiveRange(Other, Allocator), LaneMask(LaneMask) {} in SubRange() 786 LaneBitmask LaneMask) { in createSubRange() argument 787 SubRange *Range = new (Allocator) SubRange(LaneMask); in createSubRange() 795 LaneBitmask LaneMask, in createSubRangeFrom() argument 797 SubRange *Range = new (Allocator) SubRange(LaneMask, CopyFrom, Allocator); in createSubRangeFrom() 827 LaneBitmask LaneMask, 870 void refineSubRanges(BumpPtrAllocator &Allocator, LaneBitmask LaneMask,
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| H A D | TargetRegisterInfo.h | 55 const LaneBitmask LaneMask; variable 208 return LaneMask; in getLaneMask() 389 LaneBitmask LaneMask, 666 LaneBitmask LaneMask) const { in reverseComposeSubRegIndexLaneMask() argument 668 return LaneMask; in reverseComposeSubRegIndexLaneMask() 669 return reverseComposeSubRegIndexLaneMaskImpl(IdxA, LaneMask); in reverseComposeSubRegIndexLaneMask()
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| H A D | MachineBasicBlock.h | 103 LaneBitmask LaneMask; 105 RegisterMaskPair(MCPhysReg PhysReg, LaneBitmask LaneMask) 106 : PhysReg(PhysReg), LaneMask(LaneMask) {} 378 LaneBitmask LaneMask = LaneBitmask::getAll()) { 379 LiveIns.push_back(RegisterMaskPair(PhysReg, LaneMask)); 400 LaneBitmask LaneMask = LaneBitmask::getAll()); 404 LaneBitmask LaneMask = LaneBitmask::getAll()) const;
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| H A D | LiveIntervalCalc.h | 39 void extendToUses(LiveRange &LR, Register Reg, LaneBitmask LaneMask,
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| H A D | LiveIntervals.h | 471 LaneBitmask LaneMask); 481 LaneBitmask LaneMask = LaneBitmask::getAll());
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| /llvm-project-15.0.7/llvm/lib/CodeGen/ |
| H A D | RegisterPressure.cpp | 101 if (!P.LaneMask.all()) in dump() 109 if (!P.LaneMask.all()) in dump() 378 return I->LaneMask; in getRegLanes() 391 I->LaneMask |= Pair.LaneMask; in addRegLanes() 415 I->LaneMask &= ~Pair.LaneMask; in removeRegLanes() 416 if (I->LaneMask.none()) in removeRegLanes() 626 LaneBitmask LaneMask = I->LaneMask & LiveBefore; in adjustLaneLiveness() local 627 if (LaneMask.none()) { in adjustLaneLiveness() 630 I->LaneMask = LaneMask; in adjustLaneLiveness() 730 PrevMask = I->LaneMask; in discoverLiveInOrOut() [all …]
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| H A D | MachineVerifier.cpp | 542 if (LaneMask.any()) in report_context() 543 report_context_lanemask(LaneMask); in report_context() 2245 if (LaneMask.any()) in checkLivenessAtUse() 2263 if (LaneMask.any()) in checkLivenessAtDef() 2272 if (LaneMask.any()) in checkLivenessAtDef() 2291 if (LaneMask.any()) in checkLivenessAtDef() 2931 if (LaneMask.any() && in verifyLiveRangeValue() 3081 if (LaneMask.any() && (LaneMask & SLM).none()) in verifyLiveRangeSegment() 3123 if (LaneMask.any()) { in verifyLiveRangeSegment() 3205 if ((Mask & SR.LaneMask).any()) { in verifyLiveInterval() [all …]
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| H A D | ScheduleDAGInstrs.cpp | 426 LaneBitmask LaneMask = I->LaneMask; in addVRegDefDeps() local 433 if ((LaneMask & DefLaneMask).any()) { in addVRegDefDeps() 443 LaneMask &= ~KillLaneMask; in addVRegDefDeps() 445 if (LaneMask.any()) { in addVRegDefDeps() 446 I->LaneMask = LaneMask; in addVRegDefDeps() 464 LaneBitmask LaneMask = DefLaneMask; in addVRegDefDeps() local 468 if ((V2SU.LaneMask & LaneMask).none()) in addVRegDefDeps() 487 LaneBitmask OverlapMask = V2SU.LaneMask & LaneMask; in addVRegDefDeps() 488 LaneBitmask NonOverlapMask = V2SU.LaneMask & ~LaneMask; in addVRegDefDeps() 490 V2SU.LaneMask = OverlapMask; in addVRegDefDeps() [all …]
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| H A D | LiveIntervals.cpp | 381 if ((SR.LaneMask & M).any()) { in extendSegmentsToUses() 437 assert(LaneMask.any() && in extendSegmentsToUses() 573 if ((LaneMask & SR.LaneMask).none()) in shrinkToUses() 776 DefinedLanesMask |= SR.LaneMask; in addKillFlags() 1035 if ((S.LaneMask & LaneMask).none()) in updateAllRanges() 1037 updateRange(S, Reg, S.LaneMask); in updateAllRanges() 1052 if ((S.LaneMask & LaneMask).none() || LI.covers(S)) in updateAllRanges() 1084 if (LaneMask.any()) in updateRange() 1094 handleMoveUp(LR, Reg, LaneMask); in updateRange() 1464 if (SubReg != 0 && LaneMask.any() in findLastUseBefore() [all …]
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| H A D | RenameIndependentSubregs.cpp | 183 LaneBitmask LaneMask = TRI.getSubRegIndexLaneMask(SubRegIdx); in findComponents() local 187 if ((SR.LaneMask & LaneMask).none()) in findComponents() 227 LaneBitmask LaneMask = TRI.getSubRegIndexLaneMask(SubRegIdx); in rewriteOperands() local 232 if ((SR.LaneMask & LaneMask).none()) in rewriteOperands() 285 SubRanges[ID-1] = Intervals[ID]->createSubRange(Allocator, SR.LaneMask); in distribute()
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| H A D | RegisterCoalescer.cpp | 1011 MaskA |= SA.LaneMask; in removeCopyByCommutingDef() 1014 Allocator, SA.LaneMask, in removeCopyByCommutingDef() 1438 SR.LaneMask = TRI->composeSubRegIndexLaneMask(DstIdx, SR.LaneMask); in reMaterializeTrivialDef() 1473 MaxMask &= ~SR.LaneMask; in reMaterializeTrivialDef() 1726 if ((S.LaneMask & Mask).none()) in addUndefFlag() 2342 const LaneBitmask LaneMask; member in __anoncc82f7ba0311::JoinVals 2507 : LR(LR), Reg(Reg), SubIdx(SubIdx), LaneMask(LaneMask), in JoinVals() 3272 ShrinkMask |= S.LaneMask; in pruneSubRegValues() 3286 ShrinkMask |= S.LaneMask; in pruneSubRegValues() 3495 Allocator, LaneMask, in mergeSubRangeInto() [all …]
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| H A D | LiveInterval.cpp | 900 if ((ExpectedDefMask & LaneMask).none()) in stripValuesNotDefiningMask() 917 BumpPtrAllocator &Allocator, LaneBitmask LaneMask, in refineSubRanges() argument 921 LaneBitmask ToApply = LaneMask; in refineSubRanges() 923 LaneBitmask SRMask = SR.LaneMask; in refineSubRanges() 924 LaneBitmask Matching = SRMask & LaneMask; in refineSubRanges() 935 SR.LaneMask = SRMask & ~Matching; in refineSubRanges() 968 assert((VRegMask & LaneMask).any()); in computeSubRangeUndefs() 977 if ((UndefMask & LaneMask).any()) { in computeSubRangeUndefs() 1027 OS << " L" << PrintLaneMask(LaneMask) << ' ' in print() 1080 assert((Mask & SR.LaneMask).none()); in verify() [all …]
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| H A D | LiveRangeEdit.cpp | 49 LI.createSubRange(Alloc, S.LaneMask); in createEmptyIntervalFrom() 141 if ((SR.LaneMask & LM).none()) in allUsesAvailableAt() 146 LM &= ~SR.LaneMask; in allUsesAvailableAt() 267 LaneBitmask LaneMask = TRI.getSubRegIndexLaneMask(SubReg); in useIsKill() local 269 if ((S.LaneMask & LaneMask).any() && S.Query(Idx).isKill()) in useIsKill()
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| H A D | RDFRegisters.cpp | 37 if (RC->LaneMask != RI.RegClass->LaneMask) { in PhysicalRegisterInfo() 67 UI.Mask = RC->LaneMask; in PhysicalRegisterInfo() 177 if (RC != nullptr && (RR.Mask & RC->LaneMask) == RC->LaneMask) in aliasRM() 237 LaneBitmask RCM = RI.RegClass ? RI.RegClass->LaneMask in mapTo()
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| H A D | SplitKit.cpp | 394 if (S.LaneMask == LM) in getSubrangeImpl() 416 if ((S.LaneMask & LM) == LM) in getSubRangeForMask() 457 if ((S.LaneMask & LM).any()) in addDeadDef() 542 if (LaneMask.all() || LaneMask == MRI.getMaxLaneMaskForVReg(FromReg)) { in buildCopy() 573 Allocator, LaneMask, in buildCopy() 609 LaneBitmask LaneMask; in defFromParent() local 611 LaneMask = LaneBitmask::getNone(); in defFromParent() 614 LaneMask |= S.LaneMask; in defFromParent() 617 LaneMask = LaneBitmask::getAll(); in defFromParent() 620 if (LaneMask.none()) { in defFromParent() [all …]
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| H A D | MachineBasicBlock.cpp | 415 if (!LI.LaneMask.all()) in print() 416 OS << ":0x" << PrintLaneMask(LI.LaneMask); in print() 558 void MachineBasicBlock::removeLiveIn(MCPhysReg Reg, LaneBitmask LaneMask) { in removeLiveIn() argument 564 I->LaneMask &= ~LaneMask; in removeLiveIn() 565 if (I->LaneMask.none()) in removeLiveIn() 576 bool MachineBasicBlock::isLiveIn(MCPhysReg Reg, LaneBitmask LaneMask) const { in isLiveIn() 579 return I != livein_end() && (I->LaneMask & LaneMask).any(); in isLiveIn() 593 LaneBitmask LaneMask = I->LaneMask; in sortUniqueLiveIns() local 595 LaneMask |= J->LaneMask; in sortUniqueLiveIns() 597 Out->LaneMask = LaneMask; in sortUniqueLiveIns()
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| H A D | VirtRegMap.cpp | 320 LaneBitmask LaneMask; in addLiveInsForSubRanges() local 329 LaneMask |= SR->LaneMask; in addLiveInsForSubRanges() 331 if (LaneMask.none()) in addLiveInsForSubRanges() 334 MBB->addLiveIn(PhysReg, LaneMask); in addLiveInsForSubRanges() 401 if ((SR.LaneMask & UseMask).any() && SR.liveAt(BaseIndex)) in readsUndefSubreg()
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| H A D | TargetRegisterInfo.cpp | 526 LaneBitmask LaneMask, SmallVectorImpl<unsigned> &NeededIndexes) const { in getCoveringSubRegIndexes() argument 537 if (SubRegMask == LaneMask) { in getCoveringSubRegIndexes() 543 if ((SubRegMask & ~LaneMask).any()) in getCoveringSubRegIndexes() 562 LaneBitmask LanesLeft = LaneMask & ~getSubRegIndexLaneMask(BestIdx); in getCoveringSubRegIndexes()
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| /llvm-project-15.0.7/llvm/include/llvm/MC/ |
| H A D | LaneBitmask.h | 94 inline Printable PrintLaneMask(LaneBitmask LaneMask) { in PrintLaneMask() argument 95 return Printable([LaneMask](raw_ostream &OS) { in PrintLaneMask() 96 OS << format(LaneBitmask::FormatStr, LaneMask.getAsInteger()); in PrintLaneMask()
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| /llvm-project-15.0.7/llvm/utils/TableGen/ |
| H A D | CodeGenRegisters.cpp | 104 if (LaneMask.any()) in computeLaneMask() 105 return LaneMask; in computeLaneMask() 108 LaneMask = LaneBitmask::getAll(); in computeLaneMask() 115 LaneMask = M; in computeLaneMask() 116 return LaneMask; in computeLaneMask() 1539 assert(Idx2.LaneMask == SrcMask); in computeSubRegLaneMasks() 1596 LaneBitmask LaneMask; in computeSubRegLaneMasks() local 1600 LaneMask |= SubRegIndex.LaneMask; in computeSubRegLaneMasks() 1605 if (LaneMask.none()) in computeSubRegLaneMasks() 1608 RegClass.LaneMask = LaneMask; in computeSubRegLaneMasks() [all …]
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| /llvm-project-15.0.7/llvm/lib/Target/AMDGPU/ |
| H A D | GCNRegPressure.cpp | 234 I->LaneMask |= UsedMask; in collectVirtualRegUses() 253 LiveMask |= S.LaneMask; in getLiveLaneMask() 313 AtMIPressure.inc(U.RegUnit, LiveMask, LiveMask | U.LaneMask, *MRI); in recede() 336 LiveMask |= U.LaneMask; in recede() 372 It.second &= ~S.LaneMask; in advanceBeforeNext()
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| /llvm-project-15.0.7/llvm/lib/Target/Hexagon/ |
| H A D | RDFCopy.cpp | 124 if ((RC.LaneMask & RR.Mask) == RC.LaneMask) in run()
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| H A D | HexagonBlockRanges.cpp | 240 if (I.LaneMask.all() || (I.LaneMask.any() && !S.isValid())) { in getLiveIns() 246 if ((I.LaneMask & TRI.getSubRegIndexLaneMask(SI)).any()) in getLiveIns()
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