| /llvm-project-15.0.7/lldb/test/API/functionalities/gdb_remote_client/ |
| H A D | TestProcessConnect.py | 22 self.dbg.GetSelectedTarget().GetProcess().Kill()
34 self.dbg.GetSelectedTarget().GetProcess().Kill()
48 self.dbg.GetSelectedTarget().GetProcess().Kill()
63 self.dbg.GetSelectedTarget().GetProcess().Kill()
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| H A D | TestPty.py | 67 self.dbg.GetSelectedTarget().GetProcess().Kill()
93 self.dbg.GetSelectedTarget().GetProcess().Kill()
119 self.dbg.GetSelectedTarget().GetProcess().Kill()
139 self.dbg.GetSelectedTarget().GetProcess().Kill()
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| H A D | TestPlatformKill.py | 41 self.assertSuccess(host_platform.Kill(host_process.pid))
48 self.assertSuccess(process.Kill())
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| /llvm-project-15.0.7/llvm/lib/Target/AVR/ |
| H A D | AVRFrameLowering.cpp | 72 .addReg(AVR::R1R0, RegState::Kill) in emitPrologue()
79 .addReg(AVR::R0, RegState::Kill) in emitPrologue()
83 .addReg(AVR::R1, RegState::Kill) in emitPrologue()
84 .addReg(AVR::R1, RegState::Kill) in emitPrologue()
121 .addReg(AVR::R29R28, RegState::Kill) in emitPrologue()
148 .addReg(AVR::R0, RegState::Kill); in restoreStatusRegister()
204 .addReg(AVR::R29R28, RegState::Kill) in emitEpilogue()
212 .addReg(AVR::R29R28, RegState::Kill); in emitEpilogue()
358 .addReg(AVR::R31R30, RegState::Kill) in eliminateCallFramePseudoInstr()
388 .addReg(AVR::R31R30, RegState::Kill) in eliminateCallFramePseudoInstr()
[all …]
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| H A D | AVRExpandPseudoInsts.cpp | 1376 .addReg(DstReg, RegState::Kill) in expand()
1377 .addReg(DstReg, RegState::Kill); in expand()
2092 .addReg(DstReg, RegState::Kill) in expandLSLB7Rd()
2098 .addReg(DstReg, RegState::Kill) in expandLSLB7Rd()
2099 .addReg(DstReg, RegState::Kill); in expandLSLB7Rd()
2142 .addReg(DstReg, RegState::Kill) in expandLSRB7Rd()
2143 .addReg(DstReg, RegState::Kill) in expandLSRB7Rd()
2149 .addReg(DstReg, RegState::Kill) in expandLSRB7Rd()
2200 .addReg(DstReg, RegState::Kill) in expandASRB6Rd()
2205 .addReg(DstReg, RegState::Kill) in expandASRB6Rd()
[all …]
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| H A D | AVRRegisterInfo.cpp | 213 .addReg(DstReg, RegState::Kill) in eliminateFrameIndex()
243 .addReg(AVR::R29R28, RegState::Kill) in eliminateFrameIndex()
250 .addReg(AVR::R0, RegState::Kill); in eliminateFrameIndex()
255 .addReg(AVR::R29R28, RegState::Kill) in eliminateFrameIndex()
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| /llvm-project-15.0.7/llvm/lib/Target/AMDGPU/ |
| H A D | SIFormMemoryClauses.cpp | 142 S |= RegState::Kill; in getMopState()
343 MachineInstrBuilder Kill; in runOnMachineFunction() local
358 KillOps.emplace_back(R.second.first | RegState::Kill, in runOnMachineFunction()
377 KillOps.emplace_back(R.second.first | RegState::Kill, SubReg); in runOnMachineFunction()
389 Kill = BuildMI(*MI.getParent(), std::next(LastClauseInst), in runOnMachineFunction()
392 Kill.addUse(Reg, std::get<0>(Op), std::get<1>(Op)); in runOnMachineFunction()
393 Ind->insertMachineInstrInMaps(*Kill); in runOnMachineFunction()
396 if (!Kill) { in runOnMachineFunction()
402 RPT.reset(*Kill, &LiveRegsCopy); in runOnMachineFunction()
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| H A D | SIPostRABundler.cpp | 187 MachineInstr &Kill = *Next; in runOnMachineFunction() local
188 collectUsedRegUnits(Kill, KillUsedRegUnits); in runOnMachineFunction()
198 Kill.eraseFromParent(); in runOnMachineFunction()
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| /llvm-project-15.0.7/llvm/lib/Target/XCore/ |
| H A D | XCoreRegisterInfo.cpp | 108 .addReg(ScratchOffset, RegState::Kill) in InsertFPConstInst()
115 .addReg(ScratchOffset, RegState::Kill) in InsertFPConstInst()
121 .addReg(ScratchOffset, RegState::Kill); in InsertFPConstInst()
184 .addReg(ScratchBase, RegState::Kill) in InsertSPConstInst()
185 .addReg(ScratchOffset, RegState::Kill) in InsertSPConstInst()
191 .addReg(ScratchBase, RegState::Kill) in InsertSPConstInst()
192 .addReg(ScratchOffset, RegState::Kill) in InsertSPConstInst()
197 .addReg(ScratchBase, RegState::Kill) in InsertSPConstInst()
198 .addReg(ScratchOffset, RegState::Kill); in InsertSPConstInst()
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| /llvm-project-15.0.7/llvm/include/llvm/CodeGen/ |
| H A D | LiveRangeCalc.h | 112 SlotIndex Kill; member
118 : LR(LR), DomNode(node), Kill(kill) {} in LiveInBlock()
244 SlotIndex Kill = SlotIndex()) {
245 LiveIn.push_back(LiveInBlock(LR, DomNode, Kill));
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| H A D | LiveInterval.h | 94 const bool Kill; variable
98 bool Kill) in LiveQueryResult() argument
99 : EarlyVal(EarlyVal), LateVal(LateVal), EndPoint(EndPoint), Kill(Kill) in LiveQueryResult()
113 return Kill; in isKill()
497 SlotIndex StartIdx, SlotIndex Kill);
504 VNInfo *extendInBlock(SlotIndex StartIdx, SlotIndex Kill);
554 bool Kill = false; in Query() local
560 Kill = true; in Query()
562 return LiveQueryResult(EarlyVal, LateVal, EndPoint, Kill); in Query()
577 return LiveQueryResult(EarlyVal, LateVal, EndPoint, Kill); in Query()
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| /llvm-project-15.0.7/llvm/lib/Target/Hexagon/ |
| H A D | HexagonSplitDouble.cpp | 807 .addReg(Op1.getReg(), RS & ~RegState::Kill, LoSR); in splitShift()
838 .addReg(Op1.getReg(), RS & ~RegState::Kill, LoSR) in splitShift()
844 .addReg(Op1.getReg(), RS & ~RegState::Kill, LoSR) in splitShift()
855 .addReg(Op1.getReg(), RS & ~RegState::Kill, HiSR) in splitShift()
942 .addReg(Op1.getReg(), RS1 & ~RegState::Kill, LoSR) in splitAslOr()
943 .addReg(Op2.getReg(), RS2 & ~RegState::Kill, LoSR); in splitAslOr()
949 .addReg(Op1.getReg(), RS1 & ~RegState::Kill, LoSR) in splitAslOr()
950 .addReg(Op2.getReg(), RS2 & ~RegState::Kill, LoSR) in splitAslOr()
954 .addReg(Op2.getReg(), RS2 & ~RegState::Kill, LoSR) in splitAslOr()
971 .addReg(Op1.getReg(), RS1 & ~RegState::Kill, LoSR); in splitAslOr()
[all …]
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| /llvm-project-15.0.7/llvm/lib/CodeGen/ |
| H A D | LiveRangeCalc.cpp | 72 if (I.Kill.isValid()) in updateFromLiveIns()
74 End = I.Kill; in updateFromLiveIns()
319 LiveIn.back().Kill = Use; in findReachingDefs()
405 if (I.Kill.isValid()) { in updateSSA()
407 LR.addSegment(LiveInterval::Segment(Start, I.Kill, VNI)); in updateSSA()
418 if (I.Kill.isValid()) in updateSSA()
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| H A D | ExecutionDomainFix.cpp | 235 void ExecutionDomainFix::processDefs(MachineInstr *MI, bool Kill) { in processDefs() argument
251 if (Kill) in processDefs()
404 bool Kill = false; in processBasicBlock() local
406 Kill = visitInstr(&MI); in processBasicBlock()
407 processDefs(&MI, Kill); in processBasicBlock()
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| /llvm-project-15.0.7/llvm/lib/Target/BPF/ |
| H A D | BPFInstrInfo.cpp | 82 .addReg(ScratchReg, RegState::Kill).addReg(DstReg) in expandMEMCPY()
95 .addReg(ScratchReg, RegState::Kill).addReg(DstReg).addImm(Offset); in expandMEMCPY()
102 .addReg(ScratchReg, RegState::Kill).addReg(DstReg).addImm(Offset); in expandMEMCPY()
109 .addReg(ScratchReg, RegState::Kill).addReg(DstReg).addImm(Offset); in expandMEMCPY()
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| /llvm-project-15.0.7/lldb/examples/python/ |
| H A D | disasm.py | 112 process.Kill()
123 process.Kill()
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| /llvm-project-15.0.7/llvm/lib/Target/ARM/ |
| H A D | Thumb1FrameLowering.cpp | 92 .addReg(ScratchReg, RegState::Kill) in emitPrologueEpilogueSPUpdate()
459 .addReg(ARM::SP, RegState::Kill) in emitPrologue()
464 .addReg(ARM::R4, RegState::Kill) in emitPrologue()
470 .addReg(ARM::R4, RegState::Kill) in emitPrologue()
475 .addReg(ARM::R4, RegState::Kill) in emitPrologue()
766 .addReg(PopReg, RegState::Kill) in emitPopSpecialFixUp()
783 .addReg(PopReg, RegState::Kill) in emitPopSpecialFixUp()
824 .addReg(PopReg, RegState::Kill) in emitPopSpecialFixUp()
950 PushMIB.addReg(Reg, RegState::Kill); in pushRegsToStack()
1018 .addReg(*CopyReg, RegState::Kill) in popRegsFromStack()
[all …]
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| /llvm-project-15.0.7/lldb/test/API/functionalities/process_save_core/ |
| H A D | TestProcessSaveCore.py | 44 self.assertSuccess(process.Kill())
78 self.assertSuccess(process.Kill())
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| /llvm-project-15.0.7/llvm/lib/Target/Mips/ |
| H A D | MipsExpandPseudo.cpp | 158 .addReg(Scratch, RegState::Kill) in expandAtomicCmpSwapSubword()
161 .addReg(Scratch, RegState::Kill) in expandAtomicCmpSwapSubword()
164 .addReg(Scratch, RegState::Kill) in expandAtomicCmpSwapSubword()
168 .addReg(Scratch, RegState::Kill) in expandAtomicCmpSwapSubword()
184 .addReg(Dest, RegState::Kill) in expandAtomicCmpSwapSubword()
187 .addReg(Dest, RegState::Kill) in expandAtomicCmpSwapSubword()
280 .addReg(Dest, RegState::Kill).addReg(OldVal).addMBB(exitMBB); in expandAtomicCmpSwap()
290 .addReg(Scratch, RegState::Kill).addReg(ZERO).addMBB(loop1MBB); in expandAtomicCmpSwap()
559 .addReg(Dest, RegState::Kill) in expandAtomicBinOpSubword()
562 .addReg(Dest, RegState::Kill) in expandAtomicBinOpSubword()
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| H A D | Mips16InstrInfo.cpp | 290 MIB2.addReg(Mips::SP, RegState::Kill); in adjustStackPtrBig()
293 MIB3.addReg(Reg2, RegState::Kill); in adjustStackPtrBig()
296 MIB4.addReg(Reg1, RegState::Kill); in adjustStackPtrBig()
418 .addReg(SpReg, RegState::Kill) in loadImmediate()
423 .addReg(Reg, RegState::Kill); in loadImmediate()
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| /llvm-project-15.0.7/llvm/test/CodeGen/AArch64/ |
| H A D | machine-copy-remove.mir | 264 # Kill marker should be removed from compare.
290 # Kill marker should be removed from compare.
316 # Kill marker should be removed from compare.
342 # Kill marker should remain on compare.
489 # Kill marker should be removed from compare.
515 # Kill marker should be removed from compare.
541 # Kill marker should be removed from compare.
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| /llvm-project-15.0.7/llvm/lib/Target/RISCV/ |
| H A D | RISCVRegisterInfo.cpp | 215 .addReg(ScratchReg, RegState::Kill); in eliminateFrameIndex()
221 .addReg(ScratchReg, RegState::Kill); in eliminateFrameIndex()
253 .addReg(ScalableFactorRegister, RegState::Kill); in eliminateFrameIndex()
260 .addReg(ScalableFactorRegister, RegState::Kill); in eliminateFrameIndex()
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| /llvm-project-15.0.7/llvm/lib/Target/PowerPC/ |
| H A D | PPCRegisterInfo.cpp | 734 .addReg(Reg, RegState::Kill) in lowerDynamicAlloc()
742 .addReg(Reg, RegState::Kill) in lowerDynamicAlloc()
825 .addReg(NegSizeReg1, RegState::Kill); in prepareDynamicAlloca()
951 .addReg(Reg1, RegState::Kill) in lowerCRSpilling()
1002 .addReg(Reg, RegState::Kill); in lowerCRRestore()
1110 .addReg(Reg1, RegState::Kill) in lowerCRBitSpilling()
1159 .addReg(RegO, RegState::Kill) in lowerCRBitRestore()
1160 .addReg(Reg, RegState::Kill) in lowerCRBitRestore()
1167 .addReg(RegO, RegState::Kill) in lowerCRBitRestore()
1619 .addReg(SRegHi, RegState::Kill) in eliminateFrameIndex()
[all …]
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| /llvm-project-15.0.7/llvm/lib/Target/AArch64/ |
| H A D | AArch64ExpandPseudoInsts.cpp | 226 .addReg(AArch64::NZCV, RegState::Implicit | RegState::Kill); in expandCMP_SWAP()
338 .addUse(StatusReg, RegState::Kill) in expandCMP_SWAP_128()
339 .addUse(StatusReg, RegState::Kill) in expandCMP_SWAP_128()
586 DOP.addReg(MI.getOperand(DOPIdx).getReg(), RegState::Kill) in expand_DestructiveOp()
594 .addReg(MI.getOperand(DOPIdx).getReg(), RegState::Kill) in expand_DestructiveOp()
599 .addReg(MI.getOperand(DOPIdx).getReg(), RegState::Kill) in expand_DestructiveOp()
697 bool Kill = (Offset + 1 == N) ? MI.getOperand(1).isKill() : false; in expandSVESpillFill() local
704 .addReg(MI.getOperand(1).getReg(), getKillRegState(Kill)) in expandSVESpillFill()
918 RegState::Kill | in expandMI()
1030 .addReg(DstReg, RegState::Kill) in expandMI()
[all …]
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| H A D | AArch64SpeculationHardening.cpp | 400 .addUse(TmpReg, RegState::Kill | RegState::Renamable) in insertRegToSPTaintPropagation()
401 .addUse(MisspeculatingTaintReg, RegState::Kill) in insertRegToSPTaintPropagation()
406 .addUse(TmpReg, RegState::Kill) in insertRegToSPTaintPropagation()
578 .addUse(SrcReg, RegState::Kill) in expandSpeculationSafeValue()
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