Lines Matching refs:Kill
457 .addReg(DstHiReg, RegState::Kill); in expand()
713 .addReg(SrcReg, RegState::Kill); in expand()
719 .addReg(SrcReg, RegState::Kill); in expand()
746 .addReg(SrcReg, RegState::Kill); in expand()
752 .addReg(SrcReg, RegState::Kill); in expand()
1105 .addReg(DstReg, RegState::Kill) in expand()
1112 .addReg(DstReg, RegState::Kill) in expand()
1140 .addReg(DstReg, RegState::Kill) in expand()
1147 .addReg(DstReg, RegState::Kill) in expand()
1177 .addReg(DstReg, RegState::Kill) in expand()
1181 .addReg(DstReg, RegState::Kill) in expand()
1376 .addReg(DstReg, RegState::Kill) in expand()
1377 .addReg(DstReg, RegState::Kill); in expand()
1491 .addReg(DstHiReg, RegState::Kill); in expandLSLW4Rd()
1494 .addReg(DstLoReg, RegState::Kill); in expandLSLW4Rd()
1500 .addReg(DstHiReg, RegState::Kill) in expandLSLW4Rd()
1509 .addReg(DstHiReg, RegState::Kill) in expandLSLW4Rd()
1580 .addReg(DstHiReg, RegState::Kill); in expandLSLW12Rd()
1689 .addReg(DstHiReg, RegState::Kill); in expandLSRW4Rd()
1692 .addReg(DstLoReg, RegState::Kill); in expandLSRW4Rd()
1698 .addReg(DstLoReg, RegState::Kill) in expandLSRW4Rd()
1707 .addReg(DstLoReg, RegState::Kill) in expandLSRW4Rd()
1778 .addReg(DstLoReg, RegState::Kill); in expandLSRW12Rd()
1903 .addReg(DstLoReg, RegState::Kill) in expandASRW7Rd()
1904 .addReg(DstLoReg, RegState::Kill); in expandASRW7Rd()
1950 .addReg(DstHiReg, RegState::Kill) in expandASRW8Rd()
1951 .addReg(DstHiReg, RegState::Kill); in expandASRW8Rd()
1986 .addReg(DstHiReg, RegState::Kill) in expandASRW14Rd()
1987 .addReg(DstHiReg, RegState::Kill); in expandASRW14Rd()
1992 .addReg(DstLoReg, RegState::Kill) in expandASRW14Rd()
1993 .addReg(DstLoReg, RegState::Kill); in expandASRW14Rd()
1998 .addReg(DstHiReg, RegState::Kill) in expandASRW14Rd()
1999 .addReg(DstHiReg, RegState::Kill); in expandASRW14Rd()
2037 .addReg(DstHiReg, RegState::Kill) in expandASRW15Rd()
2038 .addReg(DstHiReg, RegState::Kill); in expandASRW15Rd()
2044 .addReg(DstHiReg, RegState::Kill) in expandASRW15Rd()
2045 .addReg(DstHiReg, RegState::Kill); in expandASRW15Rd()
2092 .addReg(DstReg, RegState::Kill) in expandLSLB7Rd()
2098 .addReg(DstReg, RegState::Kill) in expandLSLB7Rd()
2099 .addReg(DstReg, RegState::Kill); in expandLSLB7Rd()
2142 .addReg(DstReg, RegState::Kill) in expandLSRB7Rd()
2143 .addReg(DstReg, RegState::Kill) in expandLSRB7Rd()
2149 .addReg(DstReg, RegState::Kill) in expandLSRB7Rd()
2150 .addReg(DstReg, RegState::Kill); in expandLSRB7Rd()
2200 .addReg(DstReg, RegState::Kill) in expandASRB6Rd()
2201 .addReg(DstReg, RegState::Kill); in expandASRB6Rd()
2205 .addReg(DstReg, RegState::Kill) in expandASRB6Rd()
2206 .addReg(DstReg, RegState::Kill); in expandASRB6Rd()
2231 .addReg(DstReg, RegState::Kill) in expandASRB7Rd()
2232 .addReg(DstReg, RegState::Kill); in expandASRB7Rd()
2303 .addReg(DstHiReg, RegState::Kill) in expand()
2304 .addReg(DstHiReg, RegState::Kill); in expand()
2309 .addReg(DstHiReg, RegState::Kill) in expand()
2310 .addReg(DstHiReg, RegState::Kill); in expand()
2349 .addReg(DstHiReg, RegState::Kill | RegState::Undef) in expand()
2350 .addReg(DstHiReg, RegState::Kill | RegState::Undef); in expand()
2410 .addReg(AVR::R0, RegState::Kill) in expand()