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Searched refs:IsNan (Results 1 – 8 of 8) sorted by relevance

/llvm-project-15.0.7/mlir/test/Dialect/SPIRV/IR/
H A Dlogical-ops.mlir54 // spv.IsNan
58 // CHECK: spv.IsNan {{.*}} : f32
59 %0 = spv.IsNan %arg0 : f32
64 // CHECK: spv.IsNan {{.*}} : vector<2xf32>
65 %0 = spv.IsNan %arg0 : vector<2xf32>
/llvm-project-15.0.7/mlir/test/Target/SPIRV/
H A Dlogical-ops.mlir83 // CHCK: spv.IsNan
84 %15 = spv.IsNan %arg0 : f32
/llvm-project-15.0.7/mlir/test/Conversion/ArithmeticToSPIRV/
H A Darithmetic-to-spirv.mlir337 // Without Kernel capability, we need to convert NaN check to spv.IsNan.
345 // CHECK: %[[LHS_NAN:.+]] = spv.IsNan %[[LHS]] : f32
346 // CHECK-NEXT: %[[RHS_NAN:.+]] = spv.IsNan %[[RHS]] : f32
351 // CHECK-NEXT: %[[LHS_NAN:.+]] = spv.IsNan %[[LHS]] : f32
352 // CHECK-NEXT: %[[RHS_NAN:.+]] = spv.IsNan %[[RHS]] : f32
1323 // Without Kernel capability, we need to convert NaN check to spv.IsNan.
1331 // CHECK: %[[LHS_NAN:.+]] = spv.IsNan %[[LHS]] : f32
1332 // CHECK-NEXT: %[[RHS_NAN:.+]] = spv.IsNan %[[RHS]] : f32
1337 // CHECK-NEXT: %[[LHS_NAN:.+]] = spv.IsNan %[[LHS]] : f32
1338 // CHECK-NEXT: %[[RHS_NAN:.+]] = spv.IsNan %[[RHS]] : f32
/llvm-project-15.0.7/mlir/include/mlir/Dialect/SPIRV/IR/
H A DSPIRVLogicalOps.td554 def SPV_IsNanOp : SPV_LogicalUnaryOp<"IsNan", SPV_Float, []> {
572 isnan-op ::= ssa-id `=` `spv.IsNan` ssa-use
579 %2 = spv.IsNan %0: f32
580 %3 = spv.IsNan %1: vector<4xi32>
/llvm-project-15.0.7/llvm/lib/Analysis/
H A DInstructionSimplify.cpp5111 bool IsNan = match(V, m_NaN()); in simplifyFPOp() local
5118 if (FMF.noNaNs() && (IsNan || IsUndef)) in simplifyFPOp()
5124 if (IsUndef || IsNan) in simplifyFPOp()
5127 if (IsNan) in simplifyFPOp()
/llvm-project-15.0.7/llvm/lib/Target/AMDGPU/
H A DAMDGPULegalizerInfo.cpp2875 auto IsNan = B.buildFCmp(CmpInst::FCMP_ORD, S1, ModSrc, ModSrc, Flags); in legalizeFFloor() local
2876 CorrectedFract = B.buildSelect(S64, IsNan, ModSrc, Min, Flags).getReg(0); in legalizeFFloor()
/llvm-project-15.0.7/llvm/lib/CodeGen/SelectionDAG/
H A DTargetLowering.cpp7795 SDValue IsNan = DAG.getSetCC(DL, ResultVT, AbsV, InfV, ISD::SETGT); in expandIS_FPCLASS() local
7798 PartialRes = DAG.getNode(ISD::AND, DL, ResultVT, IsNan, IsNotQnan); in expandIS_FPCLASS()
/llvm-project-15.0.7/clang/lib/CodeGen/
H A DCGBuiltin.cpp3332 Value *IsNan = Builder.CreateFCmpUNO(V, V, "cmp"); in EmitBuiltinExpr() local
3335 Builder.CreateCondBr(IsNan, End, NotNan); in EmitBuiltinExpr()