| /llvm-project-15.0.7/llvm/lib/Target/Mips/ |
| H A D | MipsSERegisterInfo.cpp | 200 bool IsKill = false; in eliminateFI() local
235 IsKill = true; in eliminateFI()
252 IsKill = true; in eliminateFI()
256 MI.getOperand(OpNo).ChangeToRegister(FrameReg, false, false, IsKill); in eliminateFI()
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| H A D | Mips16RegisterInfo.cpp | 123 bool IsKill = false; in eliminateFI() local
139 IsKill = true; in eliminateFI()
141 MI.getOperand(OpNo).ChangeToRegister(FrameReg, false, false, IsKill); in eliminateFI()
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| /llvm-project-15.0.7/llvm/lib/CodeGen/ |
| H A D | FixupStatepointCallerSaved.cpp | 112 bool &IsKill, const TargetInstrInfo &TII, in performCopyPropagation() argument
117 IsKill = false; in performCopyPropagation()
154 IsKill = DestSrc->Source->isKill(); in performCopyPropagation()
161 } else if (IsKill) { in performCopyPropagation()
419 bool IsKill = true; in spillRegisters() local
421 Reg = performCopyPropagation(Reg, InsertBefore, IsKill, TII, TRI); in spillRegisters()
424 TII.storeRegToStackSlot(*MI.getParent(), InsertBefore, Reg, IsKill, FI, in spillRegisters()
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| H A D | ScheduleDAGInstrs.cpp | 394 bool IsKill = MO.getSubReg() == 0 || MO.isUndef(); in addVRegDefDeps() local
398 KillLaneMask = IsKill ? LaneBitmask::getAll() : DefLaneMask; in addVRegDefDeps()
1096 bool IsKill = LiveRegs.available(MRI, Reg); in toggleKills() local
1097 MO.setIsKill(IsKill); in toggleKills()
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| /llvm-project-15.0.7/llvm/lib/Target/M68k/ |
| H A D | M68kInstrBuilder.h | 50 bool IsKill, int Offset) { in addRegIndirectWithDisp() argument
51 return MIB.addImm(Offset).addReg(Reg, getKillRegState(IsKill)); in addRegIndirectWithDisp()
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| H A D | M68kInstrInfo.h | 282 bool IsKill, int FrameIndex,
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| H A D | M68kInstrInfo.cpp | 744 Register SrcReg, bool IsKill, in storeRegToStackSlot() argument
755 .addReg(SrcReg, getKillRegState(IsKill)); in storeRegToStackSlot()
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| /llvm-project-15.0.7/llvm/lib/Target/LoongArch/ |
| H A D | LoongArchInstrInfo.cpp | 54 bool IsKill, int FI, const TargetRegisterClass *RC, in storeRegToStackSlot() argument
79 .addReg(SrcReg, getKillRegState(IsKill)) in storeRegToStackSlot()
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| H A D | LoongArchInstrInfo.h | 36 bool IsKill, int FrameIndex,
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| /llvm-project-15.0.7/llvm/lib/Target/BPF/ |
| H A D | BPFInstrInfo.cpp | 126 Register SrcReg, bool IsKill, int FI, in storeRegToStackSlot() argument
135 .addReg(SrcReg, getKillRegState(IsKill)) in storeRegToStackSlot()
140 .addReg(SrcReg, getKillRegState(IsKill)) in storeRegToStackSlot()
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| /llvm-project-15.0.7/llvm/lib/Target/AMDGPU/ |
| H A D | SIRegisterInfo.cpp | 84 bool IsKill; member
120 bool IsKill, int Index, RegScavenger *RS) in SGPRSpillBuilder()
121 : SuperReg(Reg), MI(MI), IsKill(IsKill), DL(MI->getDebugLoc()), in SGPRSpillBuilder()
1179 .addReg(Src, getKillRegState(IsKill)); in spillVGPRtoAGPR()
1187 .addReg(Src, getKillRegState(IsKill)); in spillVGPRtoAGPR()
1272 unsigned LoadStoreOp, int Index, Register ValueReg, bool IsKill, in buildSpillLoadStore() argument
1494 SrcDstRegState |= getKillRegState(IsKill); in buildSpillLoadStore()
1638 bool IsKill) const { in buildVGPRSpillLoadStore()
1696 bool UseKill = SB.IsKill && i == SB.NumSubRegs - 1; in spillSGPR()
1767 SuperKillState |= getKillRegState(SB.IsKill); in spillSGPR()
[all …]
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| H A D | SIShrinkInstructions.cpp | 283 bool IsKill = NewAddrDwords == Info->VAddrDwords; in shrinkMIMG() local
302 IsKill = false; in shrinkMIMG()
335 MI.getOperand(VAddr0Idx).setIsKill(IsKill); in shrinkMIMG()
489 const bool IsKill = SrcReg->isKill(); in shrinkScalarLogicOp() local
496 /*isImp*/ false, IsKill, in shrinkScalarLogicOp()
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| H A D | SIOptimizeExecMaskingPreRA.cpp | 282 bool IsKill = SelLI->Query(CmpIdx.getRegSlot()).isKill(); in optimizeVcndVcmpPair() local
285 if (MRI->use_nodbg_empty(SelReg) && (IsKill || IsDead)) { in optimizeVcndVcmpPair()
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| /llvm-project-15.0.7/llvm/lib/Target/CSKY/ |
| H A D | CSKYInstrInfo.h | 45 bool IsKill, int FrameIndex,
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| H A D | CSKYInstrInfo.cpp | 393 Register SrcReg, bool IsKill, int FI, in storeRegToStackSlot() argument
428 .addReg(SrcReg, getKillRegState(IsKill)) in storeRegToStackSlot()
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| /llvm-project-15.0.7/llvm/lib/Target/ARC/ |
| H A D | ARCInstrInfo.h | 72 bool IsKill, int FrameIndex,
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| H A D | ARCInstrInfo.cpp | 295 Register SrcReg, bool IsKill, in storeRegToStackSlot() argument
316 .addReg(SrcReg, getKillRegState(IsKill)) in storeRegToStackSlot()
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| /llvm-project-15.0.7/llvm/lib/Target/Hexagon/ |
| H A D | HexagonFrameLowering.cpp | 1422 bool IsKill = !HRI.isEHReturnCalleeSaveReg(Reg); in insertCSRSpillsInBlock() local
1426 if (IsKill) in insertCSRSpillsInBlock()
1785 bool IsKill = MI->getOperand(2).isKill(); in expandStoreInt() local
1794 .addReg(SrcR, getKillRegState(IsKill)); in expandStoreInt()
1848 bool IsKill = MI->getOperand(2).isKill(); in expandStoreVecPred() local
1863 .addReg(SrcR, getKillRegState(IsKill)) in expandStoreVecPred()
1937 bool IsKill = MI->getOperand(2).isKill(); in expandStoreVec2() local
1957 .addReg(SrcLo, getKillRegState(IsKill)) in expandStoreVec2()
1968 .addReg(SrcHi, getKillRegState(IsKill)) in expandStoreVec2()
2035 bool IsKill = MI->getOperand(2).isKill(); in expandStoreVec() local
[all …]
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| H A D | HexagonBlockRanges.cpp | 326 bool IsKill = Op.isKill(); in computeInitialLiveRanges() local
329 if (IsKill) in computeInitialLiveRanges()
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| H A D | HexagonFrameLowering.h | 175 bool IsDef, bool IsKill) const;
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| /llvm-project-15.0.7/llvm/lib/Target/AArch64/ |
| H A D | AArch64AdvSIMDScalarPass.cpp | 275 unsigned Dst, unsigned Src, bool IsKill) { in insertCopy() argument
278 .addReg(Src, getKillRegState(IsKill)); in insertCopy()
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| /llvm-project-15.0.7/llvm/lib/Target/Lanai/ |
| H A D | LanaiInstrInfo.h | 57 Register SourceRegister, bool IsKill, int FrameIndex,
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| H A D | LanaiInstrInfo.cpp | 51 Register SourceRegister, bool IsKill, int FrameIndex, in storeRegToStackSlot() argument
63 .addReg(SourceRegister, getKillRegState(IsKill)) in storeRegToStackSlot()
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| /llvm-project-15.0.7/llvm/lib/Support/Unix/ |
| H A D | Signals.inc | 298 enum class SignalKind { IsKill, IsInfo };
307 case SignalKind::IsKill:
325 registerHandler(S, SignalKind::IsKill);
327 registerHandler(S, SignalKind::IsKill);
329 registerHandler(SIGPIPE, SignalKind::IsKill);
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| /llvm-project-15.0.7/llvm/lib/Target/RISCV/ |
| H A D | RISCVInstrInfo.h | 63 bool IsKill, int FrameIndex,
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