| /llvm-project-15.0.7/llvm/lib/XRay/ |
| H A D | InstrumentationMap.cpp | 146 bool Is32Bit = ObjFile.getBinary()->makeTriple().isArch32Bit(); in loadObj() local
147 size_t ELFSledEntrySize = Is32Bit ? 16 : 32; in loadObj()
165 const int WordSize = Is32Bit ? 4 : 8; in loadObj()
176 if (Is32Bit) in loadObj()
181 if (Is32Bit) in loadObj()
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| /llvm-project-15.0.7/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64InstructionSelector.cpp | 1091 const bool Is32Bit = Size == 32; in emitSelect() local
1102 auto TryFoldBinOpIntoSelect = [&Opc, Is32Bit, &CC, &MRI, in emitSelect()
1117 Opc = Is32Bit ? AArch64::CSNEGWr : AArch64::CSNEGXr; in emitSelect()
1134 Opc = Is32Bit ? AArch64::CSINVWr : AArch64::CSINVXr; in emitSelect()
1153 Opc = Is32Bit ? AArch64::CSINCWr : AArch64::CSINCXr; in emitSelect()
1178 Register ZReg = Is32Bit ? AArch64::WZR : AArch64::XZR; in emitSelect()
1185 Opc = Is32Bit ? AArch64::CSINCWr : AArch64::CSINCXr; in emitSelect()
1193 Opc = Is32Bit ? AArch64::CSINVWr : AArch64::CSINVXr; in emitSelect()
1204 Opc = Is32Bit ? AArch64::CSINCWr : AArch64::CSINCXr; in emitSelect()
4458 bool Is32Bit = Size == 32; in emitAddSub() local
[all …]
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| /llvm-project-15.0.7/lldb/source/Plugins/ObjectFile/ELF/ |
| H A D | ELFHeader.h | 85 bool Is32Bit() const { in Is32Bit() function
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| H A D | ELFHeader.cpp | 120 const unsigned byte_size = Is32Bit() ? 4 : 8; in Parse()
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| H A D | ObjectFileELF.cpp | 2480 if (hdr->Is32Bit()) { in ParsePLTRelocations()
2608 if (hdr->Is32Bit()) { in ApplyRelocations()
2622 if (hdr->Is32Bit()) { in ApplyRelocations()
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| /llvm-project-15.0.7/llvm/utils/TableGen/ |
| H A D | X86RecognizableInstr.h | 225 bool Is32Bit; variable
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| H A D | X86RecognizableInstr.cpp | 147 Is32Bit(false), Is64Bit(false), Operands(&insn.Operands.OperandList), in RecognizableInstr()
155 Is32Bit = true; in RecognizableInstr()
870 UID, Is32Bit, OpPrefix == 0, in emitDecodePath()
875 Is32Bit, OpPrefix == 0, IgnoresVEX_L || EncodeRC, in emitDecodePath()
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| /llvm-project-15.0.7/llvm/lib/Target/X86/AsmParser/ |
| H A D | X86AsmParser.cpp | 128 SwitchMode(X86::Is32Bit); in MatchInstruction()
1217 return getSTI().getFeatureBits()[X86::Is32Bit]; in is32BitMode()
1225 FeatureBitset AllModes({X86::Is64Bit, X86::Is32Bit, X86::Is16Bit}); in SwitchMode()
3408 ForcedDataPrefix = X86::Is32Bit; in ParseInstruction()
4166 if (ForcedDataPrefix == X86::Is32Bit) in MatchAndEmitATTInstruction()
4167 SwitchMode(X86::Is32Bit); in MatchAndEmitATTInstruction()
4173 if (ForcedDataPrefix == X86::Is32Bit) { in MatchAndEmitATTInstruction()
4752 SwitchMode(X86::Is32Bit); in ParseDirectiveCode()
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| /llvm-project-15.0.7/llvm/lib/Target/X86/MCTargetDesc/ |
| H A D | X86InstPrinterCommon.cpp | 395 else if (STI.hasFeature(X86::Is32Bit)) in printInstFlags()
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| H A D | X86AsmBackend.cpp | 296 assert((STI.hasFeature(X86::Is32Bit) || STI.hasFeature(X86::Is64Bit)) && in determinePaddingPrefix()
496 if (!(STI.hasFeature(X86::Is64Bit) || STI.hasFeature(X86::Is32Bit))) in canPadBranches()
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| H A D | X86MCTargetDesc.cpp | 119 bool Is32BitMode = STI.hasFeature(X86::Is32Bit); in needsAddressSizeOverride()
158 if (STI.hasFeature(X86::Is32Bit)) { in needsAddressSizeOverride()
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| /llvm-project-15.0.7/llvm/lib/Target/PowerPC/ |
| H A D | PPCTargetTransformInfo.cpp | 381 auto isLargeIntegerTy = [](bool Is32Bit, Type *Ty) { in mightUseCTR() argument
383 return ITy->getBitWidth() > (Is32Bit ? 32U : 64U); in mightUseCTR()
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| H A D | PPCISelDAGToDAG.cpp | 3084 bool Is32Bit = InVT == MVT::i32; in getCompoundZeroComparisonInGPR() local
3091 ToExtend = SDValue(CurDAG->getMachineNode(Is32Bit ? PPC::NOR : PPC::NOR8, in getCompoundZeroComparisonInGPR()
3096 if (Is32Bit) { in getCompoundZeroComparisonInGPR()
3117 if (!Is32Bit && in getCompoundZeroComparisonInGPR()
3122 if (!Is32Bit && in getCompoundZeroComparisonInGPR()
3127 assert(Is32Bit && "Should have handled the 32-bit sequences above."); in getCompoundZeroComparisonInGPR()
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| H A D | PPCISelLowering.cpp | 14029 bool Is32Bit = FirstConversion == PPCISD::FCTIWZ || in combineElementTruncationToVectorTruncation() local
14045 if (Is32Bit && !isFPExtLoad(NextOp.getOperand(0).getOperand(0))) in combineElementTruncationToVectorTruncation()
14060 if (Is32Bit) { in combineElementTruncationToVectorTruncation()
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| /llvm-project-15.0.7/llvm/lib/Target/Sparc/ |
| H A D | SparcInstrInfo.td | 24 def Is32Bit : Predicate<"!Subtarget->is64Bit()">;
779 let Predicates = [Is32Bit], isCodeGenOnly = 1 in
1758 let Predicates = [Is32Bit] in {
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| /llvm-project-15.0.7/llvm/lib/Target/X86/ |
| H A D | X86.td | 24 def Is32Bit : SubtargetFeature<"32bit-mode", "Is32Bit", "true",
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| H A D | X86InstrInfo.td | 1009 AssemblerPredicate<(all_of Is32Bit), "32-bit mode">;
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| /llvm-project-15.0.7/llvm/lib/Target/X86/Disassembler/ |
| H A D | X86Disassembler.cpp | 1727 } else if (FB[X86::Is32Bit]) { in X86GenericDisassembler()
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| /llvm-project-15.0.7/llvm/lib/Target/AArch64/ |
| H A D | AArch64InstrInfo.cpp | 6733 bool Is32Bit = (DefMI->getOpcode() == AArch64::ANDWri); in optimizeCondBranch() local
6735 DefMI->getOperand(2).getImm(), Is32Bit ? 32 : 64); in optimizeCondBranch()
6765 if (!Is32Bit && Imm < 32) in optimizeCondBranch()
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| /llvm-project-15.0.7/llvm/lib/Target/SystemZ/ |
| H A D | SystemZISelLowering.cpp | 2878 bool Is32Bit = is32Bit(VT); in lowerGR128Binary() local
2879 Even = DAG.getTargetExtractSubreg(SystemZ::even128(Is32Bit), DL, VT, Result); in lowerGR128Binary()
2880 Odd = DAG.getTargetExtractSubreg(SystemZ::odd128(Is32Bit), DL, VT, Result); in lowerGR128Binary()
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| /llvm-project-15.0.7/llvm/lib/Target/Mips/AsmParser/ |
| H A D | MipsAsmParser.cpp | 4765 bool Is32Bit = isInt<32>(ImmValue) || (!isGP64bit() && isUInt<32>(ImmValue)); in expandAliasImmediate() local
4777 if (!loadImmediate(ImmValue, DstReg, Mips::NoRegister, Is32Bit, false, in expandAliasImmediate()
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