1091   const bool Is32Bit = Size == 32;  in emitSelect()  local
1093     unsigned Opc = Is32Bit ? AArch64::FCSELSrrr : AArch64::FCSELDrrr;  in emitSelect()
1100   unsigned Opc = Is32Bit ? AArch64::CSELWr : AArch64::CSELXr;  in emitSelect()
1102   auto TryFoldBinOpIntoSelect = [&Opc, Is32Bit, &CC, &MRI,  in emitSelect()
1117       Opc = Is32Bit ? AArch64::CSNEGWr : AArch64::CSNEGXr;  in emitSelect()
1134       Opc = Is32Bit ? AArch64::CSINVWr : AArch64::CSINVXr;  in emitSelect()
1153       Opc = Is32Bit ? AArch64::CSINCWr : AArch64::CSINCXr;  in emitSelect()
1169   auto TryOptSelectCst = [&Opc, &True, &False, &CC, Is32Bit, &MRI,  in emitSelect()
1178     Register ZReg = Is32Bit ? AArch64::WZR : AArch64::XZR;  in emitSelect()
1185         Opc = Is32Bit ? AArch64::CSINCWr : AArch64::CSINCXr;  in emitSelect()
1193         Opc = Is32Bit ? AArch64::CSINVWr : AArch64::CSINVXr;  in emitSelect()
1204         Opc = Is32Bit ? AArch64::CSINCWr : AArch64::CSINCXr;  in emitSelect()
1213         Opc = Is32Bit ? AArch64::CSINVWr : AArch64::CSINVXr;  in emitSelect()
1225         Opc = Is32Bit ? AArch64::CSINCWr : AArch64::CSINCXr;  in emitSelect()
1232         Opc = Is32Bit ? AArch64::CSINVWr : AArch64::CSINVXr;  in emitSelect()
4458   bool Is32Bit = Size == 32;  in emitAddSub()  local
4462     return emitInstr(AddrModeAndSizeToOpcode[0][Is32Bit], {Dst}, {LHS},  in emitAddSub()
4467     return emitInstr(AddrModeAndSizeToOpcode[3][Is32Bit], {Dst}, {LHS},  in emitAddSub()
4472     return emitInstr(AddrModeAndSizeToOpcode[4][Is32Bit], {Dst}, {LHS},  in emitAddSub()
4477     return emitInstr(AddrModeAndSizeToOpcode[1][Is32Bit], {Dst}, {LHS},  in emitAddSub()
4479   return emitInstr(AddrModeAndSizeToOpcode[2][Is32Bit], {Dst}, {LHS, RHS},  in emitAddSub()
4526   bool Is32Bit = (MRI.getType(LHS.getReg()).getSizeInBits() == 32);  in emitCMN()  local
4527   auto RC = Is32Bit ? &AArch64::GPR32RegClass : &AArch64::GPR64RegClass;  in emitCMN()
4538   bool Is32Bit = (RegSize == 32);  in emitTST()  local
4548       auto TstMI = MIRBuilder.buildInstr(OpcTable[0][Is32Bit], {Ty}, {LHS});  in emitTST()
4556     return emitInstr(OpcTable[1][Is32Bit], {Ty}, {LHS}, MIRBuilder, Fns);  in emitTST()
4557   return emitInstr(OpcTable[2][Is32Bit], {Ty}, {LHS, RHS}, MIRBuilder);  in emitTST()