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Searched refs:Ins (Results 1 – 25 of 104) sorted by relevance

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/llvm-project-15.0.7/llvm/lib/Target/Mips/
H A DMipsCCState.h71 const SmallVectorImpl<ISD::InputArg> &Ins);
136 PreAnalyzeFormalArgumentsForF128(Ins); in PreAnalyzeFormalArguments()
139 void AnalyzeFormalArguments(const SmallVectorImpl<ISD::InputArg> &Ins, in AnalyzeFormalArguments() argument
141 PreAnalyzeFormalArguments(Ins, Fn); in AnalyzeFormalArguments()
142 CCState::AnalyzeFormalArguments(Ins, Fn); in AnalyzeFormalArguments()
151 void PreAnalyzeCallResult(const SmallVectorImpl<ISD::InputArg> &Ins, in PreAnalyzeCallResult() argument
157 PreAnalyzeCallResultForF128(Ins, RetTy, Func); in PreAnalyzeCallResult()
158 PreAnalyzeCallResultForVectorFloat(Ins, RetTy); in PreAnalyzeCallResult()
161 void AnalyzeCallResult(const SmallVectorImpl<ISD::InputArg> &Ins, in AnalyzeCallResult() argument
164 PreAnalyzeCallResult(Ins, Fn, RetTy, Func); in AnalyzeCallResult()
[all …]
H A DMipsCCState.cpp87 const SmallVectorImpl<ISD::InputArg> &Ins, in PreAnalyzeCallResultForF128() argument
89 for (unsigned i = 0; i < Ins.size(); ++i) { in PreAnalyzeCallResultForF128()
112 const SmallVectorImpl<ISD::InputArg> &Ins, const Type *RetTy) { in PreAnalyzeCallResultForVectorFloat() argument
113 for (unsigned i = 0; i < Ins.size(); ++i) { in PreAnalyzeCallResultForVectorFloat()
181 const SmallVectorImpl<ISD::InputArg> &Ins) { in PreAnalyzeFormalArgumentsForF128() argument
183 for (unsigned i = 0; i < Ins.size(); ++i) { in PreAnalyzeFormalArgumentsForF128()
189 if (Ins[i].Flags.isSRet()) { in PreAnalyzeFormalArgumentsForF128()
196 assert(Ins[i].getOrigArgIndex() < MF.getFunction().arg_size()); in PreAnalyzeFormalArgumentsForF128()
197 std::advance(FuncArg, Ins[i].getOrigArgIndex()); in PreAnalyzeFormalArgumentsForF128()
/llvm-project-15.0.7/llvm/lib/Transforms/Scalar/
H A DStraightLineStrengthReduce.cpp171 Instruction *Ins = nullptr; member
274 return (Basis.Ins != C.Ins && // skip the same instruction in isBasisFor()
277 Basis.Ins->getType() == C.Ins->getType() && in isBasisFor()
279 DT->dominates(Basis.Ins->getParent(), C.Ins->getParent()) && in isBasisFor()
644 if (!C.Ins->getParent()) in rewriteCandidateWithBasis()
647 IRBuilder<> Builder(C.Ins); in rewriteCandidateWithBasis()
694 Basis.Ins, Bump, "", InBounds); in rewriteCandidateWithBasis()
701 Reduced->takeName(C.Ins); in rewriteCandidateWithBasis()
702 C.Ins->replaceAllUsesWith(Reduced); in rewriteCandidateWithBasis()
705 C.Ins->removeFromParent(); in rewriteCandidateWithBasis()
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/llvm-project-15.0.7/clang/tools/clang-import-test/
H A Dclang-import-test.cpp164 auto Ins = std::make_unique<CompilerInstance>(); in BuildCompilerInstance() local
167 Ins->createDiagnostics(DC.release(), ShouldOwnClient); in BuildCompilerInstance()
174 CompilerInvocation::CreateFromArgs(*Inv, ClangArgv, Ins->getDiagnostics()); in BuildCompilerInstance()
206 Ins->setInvocation(std::move(Inv)); in BuildCompilerInstance()
209 Ins->getDiagnostics(), Ins->getInvocation().TargetOpts); in BuildCompilerInstance()
210 Ins->setTarget(TI); in BuildCompilerInstance()
211 Ins->getTarget().adjust(Ins->getDiagnostics(), Ins->getLangOpts()); in BuildCompilerInstance()
212 Ins->createFileManager(); in BuildCompilerInstance()
213 Ins->createSourceManager(Ins->getFileManager()); in BuildCompilerInstance()
214 Ins->createPreprocessor(TU_Complete); in BuildCompilerInstance()
[all …]
/llvm-project-15.0.7/llvm/lib/CodeGen/
H A DCallingConvLower.cpp82 CCState::AnalyzeFormalArguments(const SmallVectorImpl<ISD::InputArg> &Ins, in AnalyzeFormalArguments() argument
84 unsigned NumArgs = Ins.size(); in AnalyzeFormalArguments()
87 MVT ArgVT = Ins[i].VT; in AnalyzeFormalArguments()
88 ISD::ArgFlagsTy ArgFlags = Ins[i].Flags; in AnalyzeFormalArguments()
159 void CCState::AnalyzeCallResult(const SmallVectorImpl<ISD::InputArg> &Ins, in AnalyzeCallResult() argument
161 for (unsigned i = 0, e = Ins.size(); i != e; ++i) { in AnalyzeCallResult()
162 MVT VT = Ins[i].VT; in AnalyzeCallResult()
163 ISD::ArgFlagsTy Flags = Ins[i].Flags; in AnalyzeCallResult()
261 const SmallVectorImpl<ISD::InputArg> &Ins, in resultsCompatible() argument
267 CCInfo1.AnalyzeCallResult(Ins, CalleeFn); in resultsCompatible()
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/llvm-project-15.0.7/llvm/lib/Target/PowerPC/
H A DPPCCCState.h25 PreAnalyzeFormalArguments(const SmallVectorImpl<ISD::InputArg> &Ins);
50 void AnalyzeFormalArguments(const SmallVectorImpl<ISD::InputArg> &Ins, in AnalyzeFormalArguments() argument
53 IsFixed.resize(Ins.size(), true); in AnalyzeFormalArguments()
54 CCState::AnalyzeFormalArguments(Ins, Fn); in AnalyzeFormalArguments()
H A DPPCCCState.cpp27 const SmallVectorImpl<ISD::InputArg> &Ins) { in PreAnalyzeFormalArguments() argument
28 for (const auto &I : Ins) { in PreAnalyzeFormalArguments()
H A DPPCISelLowering.h1235 const SmallVectorImpl<ISD::InputArg> &Ins,
1241 const SmallVectorImpl<ISD::InputArg> &Ins, SelectionDAG &DAG) const;
1320 const SmallVectorImpl<ISD::InputArg> &Ins,
1328 const SmallVectorImpl<ISD::InputArg> &Ins,
1334 const SmallVectorImpl<ISD::InputArg> &Ins,
1357 const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &dl,
1361 const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &dl,
1365 const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &dl,
1376 const SmallVectorImpl<ISD::InputArg> &Ins,
1383 const SmallVectorImpl<ISD::InputArg> &Ins,
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H A DPPCRegisterInfo.cpp1030 ++Ins; in lowerCRBitSpilling()
1033 for (; Ins != Rend; ++Ins) { in lowerCRBitSpilling()
1042 Ins = MI; in lowerCRBitSpilling()
1046 if (!Ins->isDebugInstr()) in lowerCRBitSpilling()
1051 if (Ins == MBB.rend()) in lowerCRBitSpilling()
1052 Ins = MI; in lowerCRBitSpilling()
1056 switch (Ins->getOpcode()) { in lowerCRBitSpilling()
1123 Ins->removeOperand(0); in lowerCRBitSpilling()
1755 if (Ins != MBB->end()) in materializeFrameBaseRegister()
1756 DL = Ins->getDebugLoc(); in materializeFrameBaseRegister()
[all …]
/llvm-project-15.0.7/llvm/lib/Target/SystemZ/
H A DSystemZCallingConv.h51 void AnalyzeFormalArguments(const SmallVectorImpl<ISD::InputArg> &Ins, in AnalyzeFormalArguments() argument
55 for (unsigned i = 0; i < Ins.size(); ++i) in AnalyzeFormalArguments()
59 for (unsigned i = 0; i < Ins.size(); ++i) in AnalyzeFormalArguments()
60 ArgIsShortVector.push_back(IsShortVectorType(Ins[i].ArgVT)); in AnalyzeFormalArguments()
62 CCState::AnalyzeFormalArguments(Ins, Fn); in AnalyzeFormalArguments()
/llvm-project-15.0.7/llvm/lib/Target/Lanai/
H A DLanaiISelLowering.h123 const SmallVectorImpl<ISD::InputArg> &Ins,
129 const SmallVectorImpl<ISD::InputArg> &Ins,
135 const SmallVectorImpl<ISD::InputArg> &Ins,
144 const SmallVectorImpl<ISD::InputArg> &Ins,
/llvm-project-15.0.7/llvm/lib/Target/MSP430/
H A DMSP430ISelLowering.h146 const SmallVectorImpl<ISD::InputArg> &Ins,
152 const SmallVectorImpl<ISD::InputArg> &Ins,
158 const SmallVectorImpl<ISD::InputArg> &Ins,
164 const SmallVectorImpl<ISD::InputArg> &Ins,
H A DMSP430ISelLowering.cpp447 State.AnalyzeFormalArguments(Ins, CC_MSP430_AssignStack); in AnalyzeVarArgs()
551 State.AnalyzeCallResult(Ins, RetCC_MSP430); in AnalyzeRetResult()
568 const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &dl, in LowerFormalArguments() argument
578 if (Ins.empty()) in LowerFormalArguments()
591 SmallVectorImpl<ISD::InputArg> &Ins = CLI.Ins; in LowerCall() local
608 Outs, OutVals, Ins, dl, DAG, InVals); in LowerCall()
619 const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &dl, in LowerCCCArguments() argument
630 AnalyzeArguments(CCInfo, ArgLocs, Ins); in LowerCCCArguments()
677 ISD::ArgFlagsTy Flags = Ins[i].Flags; in LowerCCCArguments()
708 if (Ins[i].Flags.isSRet()) { in LowerCCCArguments()
[all …]
/llvm-project-15.0.7/llvm/include/llvm/Transforms/Instrumentation/
H A DInstrProfiling.h90 void computeNumValueSiteCounts(InstrProfValueProfileInst *Ins);
93 void lowerValueProfileInst(InstrProfValueProfileInst *Ins);
/llvm-project-15.0.7/llvm/include/llvm/CodeGen/
H A DCallingConvLower.h281 void AnalyzeFormalArguments(const SmallVectorImpl<ISD::InputArg> &Ins,
285 void AnalyzeArguments(const SmallVectorImpl<ISD::InputArg> &Ins, in AnalyzeArguments() argument
287 AnalyzeFormalArguments(Ins, Fn); in AnalyzeArguments()
320 void AnalyzeCallResult(const SmallVectorImpl<ISD::InputArg> &Ins,
523 const SmallVectorImpl<ISD::InputArg> &Ins,
/llvm-project-15.0.7/llvm/lib/Target/BPF/
H A DBPFISelLowering.cpp302 const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &DL, in LowerFormalArguments() argument
318 CCInfo.AnalyzeFormalArguments(Ins, getHasAlu32() ? CC_BPF32 : CC_BPF64); in LowerFormalArguments()
374 auto &Ins = CLI.Ins; in LowerCall() local
496 return LowerCallResult(Chain, InFlag, CallConv, IsVarArg, Ins, CLI.DL, DAG, in LowerCall()
550 const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &DL, in LowerCallResult() argument
558 if (Ins.size() >= 2) { in LowerCallResult()
560 for (unsigned i = 0, e = Ins.size(); i != e; ++i) in LowerCallResult()
561 InVals.push_back(DAG.getConstant(0, DL, Ins[i].VT)); in LowerCallResult()
562 return DAG.getCopyFromReg(Chain, DL, 1, Ins[0].VT, InFlag).getValue(1); in LowerCallResult()
565 CCInfo.AnalyzeCallResult(Ins, getHasAlu32() ? RetCC_BPF32 : RetCC_BPF64); in LowerCallResult()
H A DBPFISelLowering.h82 const SmallVectorImpl<ISD::InputArg> &Ins,
96 const SmallVectorImpl<ISD::InputArg> &Ins,
/llvm-project-15.0.7/llvm/lib/Target/ARC/
H A DARCISelLowering.h86 const SmallVectorImpl<ISD::InputArg> &Ins,
100 const SmallVectorImpl<ISD::InputArg> &Ins,
H A DARCISelLowering.cpp267 SmallVectorImpl<ISD::InputArg> &Ins = CLI.Ins; in LowerCall() local
287 RetCCInfo.AnalyzeCallResult(Ins, RetCC_ARC); in LowerCall()
471 const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &dl, in LowerFormalArguments() argument
478 return LowerCallArguments(Chain, CallConv, IsVarArg, Ins, dl, DAG, InVals); in LowerFormalArguments()
486 const SmallVectorImpl<ISD::InputArg> &Ins, SDLoc dl, SelectionDAG &DAG, in LowerCallArguments() argument
498 CCInfo.AnalyzeFormalArguments(Ins, CC_ARC); in LowerCallArguments()
552 const ArgDataPair ADP = {ArgIn, Ins[i].Flags}; in LowerCallArguments()
/llvm-project-15.0.7/llvm/lib/Target/XCore/
H A DXCoreISelLowering.h148 const SmallVectorImpl<ISD::InputArg> &Ins,
156 const SmallVectorImpl<ISD::InputArg> &Ins,
212 const SmallVectorImpl<ISD::InputArg> &Ins,
/llvm-project-15.0.7/llvm/lib/Target/Sparc/
H A DSparcISelLowering.h125 const SmallVectorImpl<ISD::InputArg> &Ins,
130 const SmallVectorImpl<ISD::InputArg> &Ins,
135 const SmallVectorImpl<ISD::InputArg> &Ins,
/llvm-project-15.0.7/llvm/lib/Target/LoongArch/
H A DLoongArchISelLowering.h72 const SmallVectorImpl<ISD::InputArg> &Ins,
93 const SmallVectorImpl<ISD::InputArg> &Ins,
/llvm-project-15.0.7/llvm/test/Other/
H A Dprint-changed-machine.ll7 ; VERBOSE-NEXT: Function Live Ins: $w0
14 ; VERBOSE-NEXT: Function Live Ins: $w0
/llvm-project-15.0.7/llvm/lib/Target/M68k/
H A DM68kISelLowering.h228 const SmallVectorImpl<ISD::InputArg> &Ins,
236 const SmallVectorImpl<ISD::InputArg> &Ins,
275 const SmallVectorImpl<ISD::InputArg> &Ins, SelectionDAG &DAG) const;
/llvm-project-15.0.7/llvm/lib/TableGen/
H A DTGParser.h114 bool Ins = vars.insert(std::make_pair(std::string(Name), I)).second; in addVar() local
115 (void)Ins; in addVar()
116 assert(Ins && "Local variable already exists"); in addVar()

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