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Searched refs:FeatureBitset (Results 1 – 25 of 55) sorted by relevance

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/llvm-project-15.0.7/llvm/lib/Support/
H A DX86TargetParser.cpp26 class FeatureBitset { class
56 constexpr FeatureBitset &operator&=(const FeatureBitset &RHS) { in operator &=()
65 constexpr FeatureBitset &operator|=(const FeatureBitset &RHS) { in operator |=()
75 constexpr FeatureBitset operator&(const FeatureBitset &RHS) const { in operator &()
76 FeatureBitset Result; in operator &()
83 constexpr FeatureBitset operator|(const FeatureBitset &RHS) const { in operator |()
84 FeatureBitset Result; in operator |()
91 FeatureBitset Result; in operator ~()
109 FeatureBitset Features;
622 FeatureBitset Prev; in getImpliedEnabledFeatures()
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/llvm-project-15.0.7/llvm/include/llvm/MC/
H A DSubtargetFeature.h40 class FeatureBitset {
59 FeatureBitset &set() { in set()
105 constexpr FeatureBitset &operator^=(const FeatureBitset &RHS) {
111 constexpr FeatureBitset operator^(const FeatureBitset &RHS) const {
112 FeatureBitset Result = *this;
117 constexpr FeatureBitset &operator&=(const FeatureBitset &RHS) {
123 constexpr FeatureBitset operator&(const FeatureBitset &RHS) const {
124 FeatureBitset Result = *this;
129 constexpr FeatureBitset &operator|=(const FeatureBitset &RHS) {
135 constexpr FeatureBitset operator|(const FeatureBitset &RHS) const {
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H A DMCSubtargetInfo.h92 FeatureBitset FeatureBits; // Feature bits for current CPU + FS
112 const FeatureBitset& getFeatureBits() const { return FeatureBits; } in getFeatureBits()
113 void setFeatureBits(const FeatureBitset &FeatureBits_) { in setFeatureBits()
137 FeatureBitset ToggleFeature(uint64_t FB);
141 FeatureBitset ToggleFeature(const FeatureBitset& FB);
145 FeatureBitset ToggleFeature(StringRef FS);
149 FeatureBitset ApplyFeatureFlag(StringRef FS);
152 FeatureBitset SetFeatureBitsTransitively(const FeatureBitset& FB);
153 FeatureBitset ClearFeatureBitsTransitively(const FeatureBitset &FB);
/llvm-project-15.0.7/llvm/lib/MC/
H A DMCSubtargetInfo.cpp36 void SetImpliedBits(FeatureBitset &Bits, const FeatureBitset &Implies, in SetImpliedBits()
48 void ClearImpliedBits(FeatureBitset &Bits, unsigned Value, in ClearImpliedBits()
156 return FeatureBitset(); in getFeatures()
161 FeatureBitset Bits; in getFeatures()
240 FeatureBitset MCSubtargetInfo::ToggleFeature(uint64_t FB) { in ToggleFeature()
245 FeatureBitset MCSubtargetInfo::ToggleFeature(const FeatureBitset &FB) { in ToggleFeature()
250 FeatureBitset MCSubtargetInfo::SetFeatureBitsTransitively( in SetFeatureBitsTransitively()
251 const FeatureBitset &FB) { in SetFeatureBitsTransitively()
256 FeatureBitset MCSubtargetInfo::ClearFeatureBitsTransitively( in ClearFeatureBitsTransitively()
257 const FeatureBitset &FB) { in ClearFeatureBitsTransitively()
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/llvm-project-15.0.7/llvm/lib/Target/AMDGPU/
H A DAMDGPUPropagateAttributes.cpp50 static constexpr const FeatureBitset TargetFeatures = {
67 explicit FnProperties(const FeatureBitset &&FB) : Features(FB) {} in FnProperties()
94 FeatureBitset Features;
128 void setFeatures(Function &F, const FeatureBitset &NewFeatures);
133 std::string getFeatureString(const FeatureBitset &Features) const;
336 const FeatureBitset &NewFeatures) { in setFeatures()
360 AMDGPUPropagateAttributes::getFeatureString(const FeatureBitset &Features) const in getFeatureString()
H A DAMDGPUTargetTransformInfo.cpp267 const FeatureBitset GCNTTIImpl::InlineFeatureIgnoreList = {
1073 const FeatureBitset &CallerBits = CallerST->getFeatureBits(); in areInlineCompatible()
1074 const FeatureBitset &CalleeBits = CalleeST->getFeatureBits(); in areInlineCompatible()
1076 FeatureBitset RealCallerBits = CallerBits & ~InlineFeatureIgnoreList; in areInlineCompatible()
1077 FeatureBitset RealCalleeBits = CalleeBits & ~InlineFeatureIgnoreList; in areInlineCompatible()
H A DAMDGPUTargetTransformInfo.h72 static const FeatureBitset InlineFeatureIgnoreList;
/llvm-project-15.0.7/llvm/lib/Target/Hexagon/MCTargetDesc/
H A DHexagonMCTargetDesc.h51 class FeatureBitset; variable
74 FeatureBitset completeHVXFeatures(const FeatureBitset &FB);
H A DHexagonMCTargetDesc.cpp440 FeatureBitset Hexagon_MC::completeHVXFeatures(const FeatureBitset &S) { in completeHVXFeatures()
444 FeatureBitset FB = S; in completeHVXFeatures()
526 llvm::FeatureBitset Features = X->getFeatureBits(); in createHexagonMCSubtargetInfo()
531 llvm::FeatureBitset Features = X->getFeatureBits(); in createHexagonMCSubtargetInfo()
543 llvm::FeatureBitset Features = X->getFeatureBits(); in createHexagonMCSubtargetInfo()
/llvm-project-15.0.7/llvm/include/llvm/MC/MCParser/
H A DMCTargetAsmParser.h202 static NearMissInfo getMissedFeature(const FeatureBitset &MissingFeatures) { in getMissedFeature()
254 const FeatureBitset& getFeatures() const { in getFeatures()
304 FeatureBitset Features;
334 FeatureBitset AvailableFeatures;
359 const FeatureBitset& getAvailableFeatures() const { in getAvailableFeatures()
362 void setAvailableFeatures(const FeatureBitset& Value) { in setAvailableFeatures()
/llvm-project-15.0.7/llvm/lib/Target/RISCV/MCTargetDesc/
H A DRISCVBaseInfo.h318 FeatureBitset FeaturesRequired;
321 bool haveRequiredFeatures(const FeatureBitset &ActiveFeatures) const { in haveRequiredFeatures()
361 ABI computeTargetABI(const Triple &TT, FeatureBitset FeatureBits,
378 void validate(const Triple &TT, const FeatureBitset &FeatureBits);
381 parseFeatureBits(bool IsRV64, const FeatureBitset &FeatureBits);
H A DRISCVMatInt.h43 InstSeq generateInstSeq(int64_t Val, const FeatureBitset &ActiveFeatures);
56 const FeatureBitset &ActiveFeatures,
H A DRISCVBaseInfo.cpp37 ABI computeTargetABI(const Triple &TT, FeatureBitset FeatureBits, in computeTargetABI()
97 void validate(const Triple &TT, const FeatureBitset &FeatureBits) { in validate()
107 parseFeatureBits(bool IsRV64, const FeatureBitset &FeatureBits) { in parseFeatureBits()
H A DRISCVMatInt.cpp49 const FeatureBitset &ActiveFeatures, in generateInstSeqImpl()
177 InstSeq generateInstSeq(int64_t Val, const FeatureBitset &ActiveFeatures) { in generateInstSeq()
382 const FeatureBitset &ActiveFeatures, bool CompressionCost) { in getIntMatCost()
H A DRISCVELFStreamer.cpp36 const FeatureBitset &Features = STI.getFeatureBits(); in RISCVTargetELFStreamer()
153 const FeatureBitset &Features = STI.getFeatureBits(); in finish()
/llvm-project-15.0.7/llvm/lib/Target/AArch64/Utils/
H A DAArch64BaseInfo.h339 FeatureBitset FeaturesRequired;
342 constexpr SysAlias(const char *N, uint16_t E, FeatureBitset F) in SysAlias()
345 bool haveFeatures(FeatureBitset ActiveFeatures) const { in haveFeatures()
350 FeatureBitset getRequiredFeatures() const { return FeaturesRequired; } in getRequiredFeatures()
357 constexpr SysAliasReg(const char *N, uint16_t E, bool R, FeatureBitset F) in SysAliasReg()
365 constexpr SysAliasImm(const char *N, uint16_t E, uint16_t I, FeatureBitset F) in SysAliasImm()
635 FeatureBitset FeaturesRequired;
637 bool haveFeatures(FeatureBitset ActiveFeatures) const { in haveFeatures()
/llvm-project-15.0.7/llvm/lib/Target/WebAssembly/
H A DWebAssemblyTargetMachine.cpp196 FeatureBitset Features = coalesceFeatures(M); in runOnModule()
225 FeatureBitset coalesceFeatures(const Module &M) { in coalesceFeatures()
226 FeatureBitset Features = in coalesceFeatures()
236 std::string getFeatureString(const FeatureBitset &Features) { in getFeatureString()
289 void recordFeatures(Module &M, const FeatureBitset &Features, bool Stripped) { in recordFeatures()
H A DWebAssemblyTargetTransformInfo.cpp108 const FeatureBitset &CallerBits = in areInlineCompatible()
110 const FeatureBitset &CalleeBits = in areInlineCompatible()
/llvm-project-15.0.7/llvm/lib/Target/ARM/Utils/
H A DARMBaseInfo.h196 FeatureBitset FeaturesRequired;
199 bool hasRequiredFeatures(FeatureBitset ActiveFeatures) const { in hasRequiredFeatures()
204 bool isInRequiredFeatures(FeatureBitset TestFeatures) const { in isInRequiredFeatures()
/llvm-project-15.0.7/llvm/utils/TableGen/
H A DInstrInfoEmitter.cpp722 getNameForFeatureBitset(const std::vector<Record *> &FeatureBitset) { in getNameForFeatureBitset() argument
724 for (const auto &Feature : FeatureBitset) in getNameForFeatureBitset()
786 for (const auto &FeatureBitset : FeatureBitsets) { in emitFeatureVerifier() local
787 if (FeatureBitset.empty()) in emitFeatureVerifier()
789 OS << " " << getNameForFeatureBitset(FeatureBitset) << ",\n"; in emitFeatureVerifier()
794 for (const auto &FeatureBitset : FeatureBitsets) { in emitFeatureVerifier() local
795 if (FeatureBitset.empty()) in emitFeatureVerifier()
798 for (const auto &Feature : FeatureBitset) { in emitFeatureVerifier()
/llvm-project-15.0.7/llvm/lib/Target/AMDGPU/MCTargetDesc/
H A DAMDGPUMCCodeEmitter.h26 class FeatureBitset; variable
/llvm-project-15.0.7/llvm/lib/Target/AArch64/MCTargetDesc/
H A DAArch64MCTargetDesc.h36 class FeatureBitset; variable
/llvm-project-15.0.7/llvm/lib/Target/AVR/MCTargetDesc/
H A DAVRELFStreamer.cpp13 static unsigned getEFlagsForFeatureSet(const FeatureBitset &Features) { in getEFlagsForFeatureSet()
/llvm-project-15.0.7/llvm/lib/Target/LoongArch/AsmParser/
H A DLoongArchAsmParser.cpp442 FeatureBitset MissingFeatures; in MatchAndEmitInstruction()
465 FeatureBitset FBS = ComputeAvailableFeatures(getSTI().getFeatureBits()); in MatchAndEmitInstruction()
/llvm-project-15.0.7/llvm/test/TableGen/
H A DMixedCasedMnemonic.td60 // ALIAS: static void applyMnemonicAliases(StringRef &Mnemonic, const FeatureBitset &Features, unsi…

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