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Searched refs:ExtTy (Results 1 – 25 of 27) sorted by relevance

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/llvm-project-15.0.7/llvm/lib/CodeGen/
H A DTypePromotion.cpp109 IntegerType *ExtTy = nullptr; member in __anone4b1306d0111::IRPromoter
129 ExtTy = IntegerType::get(Ctx, PromotedWidth); in IRPromoter()
429 assert(V->getType() != ExtTy && "zext already extends to i32"); in ExtendSources()
435 Value *ZExt = Builder.CreateZExt(V, ExtTy); in ExtendSources()
489 ? ConstantExpr::getSExt(Const, ExtTy) in PromoteTree()
493 I->setOperand(i, ConstantInt::get(ExtTy, 0)); in PromoteTree()
498 I->mutateType(ExtTy); in PromoteTree()
578 if (ZExt->getDestTy() != ExtTy) in Cleanup()
593 assert(Trunc->getOperand(0)->getType() == ExtTy && in Cleanup()
623 if (SrcTy != ExtTy) in ConvertTruncs()
[all …]
H A DCodeGenPrepare.cpp4048 ExtType ExtTy = IsSExt ? SignExtension : ZeroExtension; in addPromotedInst() local
4053 if (It->second.getInt() == ExtTy) in addPromotedInst()
4059 ExtTy = BothExtension; in addPromotedInst()
4071 ExtType ExtTy = IsSExt ? SignExtension : ZeroExtension; in getOrigType() local
4073 if (It != PromotedInsts.end() && It->second.getInt() == ExtTy) in getOrigType()
4283 Type *ExtTy = Ext->getType(); in getAction() local
5682 Type *ExtTy = FirstUser->getType(); in hasSameExtUse() local
5689 if (CurTy == ExtTy) in hasSameExtUse()
5708 if (ExtTy->getScalarType()->getIntegerBitWidth() > in hasSameExtUse()
5711 LargeTy = ExtTy; in hasSameExtUse()
[all …]
/llvm-project-15.0.7/llvm/unittests/IR/
H A DVectorTypesTest.cpp96 auto *ExtTy = dyn_cast<FixedVectorType>( in TEST() local
98 EXPECT_VTY_EQ(ExtTy, V8Int32Ty); in TEST()
99 EXPECT_EQ(ExtTy->getNumElements(), 8U); in TEST()
100 EXPECT_EQ(ExtTy->getElementType()->getScalarSizeInBits(), 32U); in TEST()
191 auto *ExtTy = dyn_cast<ScalableVectorType>( in TEST() local
193 EXPECT_VTY_EQ(ExtTy, ScV8Int32Ty); in TEST()
194 EXPECT_EQ(ExtTy->getMinNumElements(), 8U); in TEST()
195 EXPECT_EQ(ExtTy->getElementType()->getScalarSizeInBits(), 32U); in TEST()
/llvm-project-15.0.7/llvm/include/llvm/CodeGen/
H A DBasicTTIImpl.h1887 Type *ExtTy = RetTy->getWithNewBitWidth(ExtSize); in getTypeBasedIntrinsicInstrCost() local
1896 thisT()->getArithmeticInstrCost(Instruction::Mul, ExtTy, CostKind); in getTypeBasedIntrinsicInstrCost()
1897 Cost += 2 * thisT()->getCastInstrCost(Instruction::Trunc, RetTy, ExtTy, in getTypeBasedIntrinsicInstrCost()
1952 Type *ExtTy = MulTy->getWithNewBitWidth(ExtSize); in getTypeBasedIntrinsicInstrCost() local
1961 thisT()->getArithmeticInstrCost(Instruction::Mul, ExtTy, CostKind); in getTypeBasedIntrinsicInstrCost()
1962 Cost += 2 * thisT()->getCastInstrCost(Instruction::Trunc, MulTy, ExtTy, in getTypeBasedIntrinsicInstrCost()
1964 Cost += thisT()->getArithmeticInstrCost(Instruction::LShr, ExtTy, in getTypeBasedIntrinsicInstrCost()
2322 VectorType *ExtTy = VectorType::get(ResTy, Ty); in getExtendedAddReductionCost() local
2324 Instruction::Add, ExtTy, None, CostKind); in getExtendedAddReductionCost()
2327 IsUnsigned ? Instruction::ZExt : Instruction::SExt, ExtTy, Ty, in getExtendedAddReductionCost()
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H A DSelectionDAGNodes.h540 uint16_t ExtTy : 2; // enum ISD::LoadExtType
2331 LoadSDNodeBits.ExtTy = ETy;
2340 return static_cast<ISD::LoadExtType>(LoadSDNodeBits.ExtTy);
2470 LoadSDNodeBits.ExtTy = ETy;
2475 return static_cast<ISD::LoadExtType>(LoadSDNodeBits.ExtTy);
2499 LoadSDNodeBits.ExtTy = ETy;
2504 return static_cast<ISD::LoadExtType>(LoadSDNodeBits.ExtTy);
2642 LoadSDNodeBits.ExtTy = ETy;
2647 return static_cast<ISD::LoadExtType>(LoadSDNodeBits.ExtTy);
2830 LoadSDNodeBits.ExtTy = ETy;
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H A DSelectionDAG.h1493 ISD::MemIndexType IndexType, ISD::LoadExtType ExtTy);
H A DTargetLowering.h1603 virtual bool shouldReduceLoadWidth(SDNode *Load, ISD::LoadExtType ExtTy, in shouldReduceLoadWidth() argument
/llvm-project-15.0.7/llvm/lib/Target/BPF/
H A DBPFISelLowering.h128 bool shouldReduceLoadWidth(SDNode *Load, ISD::LoadExtType ExtTy, in shouldReduceLoadWidth() argument
/llvm-project-15.0.7/llvm/lib/Target/Hexagon/
H A DHexagonISelLoweringHVX.cpp716 MVT ExtTy = ty(ExtVec); in buildHvxVectorReg() local
717 unsigned ExtLen = ExtTy.getVectorNumElements(); in buildHvxVectorReg()
742 SDValue S = DAG.getVectorShuffle(ExtTy, dl, ExtVec, in buildHvxVectorReg()
743 DAG.getUNDEF(ExtTy), Mask); in buildHvxVectorReg()
1718 MVT ExtTy = typeExtElem(ResTy, 2); in LowerHvxMulh() local
1722 SDValue M = getInstr(MpyOpc, dl, ExtTy, {Vs, Vt}, DAG); in LowerHvxMulh()
H A DHexagonISelLowering.h319 bool shouldReduceLoadWidth(SDNode *Load, ISD::LoadExtType ExtTy,
H A DHexagonISelLowering.cpp3600 ISD::LoadExtType ExtTy, EVT NewVT) const { in shouldReduceLoadWidth() argument
3602 if (!TargetLoweringBase::shouldReduceLoadWidth(Load, ExtTy, NewVT)) in shouldReduceLoadWidth()
/llvm-project-15.0.7/llvm/lib/Target/AMDGPU/
H A DAMDGPUCallLowering.cpp326 LLT ExtTy = getLLTForType(*RetInfo.Ty, DL); in lowerReturnVal() local
327 Reg = B.buildInstr(ExtendOp, {ExtTy}, {Reg}).getReg(0); in lowerReturnVal()
H A DAMDGPUISelLowering.cpp633 ISD::LoadExtType ExtTy, in shouldReduceLoadWidth() argument
636 if (!TargetLoweringBase::shouldReduceLoadWidth(N, ExtTy, NewVT)) in shouldReduceLoadWidth()
/llvm-project-15.0.7/llvm/lib/Target/AArch64/
H A DAArch64ISelLowering.h590 bool shouldReduceLoadWidth(SDNode *Load, ISD::LoadExtType ExtTy,
H A DAArch64ISelLowering.cpp4172 const EVT &ExtTy, in addRequiredExtensionForVectorMULL() argument
4177 assert(ExtTy.is128BitVector() && "Unexpected extension size"); in addRequiredExtensionForVectorMULL()
12531 ISD::LoadExtType ExtTy, in shouldReduceLoadWidth() argument
12534 if (!TargetLoweringBase::shouldReduceLoadWidth(Load, ExtTy, NewVT)) in shouldReduceLoadWidth()
12539 if (ExtTy != ISD::NON_EXTLOAD) in shouldReduceLoadWidth()
/llvm-project-15.0.7/llvm/lib/Target/X86/
H A DX86ISelLowering.h1342 bool shouldReduceLoadWidth(SDNode *Load, ISD::LoadExtType ExtTy,
H A DX86InstrSSE.td5030 multiclass SS41I_pmovx_avx2_patterns<string OpcPrefix, string ExtTy,
5054 def : Pat<(v16i16 (!cast<PatFrag>(ExtTy#"extloadvi8") addr:$src)),
5062 def : Pat<(v8i32 (!cast<PatFrag>(ExtTy#"extloadvi8") addr:$src)),
5064 def : Pat<(v4i64 (!cast<PatFrag>(ExtTy#"extloadvi8") addr:$src)),
5067 def : Pat<(v8i32 (!cast<PatFrag>(ExtTy#"extloadvi16") addr:$src)),
5069 def : Pat<(v4i64 (!cast<PatFrag>(ExtTy#"extloadvi16") addr:$src)),
5072 def : Pat<(v4i64 (!cast<PatFrag>(ExtTy#"extloadvi32") addr:$src)),
5109 multiclass SS41I_pmovx_patterns<string OpcPrefix, string ExtTy,
5130 def : Pat<(v8i16 (!cast<PatFrag>(ExtTy#"extloadvi8") addr:$src)),
5134 def : Pat<(v4i32 (!cast<PatFrag>(ExtTy#"extloadvi8") addr:$src)),
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H A DX86InstrAVX512.td10107 SDNode OpNode, SDNode InVecNode, string ExtTy,
10109 PatFrag LdFrag = !cast<PatFrag>(ExtTy#"extloadvi8")> {
10127 SDNode OpNode, SDNode InVecNode, string ExtTy,
10129 PatFrag LdFrag = !cast<PatFrag>(ExtTy#"extloadvi8")> {
10147 SDNode InVecNode, string ExtTy,
10167 SDNode OpNode, SDNode InVecNode, string ExtTy,
10169 PatFrag LdFrag = !cast<PatFrag>(ExtTy#"extloadvi16")> {
10187 SDNode OpNode, SDNode InVecNode, string ExtTy,
10189 PatFrag LdFrag = !cast<PatFrag>(ExtTy#"extloadvi16")> {
10207 SDNode OpNode, SDNode InVecNode, string ExtTy,
[all …]
/llvm-project-15.0.7/llvm/lib/Analysis/
H A DScalarEvolution.cpp3385 IntegerType *ExtTy = in getUDivExpr() local
3394 getZeroExtendExpr(AR, ExtTy) == in getUDivExpr()
3395 getAddRecExpr(getZeroExtendExpr(AR->getStart(), ExtTy), in getUDivExpr()
3396 getZeroExtendExpr(Step, ExtTy), in getUDivExpr()
3408 getZeroExtendExpr(AR, ExtTy) == in getUDivExpr()
3409 getAddRecExpr(getZeroExtendExpr(AR->getStart(), ExtTy), in getUDivExpr()
3410 getZeroExtendExpr(Step, ExtTy), in getUDivExpr()
3438 Operands.push_back(getZeroExtendExpr(Op, ExtTy)); in getUDivExpr()
3439 if (getZeroExtendExpr(M, ExtTy) == getMulExpr(Operands)) in getUDivExpr()
3470 Operands.push_back(getZeroExtendExpr(Op, ExtTy)); in getUDivExpr()
[all …]
/llvm-project-15.0.7/llvm/lib/IR/
H A DAutoUpgrade.cpp2099 Type *ExtTy = Type::getInt32Ty(C); in UpgradeIntrinsicCall() local
2101 ExtTy = Type::getInt64Ty(C); in UpgradeIntrinsicCall()
2103 ExtTy->getPrimitiveSizeInBits(); in UpgradeIntrinsicCall()
2104 Rep = Builder.CreateZExt(CI->getArgOperand(0), ExtTy); in UpgradeIntrinsicCall()
/llvm-project-15.0.7/llvm/lib/Target/AArch64/AsmParser/
H A DAArch64AsmParser.cpp1982 AArch64_AM::ShiftExtendType ExtTy = AArch64_AM::LSL, in CreateReg() argument
1990 Op->Reg.ShiftExtend.Type = ExtTy; in CreateReg()
2001 AArch64_AM::ShiftExtendType ExtTy = AArch64_AM::LSL, in CreateVectorReg() argument
2007 auto Op = CreateReg(RegNum, Kind, S, E, Ctx, EqualsReg, ExtTy, ShiftAmount, in CreateVectorReg()
/llvm-project-15.0.7/llvm/utils/TableGen/
H A DGlobalISelEmitter.cpp4783 const TypeSetByHwMode &ExtTy = Dst->getExtType(I); in importExplicitDefRenderers() local
4784 if (!ExtTy.isMachineValueType()) in importExplicitDefRenderers()
4787 auto OpTy = MVTToLLT(ExtTy.getMachineValueType().SimpleTy); in importExplicitDefRenderers()
/llvm-project-15.0.7/llvm/lib/CodeGen/SelectionDAG/
H A DSelectionDAG.cpp8620 ISD::LoadExtType ExtTy, bool isExpanding) { in getMaskedLoad() argument
8631 dl.getIROrder(), VTs, AM, ExtTy, isExpanding, MemVT, MMO)); in getMaskedLoad()
8640 AM, ExtTy, isExpanding, MemVT, MMO); in getMaskedLoad()
8714 ISD::LoadExtType ExtTy) { in getMaskedGather() argument
8721 dl.getIROrder(), VTs, MemVT, MMO, IndexType, ExtTy)); in getMaskedGather()
8731 VTs, MemVT, MMO, IndexType, ExtTy); in getMaskedGather()
/llvm-project-15.0.7/llvm/lib/CodeGen/GlobalISel/
H A DCombinerHelper.cpp3872 LLT ExtTy = MRI.getType(DstReg); in applyExtendThroughPhis() local
3892 auto NewExt = Builder.buildExtOrTrunc(ExtMI->getOpcode(), ExtTy, in applyExtendThroughPhis()
/llvm-project-15.0.7/llvm/lib/Target/ARM/
H A DARMISelLowering.cpp9350 const EVT &ExtTy, in AddRequiredExtensionForVMULL() argument
9355 assert(ExtTy.is128BitVector() && "Unexpected extension size"); in AddRequiredExtensionForVMULL()

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