| /llvm-project-15.0.7/llvm/lib/CodeGen/ |
| H A D | TargetFrameLoweringImpl.cpp | 101 const MCPhysReg *CSRegs = MF.getRegInfo().getCalleeSavedRegs(); in determineCalleeSaves() local 104 if (!CSRegs || CSRegs[0] == 0) in determineCalleeSaves() 127 for (unsigned i = 0; CSRegs[i]; ++i) { in determineCalleeSaves() 128 unsigned Reg = CSRegs[i]; in determineCalleeSaves()
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| H A D | RegUsageInfoCollector.cpp | 206 const MCPhysReg *CSRegs = TRI.getCalleeSavedRegs(&MF); in computeCalleeSavedRegs() local 207 for (unsigned i = 0; CSRegs[i]; ++i) { in computeCalleeSavedRegs() 208 MCPhysReg Reg = CSRegs[i]; in computeCalleeSavedRegs()
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| H A D | PrologEpilogInserter.cpp | 399 const MCPhysReg *CSRegs = F.getRegInfo().getCalleeSavedRegs(); in assignCalleeSavedSpillSlots() local 402 for (unsigned i = 0; CSRegs[i]; ++i) in assignCalleeSavedSpillSlots() 403 CSMask.set(CSRegs[i]); in assignCalleeSavedSpillSlots() 406 for (unsigned i = 0; CSRegs[i]; ++i) { in assignCalleeSavedSpillSlots() 407 unsigned Reg = CSRegs[i]; in assignCalleeSavedSpillSlots() 1272 for (const MCPhysReg *CSRegs = TRI.getCalleeSavedRegs(&MF); in insertZeroCallUsedRegs() local 1273 MCPhysReg CSReg = *CSRegs; ++CSRegs) in insertZeroCallUsedRegs()
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| /llvm-project-15.0.7/llvm/lib/Target/AMDGPU/ |
| H A D | GCNNSAReassign.cpp | 81 const MCPhysReg *CSRegs; member in __anon21a10c190111::GCNNSAReassign 133 for (unsigned I = 0; CSRegs[I]; ++I) in canAssign() 134 if (TRI->isSubRegisterEq(Reg, CSRegs[I]) && in canAssign() 135 !LRM->isPhysRegUsed(CSRegs[I])) in canAssign() 252 CSRegs = MRI->getCalleeSavedRegs(); in runOnMachineFunction()
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| H A D | SILowerSGPRSpills.cpp | 214 const MCPhysReg *CSRegs = MRI.getCalleeSavedRegs(); in spillCalleeSavedRegs() local 216 for (unsigned I = 0; CSRegs[I]; ++I) { in spillCalleeSavedRegs() 217 MCRegister Reg = CSRegs[I]; in spillCalleeSavedRegs()
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| H A D | SIMachineFunctionInfo.cpp | 274 bool SIMachineFunctionInfo::isCalleeSavedReg(const MCPhysReg *CSRegs, in isCalleeSavedReg() argument 276 for (unsigned I = 0; CSRegs[I]; ++I) { in isCalleeSavedReg() 277 if (CSRegs[I] == Reg) in isCalleeSavedReg()
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| H A D | SIFrameLowering.cpp | 38 const MCPhysReg *CSRegs = MRI.getCalleeSavedRegs(); in findScratchNonCalleeSaveRegister() local 39 for (unsigned i = 0; CSRegs[i]; ++i) in findScratchNonCalleeSaveRegister() 40 LiveRegs.addReg(CSRegs[i]); in findScratchNonCalleeSaveRegister()
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| H A D | SIMachineFunctionInfo.h | 535 bool isCalleeSavedReg(const MCPhysReg *CSRegs, MCPhysReg Reg);
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| /llvm-project-15.0.7/llvm/lib/Target/ARM/ |
| H A D | ARMBaseRegisterInfo.h | 120 const MCPhysReg *CSRegs) { in isCalleeSavedRegister() argument 121 for (unsigned i = 0; CSRegs[i]; ++i) in isCalleeSavedRegister() 122 if (Reg == CSRegs[i]) in isCalleeSavedRegister()
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| H A D | Thumb1FrameLowering.cpp | 693 const MCPhysReg *CSRegs = TRI.getCalleeSavedRegs(&MF); in emitPopSpecialFixUp() local 694 for (unsigned i = 0; CSRegs[i]; ++i) in emitPopSpecialFixUp() 695 UsedRegs.addReg(CSRegs[i]); in emitPopSpecialFixUp()
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| H A D | ARMFrameLowering.cpp | 2312 const MCPhysReg *CSRegs = RegInfo->getCalleeSavedRegs(&MF); in determineCalleeSaves() local 2313 for (unsigned i = 0; CSRegs[i]; ++i) { in determineCalleeSaves() 2314 unsigned Reg = CSRegs[i]; in determineCalleeSaves()
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| H A D | ARMBaseInstrInfo.cpp | 2584 const MCPhysReg *CSRegs = TRI->getCalleeSavedRegs(&MF); in tryFoldSPUpdateIntoPushPop() local 2606 if (isCalleeSavedRegister(CurReg, CSRegs) || in tryFoldSPUpdateIntoPushPop()
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| /llvm-project-15.0.7/llvm/lib/Target/CSKY/ |
| H A D | CSKYFrameLowering.cpp | 380 static const MCPhysReg CSRegs[] = {CSKY::R0, CSKY::R1, CSKY::R2, CSKY::R3, in determineCalleeSaves() local 383 for (unsigned i = 0; CSRegs[i]; ++i) in determineCalleeSaves() 384 SavedRegs.set(CSRegs[i]); in determineCalleeSaves()
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| /llvm-project-15.0.7/llvm/lib/Target/RISCV/ |
| H A D | RISCVFrameLowering.cpp | 877 static const MCPhysReg CSRegs[] = { RISCV::X1, /* ra */ in determineCalleeSaves() local 884 for (unsigned i = 0; CSRegs[i]; ++i) in determineCalleeSaves() 885 SavedRegs.set(CSRegs[i]); in determineCalleeSaves()
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| /llvm-project-15.0.7/llvm/lib/Target/PowerPC/ |
| H A D | PPCFrameLowering.cpp | 486 const MCPhysReg *CSRegs = RegInfo->getCalleeSavedRegs(MBB->getParent()); in findScratchRegister() local 496 for (int i = 0; CSRegs[i]; ++i) in findScratchRegister() 497 BV.reset(CSRegs[i]); in findScratchRegister() 2318 const MCPhysReg *CSRegs = RegInfo->getCalleeSavedRegs(&MF); in assignCalleeSavedSpillSlots() local 2319 for (unsigned i = 0; CSRegs[i]; ++i) in assignCalleeSavedSpillSlots() 2320 BVCalleeSaved.set(CSRegs[i]); in assignCalleeSavedSpillSlots()
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| /llvm-project-15.0.7/llvm/lib/Target/SystemZ/ |
| H A D | SystemZFrameLowering.cpp | 280 const MCPhysReg *CSRegs = TRI->getCalleeSavedRegs(&MF); in determineCalleeSaves() local 281 for (unsigned I = 0; CSRegs[I]; ++I) { in determineCalleeSaves() 282 unsigned Reg = CSRegs[I]; in determineCalleeSaves()
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| /llvm-project-15.0.7/llvm/lib/Target/AArch64/ |
| H A D | AArch64FrameLowering.cpp | 840 const MCPhysReg *CSRegs = MF->getRegInfo().getCalleeSavedRegs(); in findScratchNonCalleeSaveRegister() local 841 for (unsigned i = 0; CSRegs[i]; ++i) in findScratchNonCalleeSaveRegister() 842 LiveRegs.addReg(CSRegs[i]); in findScratchNonCalleeSaveRegister() 2965 const MCPhysReg *CSRegs = MF.getRegInfo().getCalleeSavedRegs(); in determineCalleeSaves() local 2973 for (unsigned i = 0; CSRegs[i]; ++i) { in determineCalleeSaves() 2974 const unsigned Reg = CSRegs[i]; in determineCalleeSaves() 2985 PairedReg = CSRegs[i ^ 1]; in determineCalleeSaves()
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