Home
last modified time | relevance | path

Searched refs:COPY (Results 1 – 25 of 2417) sorted by relevance

12345678910>>...97

/llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/GlobalISel/
H A Dinst-select-freeze.mir20 ; GFX6-NEXT: $vgpr0 = COPY [[COPY]]
25 ; GFX10-NEXT: $vgpr0 = COPY [[COPY]]
47 ; GFX6-NEXT: $agpr0 = COPY [[COPY]]
52 ; GFX10-NEXT: $agpr0 = COPY [[COPY]]
107 ; GFX6-NEXT: $vgpr0 = COPY [[COPY]]
112 ; GFX10-NEXT: $vgpr0 = COPY [[COPY]]
134 ; GFX6-NEXT: $vgpr0 = COPY [[COPY]]
139 ; GFX10-NEXT: $vgpr0 = COPY [[COPY]]
159 ; GFX6-NEXT: $sgpr0 = COPY [[COPY]]
184 ; GFX6-NEXT: $vgpr0 = COPY [[COPY]]
[all …]
H A Dinst-select-shuffle-vector.v2s16.mir47 ; GFX9-NEXT: $vgpr0 = COPY [[COPY]]
52 ; GFX11-NEXT: $vgpr0 = COPY [[COPY]]
132 ; GFX9-NEXT: $vgpr0 = COPY [[COPY]]
137 ; GFX11-NEXT: $vgpr0 = COPY [[COPY]]
160 ; GFX9-NEXT: $vgpr0 = COPY [[COPY]]
165 ; GFX11-NEXT: $vgpr0 = COPY [[COPY]]
245 ; GFX9-NEXT: $vgpr0 = COPY [[COPY]]
250 ; GFX11-NEXT: $vgpr0 = COPY [[COPY]]
302 ; GFX9-NEXT: $vgpr0 = COPY [[COPY]]
307 ; GFX11-NEXT: $vgpr0 = COPY [[COPY]]
[all …]
H A Dlegalize-build-vector.mir12 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
29 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
48 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
69 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
92 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
117 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
144 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
173 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
204 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
237 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
[all …]
H A Dinst-select-concat-vectors.mir17 ; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
39 ; GCN-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
61 ; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
83 ; GCN-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
105 ; GCN-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
129 ; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
153 ; GCN-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
179 ; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
205 ; GCN-NEXT: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1
249 ; GCN-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
[all …]
H A Dinst-select-load-constant.mir23 ; GFX6-NEXT: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1
29 ; GFX7-NEXT: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1
35 ; GFX8-NEXT: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1
41 ; GFX10-NEXT: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1
65 ; GFX6-NEXT: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1
71 ; GFX7-NEXT: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1
77 ; GFX8-NEXT: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1
83 ; GFX10-NEXT: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1
106 ; GFX6-NEXT: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1
112 ; GFX7-NEXT: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1
[all …]
H A Dinst-select-store-flat.mir22 ; GFX7-NEXT: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
28 ; GFX8-NEXT: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
34 ; GFX9-NEXT: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
40 ; GFX10-NEXT: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
46 ; GFX11-NEXT: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
68 ; GFX7-NEXT: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
74 ; GFX8-NEXT: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
80 ; GFX9-NEXT: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
86 ; GFX10-NEXT: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
114 ; GFX7-NEXT: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
[all …]
H A Dinst-select-unmerge-values.mir17 ; GCN-NEXT: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
18 ; GCN-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub0
19 ; GCN-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub1
39 ; GCN-NEXT: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1
40 ; GCN-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY [[COPY]].sub0
41 ; GCN-NEXT: [[COPY2:%[0-9]+]]:sreg_32 = COPY [[COPY]].sub1
61 ; GCN-NEXT: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1
62 ; GCN-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub0
63 ; GCN-NEXT: [[COPY2:%[0-9]+]]:sreg_32 = COPY [[COPY]].sub1
83 ; GCN-NEXT: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1
[all …]
H A Dregbankselect-amdgcn.mfma.mir16 ; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
39 ; CHECK-NEXT: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr32
65 ; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
88 ; CHECK-NEXT: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr32
114 ; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
137 ; CHECK-NEXT: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr32
163 ; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
186 ; CHECK-NEXT: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr32
212 ; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
235 ; CHECK-NEXT: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr32
[all …]
H A Dinst-select-extract-vector-elt.mir21 ; MOVREL-NEXT: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1
29 ; GPRIDX-NEXT: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1
52 ; MOVREL-NEXT: [[COPY:%[0-9]+]]:sgpr_96 = COPY $sgpr0_sgpr1_sgpr2
60 ; GPRIDX-NEXT: [[COPY:%[0-9]+]]:sgpr_96 = COPY $sgpr0_sgpr1_sgpr2
83 ; MOVREL-NEXT: [[COPY:%[0-9]+]]:sgpr_128 = COPY $sgpr0_sgpr1_sgpr2_sgpr3
91 ; GPRIDX-NEXT: [[COPY:%[0-9]+]]:sgpr_128 = COPY $sgpr0_sgpr1_sgpr2_sgpr3
207 ; MOVREL-NEXT: [[COPY:%[0-9]+]]:sgpr_128 = COPY $sgpr0_sgpr1_sgpr2_sgpr3
574 ; MOVREL-NEXT: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
582 ; GPRIDX-NEXT: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
604 ; MOVREL-NEXT: [[COPY:%[0-9]+]]:vreg_96 = COPY $vgpr0_vgpr1_vgpr2
[all …]
H A Dregbankselect-freeze.mir16 ; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
39 ; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
62 ; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
85 ; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
108 ; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
127 ; CHECK-NEXT: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
146 ; CHECK-NEXT: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
165 ; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
184 ; CHECK-NEXT: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
203 ; CHECK-NEXT: [[COPY:%[0-9]+]]:agpr(s32) = COPY $agpr0
[all …]
H A Dinst-select-insert-vector-elt.mir19 ; MOVREL-NEXT: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1
28 ; GPRIDX-NEXT: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1
53 ; MOVREL-NEXT: [[COPY:%[0-9]+]]:sgpr_96 = COPY $sgpr0_sgpr1_sgpr2
62 ; GPRIDX-NEXT: [[COPY:%[0-9]+]]:sgpr_96 = COPY $sgpr0_sgpr1_sgpr2
87 ; MOVREL-NEXT: [[COPY:%[0-9]+]]:sgpr_128 = COPY $sgpr0_sgpr1_sgpr2_sgpr3
96 ; GPRIDX-NEXT: [[COPY:%[0-9]+]]:sgpr_128 = COPY $sgpr0_sgpr1_sgpr2_sgpr3
257 ; MOVREL-NEXT: [[COPY:%[0-9]+]]:sgpr_128 = COPY $sgpr0_sgpr1_sgpr2_sgpr3
393 ; MOVREL-NEXT: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
402 ; GPRIDX-NEXT: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
426 ; MOVREL-NEXT: [[COPY:%[0-9]+]]:vreg_96 = COPY $vgpr0_vgpr1_vgpr2
[all …]
H A Dinst-select-merge-values.mir17 ; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
40 ; GCN-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
63 ; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
86 ; GCN-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
108 ; GCN-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
133 ; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
158 ; GCN-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
185 ; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
258 ; GCN-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
287 ; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
[all …]
H A Dinst-select-store-global.mir24 ; GFX6-NEXT: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
35 ; GFX7-NEXT: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
52 ; GFX8-NEXT: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
58 ; GFX9-NEXT: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
64 ; GFX10-NEXT: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
86 ; GFX6-NEXT: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
97 ; GFX7-NEXT: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
114 ; GFX8-NEXT: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
120 ; GFX9-NEXT: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
148 ; GFX6-NEXT: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
[all …]
H A Dinst-select-fabs.mir19 ; GCN: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
26 ; SI-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
33 ; VI-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
40 ; GFX9-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
67 ; GCN: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
74 ; SI-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
81 ; VI-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
115 ; GCN: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
158 ; GCN: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
206 ; GCN: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
[all …]
H A Dcombine-foldable-fneg.mir14 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
36 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
58 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
80 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
102 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
124 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
146 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
167 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
187 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
211 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
[all …]
/llvm-project-15.0.7/llvm/test/CodeGen/AArch64/GlobalISel/
H A Dselect-fp-casts.mir18 ; CHECK: [[COPY:%[0-9]+]]:fpr32 = COPY $s0
40 ; CHECK: [[COPY:%[0-9]+]]:fpr64 = COPY $d0
62 ; CHECK: [[COPY:%[0-9]+]]:fpr64 = COPY $d0
83 ; CHECK: [[COPY:%[0-9]+]]:fpr128 = COPY $q0
104 ; CHECK: [[COPY:%[0-9]+]]:fpr128 = COPY $q0
126 ; CHECK: [[COPY:%[0-9]+]]:fpr16 = COPY $h0
148 ; CHECK: [[COPY:%[0-9]+]]:fpr16 = COPY $h0
170 ; CHECK: [[COPY:%[0-9]+]]:fpr32 = COPY $s0
191 ; CHECK: [[COPY:%[0-9]+]]:fpr64 = COPY $d0
212 ; CHECK: [[COPY:%[0-9]+]]:fpr64 = COPY $d0
[all …]
H A Dselect-binop.mir20 ; CHECK: [[COPY:%[0-9]+]]:gpr32 = COPY $w0
46 ; CHECK: [[COPY:%[0-9]+]]:gpr64 = COPY $x0
71 ; CHECK: [[COPY:%[0-9]+]]:gpr32sp = COPY $w0
95 ; CHECK: [[COPY:%[0-9]+]]:gpr64sp = COPY $x0
119 ; CHECK: [[COPY:%[0-9]+]]:gpr32sp = COPY $w1
143 ; CHECK: [[COPY:%[0-9]+]]:gpr64sp = COPY $x0
167 ; CHECK: [[COPY:%[0-9]+]]:gpr64 = COPY $x0
192 ; CHECK: [[COPY:%[0-9]+]]:gpr64 = COPY $x0
300 ; CHECK: [[COPY:%[0-9]+]]:gpr32 = COPY $w0
326 ; CHECK: [[COPY:%[0-9]+]]:gpr64 = COPY $x0
[all …]
H A Dcombine-copy.mir11 ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x0
12 ; CHECK: $x0 = COPY [[COPY]](s64)
22 ; CHECK: [[COPY:%[0-9]+]]:gpr(s64) = COPY $x0
23 ; CHECK: $x0 = COPY [[COPY]](s64)
33 ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x0
45 ; CHECK: [[COPY:%[0-9]+]]:fpr(s64) = COPY $x0
57 ; CHECK: [[COPY:%[0-9]+]]:gpr64(s64) = COPY $x0
58 ; CHECK: [[COPY1:%[0-9]+]]:gpr64 = COPY [[COPY]](s64)
69 ; CHECK: [[COPY:%[0-9]+]]:gpr64 = COPY $x0
81 ; CHECK: [[COPY:%[0-9]+]]:gpr64 = COPY $x0
[all …]
H A Dcombine-fminnum-fmaxnum.mir10 ; CHECK: [[COPY:%[0-9]+]]:_(s16) = COPY $h0
11 ; CHECK-NEXT: $h0 = COPY [[COPY]](s16)
23 ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $w0
24 ; CHECK-NEXT: $w0 = COPY [[COPY]](s32)
37 ; CHECK-NEXT: $x0 = COPY [[COPY]](s64)
50 ; CHECK-NEXT: $h0 = COPY [[COPY]](s16)
63 ; CHECK-NEXT: $w0 = COPY [[COPY]](s32)
76 ; CHECK-NEXT: $x0 = COPY [[COPY]](s64)
89 ; CHECK-NEXT: $h0 = COPY [[COPY]](s16)
102 ; CHECK-NEXT: $w0 = COPY [[COPY]](s32)
[all …]
H A Dselect-trn.mir20 ; CHECK: [[COPY:%[0-9]+]]:fpr64 = COPY $d0
43 ; CHECK: [[COPY:%[0-9]+]]:fpr128 = COPY $q0
66 ; CHECK: [[COPY:%[0-9]+]]:fpr64 = COPY $d0
89 ; CHECK: [[COPY:%[0-9]+]]:fpr128 = COPY $q0
112 ; CHECK: [[COPY:%[0-9]+]]:fpr64 = COPY $d0
135 ; CHECK: [[COPY:%[0-9]+]]:fpr128 = COPY $q0
158 ; CHECK: [[COPY:%[0-9]+]]:fpr128 = COPY $q0
181 ; CHECK: [[COPY:%[0-9]+]]:fpr64 = COPY $d0
204 ; CHECK: [[COPY:%[0-9]+]]:fpr128 = COPY $q0
227 ; CHECK: [[COPY:%[0-9]+]]:fpr64 = COPY $d0
[all …]
H A Dprelegalizercombiner-extending-loads.mir9 ; CHECK: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
24 ; CHECK: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
40 ; CHECK: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
55 ; CHECK: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
70 ; CHECK: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
88 ; CHECK: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
106 ; CHECK: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
130 ; CHECK: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
148 ; CHECK: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
168 ; CHECK: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
[all …]
/llvm-project-15.0.7/llvm/test/CodeGen/X86/GlobalISel/
H A Dselect-memop-scalar.mir115 ; SSE: [[COPY:%[0-9]+]]:gr64 = COPY $rdi
120 ; AVX: [[COPY:%[0-9]+]]:gr64 = COPY $rdi
153 ; SSE: [[COPY:%[0-9]+]]:gr64 = COPY $rdi
158 ; AVX: [[COPY:%[0-9]+]]:gr64 = COPY $rdi
191 ; SSE: [[COPY:%[0-9]+]]:gr64 = COPY $rdi
196 ; AVX: [[COPY:%[0-9]+]]:gr64 = COPY $rdi
229 ; SSE: [[COPY:%[0-9]+]]:gr64 = COPY $rdi
234 ; AVX: [[COPY:%[0-9]+]]:gr64 = COPY $rdi
269 ; SSE: [[COPY:%[0-9]+]]:gr64 = COPY $rdi
276 ; AVX: [[COPY:%[0-9]+]]:gr64 = COPY $rdi
[all …]
H A Dselect-memop-scalar-unordered.mir115 ; SSE: [[COPY:%[0-9]+]]:gr64 = COPY $rdi
120 ; AVX: [[COPY:%[0-9]+]]:gr64 = COPY $rdi
153 ; SSE: [[COPY:%[0-9]+]]:gr64 = COPY $rdi
158 ; AVX: [[COPY:%[0-9]+]]:gr64 = COPY $rdi
191 ; SSE: [[COPY:%[0-9]+]]:gr64 = COPY $rdi
196 ; AVX: [[COPY:%[0-9]+]]:gr64 = COPY $rdi
229 ; SSE: [[COPY:%[0-9]+]]:gr64 = COPY $rdi
234 ; AVX: [[COPY:%[0-9]+]]:gr64 = COPY $rdi
269 ; SSE: [[COPY:%[0-9]+]]:gr64 = COPY $rdi
276 ; AVX: [[COPY:%[0-9]+]]:gr64 = COPY $rdi
[all …]
/llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/
H A Dhigh-bits-zeroed-16-bit-ops.mir16 ; GFX8-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
26 ; GFX9-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
36 ; GFX10-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
67 ; GFX8-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
75 ; GFX9-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
83 ; GFX10-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
104 ; GFX8-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
112 ; GFX9-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
120 ; GFX10-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
146 ; GFX8-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
[all …]
/llvm-project-15.0.7/llvm/test/CodeGen/Mips/GlobalISel/instruction-select/
H A Dfloat_args.mir29 ; FP32: $f0 = COPY [[COPY]]
34 ; FP64: $f0 = COPY [[COPY]]
54 ; FP32: $d0 = COPY [[COPY]]
59 ; FP64: $d0 = COPY [[COPY]]
79 ; FP32: $f0 = COPY [[COPY]]
84 ; FP64: $f0 = COPY [[COPY]]
137 ; FP32: $f12 = COPY [[COPY]]
149 ; FP64: $f12 = COPY [[COPY]]
183 ; FP32: $d6 = COPY [[COPY]]
195 ; FP64: $d6 = COPY [[COPY]]
[all …]

12345678910>>...97