1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py 2# RUN: llc -mtriple=aarch64-- -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s 3 4--- 5name: fptrunc_s16_s32_fpr 6legalized: true 7regBankSelected: true 8 9registers: 10 - { id: 0, class: fpr } 11 - { id: 1, class: fpr } 12 13body: | 14 bb.0: 15 liveins: $s0 16 17 ; CHECK-LABEL: name: fptrunc_s16_s32_fpr 18 ; CHECK: [[COPY:%[0-9]+]]:fpr32 = COPY $s0 19 ; CHECK: [[FCVTHSr:%[0-9]+]]:fpr16 = nofpexcept FCVTHSr [[COPY]] 20 ; CHECK: $h0 = COPY [[FCVTHSr]] 21 %0(s32) = COPY $s0 22 %1(s16) = G_FPTRUNC %0 23 $h0 = COPY %1(s16) 24... 25 26--- 27name: fptrunc_s16_s64_fpr 28legalized: true 29regBankSelected: true 30 31registers: 32 - { id: 0, class: fpr } 33 - { id: 1, class: fpr } 34 35body: | 36 bb.0: 37 liveins: $d0 38 39 ; CHECK-LABEL: name: fptrunc_s16_s64_fpr 40 ; CHECK: [[COPY:%[0-9]+]]:fpr64 = COPY $d0 41 ; CHECK: [[FCVTHDr:%[0-9]+]]:fpr16 = nofpexcept FCVTHDr [[COPY]] 42 ; CHECK: $h0 = COPY [[FCVTHDr]] 43 %0(s64) = COPY $d0 44 %1(s16) = G_FPTRUNC %0 45 $h0 = COPY %1(s16) 46... 47 48--- 49name: fptrunc_s32_s64_fpr 50legalized: true 51regBankSelected: true 52 53registers: 54 - { id: 0, class: fpr } 55 - { id: 1, class: fpr } 56 57body: | 58 bb.0: 59 liveins: $d0 60 61 ; CHECK-LABEL: name: fptrunc_s32_s64_fpr 62 ; CHECK: [[COPY:%[0-9]+]]:fpr64 = COPY $d0 63 ; CHECK: [[FCVTSDr:%[0-9]+]]:fpr32 = nofpexcept FCVTSDr [[COPY]] 64 ; CHECK: $s0 = COPY [[FCVTSDr]] 65 %0(s64) = COPY $d0 66 %1(s32) = G_FPTRUNC %0 67 $s0 = COPY %1(s32) 68... 69 70--- 71name: fptrunc_v4s16_v4s32_fpr 72legalized: true 73regBankSelected: true 74 75registers: 76 - { id: 0, class: fpr } 77 - { id: 1, class: fpr } 78 79body: | 80 bb.0: 81 liveins: $d0 82 ; CHECK-LABEL: name: fptrunc_v4s16_v4s32_fpr 83 ; CHECK: [[COPY:%[0-9]+]]:fpr128 = COPY $q0 84 ; CHECK: [[FCVTNv4i16_:%[0-9]+]]:fpr64 = nofpexcept FCVTNv4i16 [[COPY]] 85 ; CHECK: $d0 = COPY [[FCVTNv4i16_]] 86 %0(<4 x s32>) = COPY $q0 87 %1(<4 x s16>) = G_FPTRUNC %0 88 $d0 = COPY %1(<4 x s16>) 89... 90 91--- 92name: fptrunc_v2s32_v2s64_fpr 93legalized: true 94regBankSelected: true 95 96registers: 97 - { id: 0, class: fpr } 98 - { id: 1, class: fpr } 99 100body: | 101 bb.0: 102 liveins: $q0 103 ; CHECK-LABEL: name: fptrunc_v2s32_v2s64_fpr 104 ; CHECK: [[COPY:%[0-9]+]]:fpr128 = COPY $q0 105 ; CHECK: [[FCVTNv2i32_:%[0-9]+]]:fpr64 = nofpexcept FCVTNv2i32 [[COPY]] 106 ; CHECK: $d0 = COPY [[FCVTNv2i32_]] 107 %0(<2 x s64>) = COPY $q0 108 %1(<2 x s32>) = G_FPTRUNC %0 109 $d0 = COPY %1(<2 x s32>) 110... 111 112--- 113name: fpext_s32_s16_fpr 114legalized: true 115regBankSelected: true 116 117registers: 118 - { id: 0, class: fpr } 119 - { id: 1, class: fpr } 120 121body: | 122 bb.0: 123 liveins: $h0 124 125 ; CHECK-LABEL: name: fpext_s32_s16_fpr 126 ; CHECK: [[COPY:%[0-9]+]]:fpr16 = COPY $h0 127 ; CHECK: [[FCVTSHr:%[0-9]+]]:fpr32 = nofpexcept FCVTSHr [[COPY]] 128 ; CHECK: $s0 = COPY [[FCVTSHr]] 129 %0(s16) = COPY $h0 130 %1(s32) = G_FPEXT %0 131 $s0 = COPY %1(s32) 132... 133 134--- 135name: fpext_s64_s16_fpr 136legalized: true 137regBankSelected: true 138 139registers: 140 - { id: 0, class: fpr } 141 - { id: 1, class: fpr } 142 143body: | 144 bb.0: 145 liveins: $h0 146 147 ; CHECK-LABEL: name: fpext_s64_s16_fpr 148 ; CHECK: [[COPY:%[0-9]+]]:fpr16 = COPY $h0 149 ; CHECK: [[FCVTDHr:%[0-9]+]]:fpr64 = nofpexcept FCVTDHr [[COPY]] 150 ; CHECK: $d0 = COPY [[FCVTDHr]] 151 %0(s16) = COPY $h0 152 %1(s64) = G_FPEXT %0 153 $d0 = COPY %1(s64) 154... 155 156--- 157name: fpext_s64_s32_fpr 158legalized: true 159regBankSelected: true 160 161registers: 162 - { id: 0, class: fpr } 163 - { id: 1, class: fpr } 164 165body: | 166 bb.0: 167 liveins: $d0 168 169 ; CHECK-LABEL: name: fpext_s64_s32_fpr 170 ; CHECK: [[COPY:%[0-9]+]]:fpr32 = COPY $s0 171 ; CHECK: [[FCVTDSr:%[0-9]+]]:fpr64 = nofpexcept FCVTDSr [[COPY]] 172 ; CHECK: $d0 = COPY [[FCVTDSr]] 173 %0(s32) = COPY $s0 174 %1(s64) = G_FPEXT %0 175 $d0 = COPY %1(s64) 176... 177 178--- 179name: fpext_v4s32_v4s16_fpr 180legalized: true 181regBankSelected: true 182 183registers: 184 - { id: 0, class: fpr } 185 - { id: 1, class: fpr } 186 187body: | 188 bb.0: 189 liveins: $d0 190 ; CHECK-LABEL: name: fpext_v4s32_v4s16_fpr 191 ; CHECK: [[COPY:%[0-9]+]]:fpr64 = COPY $d0 192 ; CHECK: [[FCVTLv4i16_:%[0-9]+]]:fpr128 = nofpexcept FCVTLv4i16 [[COPY]] 193 ; CHECK: $q0 = COPY [[FCVTLv4i16_]] 194 %0(<4 x s16>) = COPY $d0 195 %1(<4 x s32>) = G_FPEXT %0 196 $q0 = COPY %1(<4 x s32>) 197... 198 199--- 200name: fpext_v2s64_v2s32_fpr 201legalized: true 202regBankSelected: true 203 204registers: 205 - { id: 0, class: fpr } 206 - { id: 1, class: fpr } 207 208body: | 209 bb.0: 210 liveins: $d0 211 ; CHECK-LABEL: name: fpext_v2s64_v2s32_fpr 212 ; CHECK: [[COPY:%[0-9]+]]:fpr64 = COPY $d0 213 ; CHECK: [[FCVTLv2i32_:%[0-9]+]]:fpr128 = nofpexcept FCVTLv2i32 [[COPY]] 214 ; CHECK: $q0 = COPY [[FCVTLv2i32_]] 215 %0(<2 x s32>) = COPY $d0 216 %1(<2 x s64>) = G_FPEXT %0 217 $q0 = COPY %1(<2 x s64>) 218... 219 220--- 221name: sitofp_s32_s32_fpr_gpr 222legalized: true 223regBankSelected: true 224 225registers: 226 - { id: 0, class: gpr } 227 - { id: 1, class: fpr } 228 229body: | 230 bb.0: 231 liveins: $w0 232 233 ; CHECK-LABEL: name: sitofp_s32_s32_fpr_gpr 234 ; CHECK: [[COPY:%[0-9]+]]:gpr32 = COPY $w0 235 ; CHECK: [[SCVTFUWSri:%[0-9]+]]:fpr32 = nofpexcept SCVTFUWSri [[COPY]] 236 ; CHECK: $s0 = COPY [[SCVTFUWSri]] 237 %0(s32) = COPY $w0 238 %1(s32) = G_SITOFP %0 239 $s0 = COPY %1(s32) 240... 241 242--- 243name: sitofp_s32_s32_fpr_fpr 244legalized: true 245regBankSelected: true 246 247registers: 248 - { id: 0, class: fpr } 249 - { id: 1, class: fpr } 250 251body: | 252 bb.0: 253 liveins: $s0 254 255 ; CHECK-LABEL: name: sitofp_s32_s32_fpr_fpr 256 ; CHECK: [[COPY:%[0-9]+]]:fpr32 = COPY $s0 257 ; CHECK: [[SCVTFv1i32_:%[0-9]+]]:fpr32 = nofpexcept SCVTFv1i32 [[COPY]] 258 ; CHECK: $s0 = COPY [[SCVTFv1i32_]] 259 %0(s32) = COPY $s0 260 %1(s32) = G_SITOFP %0 261 $s0 = COPY %1(s32) 262... 263 264--- 265name: uitofp_s32_s32_fpr_fpr 266legalized: true 267regBankSelected: true 268 269registers: 270 - { id: 0, class: fpr } 271 - { id: 1, class: fpr } 272 273body: | 274 bb.0: 275 liveins: $s0 276 277 ; CHECK-LABEL: name: uitofp_s32_s32_fpr_fpr 278 ; CHECK: [[COPY:%[0-9]+]]:fpr32 = COPY $s0 279 ; CHECK: [[UCVTFv1i32_:%[0-9]+]]:fpr32 = nofpexcept UCVTFv1i32 [[COPY]] 280 ; CHECK: $s0 = COPY [[UCVTFv1i32_]] 281 %0(s32) = COPY $s0 282 %1(s32) = G_UITOFP %0 283 $s0 = COPY %1(s32) 284... 285 286--- 287name: sitofp_s32_s64_fpr 288legalized: true 289regBankSelected: true 290 291registers: 292 - { id: 0, class: gpr } 293 - { id: 1, class: fpr } 294 295body: | 296 bb.0: 297 liveins: $x0 298 299 ; CHECK-LABEL: name: sitofp_s32_s64_fpr 300 ; CHECK: [[COPY:%[0-9]+]]:gpr64 = COPY $x0 301 ; CHECK: [[SCVTFUXSri:%[0-9]+]]:fpr32 = nofpexcept SCVTFUXSri [[COPY]] 302 ; CHECK: $s0 = COPY [[SCVTFUXSri]] 303 %0(s64) = COPY $x0 304 %1(s32) = G_SITOFP %0 305 $s0 = COPY %1(s32) 306... 307 308--- 309name: sitofp_s64_s32_fpr 310legalized: true 311regBankSelected: true 312 313registers: 314 - { id: 0, class: gpr } 315 - { id: 1, class: fpr } 316 317body: | 318 bb.0: 319 liveins: $w0 320 321 ; CHECK-LABEL: name: sitofp_s64_s32_fpr 322 ; CHECK: [[COPY:%[0-9]+]]:gpr32 = COPY $w0 323 ; CHECK: [[SCVTFUWDri:%[0-9]+]]:fpr64 = nofpexcept SCVTFUWDri [[COPY]] 324 ; CHECK: $d0 = COPY [[SCVTFUWDri]] 325 %0(s32) = COPY $w0 326 %1(s64) = G_SITOFP %0 327 $d0 = COPY %1(s64) 328... 329 330--- 331name: sitofp_s64_s32_fpr_both 332legalized: true 333regBankSelected: true 334 335registers: 336 - { id: 0, class: fpr } 337 - { id: 1, class: fpr } 338 339body: | 340 bb.0: 341 liveins: $s0 342 343 ; CHECK-LABEL: name: sitofp_s64_s32_fpr_both 344 ; CHECK: [[COPY:%[0-9]+]]:fpr32 = COPY $s0 345 ; CHECK: [[COPY1:%[0-9]+]]:gpr32 = COPY [[COPY]] 346 ; CHECK: [[SCVTFUWDri:%[0-9]+]]:fpr64 = nofpexcept SCVTFUWDri [[COPY1]] 347 ; CHECK: $d0 = COPY [[SCVTFUWDri]] 348 %0(s32) = COPY $s0 349 %1(s64) = G_SITOFP %0 350 $d0 = COPY %1(s64) 351... 352 353--- 354name: sitofp_s64_s64_fpr 355legalized: true 356regBankSelected: true 357 358registers: 359 - { id: 0, class: gpr } 360 - { id: 1, class: fpr } 361 362body: | 363 bb.0: 364 liveins: $x0 365 366 ; CHECK-LABEL: name: sitofp_s64_s64_fpr 367 ; CHECK: [[COPY:%[0-9]+]]:gpr64 = COPY $x0 368 ; CHECK: [[SCVTFUXDri:%[0-9]+]]:fpr64 = nofpexcept SCVTFUXDri [[COPY]] 369 ; CHECK: $d0 = COPY [[SCVTFUXDri]] 370 %0(s64) = COPY $x0 371 %1(s64) = G_SITOFP %0 372 $d0 = COPY %1(s64) 373... 374 375--- 376name: uitofp_s32_s32_fpr 377legalized: true 378regBankSelected: true 379 380registers: 381 - { id: 0, class: gpr } 382 - { id: 1, class: fpr } 383 384body: | 385 bb.0: 386 liveins: $w0 387 388 ; CHECK-LABEL: name: uitofp_s32_s32_fpr 389 ; CHECK: [[COPY:%[0-9]+]]:gpr32 = COPY $w0 390 ; CHECK: [[UCVTFUWSri:%[0-9]+]]:fpr32 = nofpexcept UCVTFUWSri [[COPY]] 391 ; CHECK: $s0 = COPY [[UCVTFUWSri]] 392 %0(s32) = COPY $w0 393 %1(s32) = G_UITOFP %0 394 $s0 = COPY %1(s32) 395... 396 397--- 398name: uitofp_s32_s64_fpr 399legalized: true 400regBankSelected: true 401 402registers: 403 - { id: 0, class: gpr } 404 - { id: 1, class: fpr } 405 406body: | 407 bb.0: 408 liveins: $x0 409 410 ; CHECK-LABEL: name: uitofp_s32_s64_fpr 411 ; CHECK: [[COPY:%[0-9]+]]:gpr64 = COPY $x0 412 ; CHECK: [[UCVTFUXSri:%[0-9]+]]:fpr32 = nofpexcept UCVTFUXSri [[COPY]] 413 ; CHECK: $s0 = COPY [[UCVTFUXSri]] 414 %0(s64) = COPY $x0 415 %1(s32) = G_UITOFP %0 416 $s0 = COPY %1(s32) 417... 418 419--- 420name: uitofp_s64_s32_fpr 421legalized: true 422regBankSelected: true 423 424registers: 425 - { id: 0, class: gpr } 426 - { id: 1, class: fpr } 427 428body: | 429 bb.0: 430 liveins: $w0 431 432 ; CHECK-LABEL: name: uitofp_s64_s32_fpr 433 ; CHECK: [[COPY:%[0-9]+]]:gpr32 = COPY $w0 434 ; CHECK: [[UCVTFUWDri:%[0-9]+]]:fpr64 = nofpexcept UCVTFUWDri [[COPY]] 435 ; CHECK: $d0 = COPY [[UCVTFUWDri]] 436 %0(s32) = COPY $w0 437 %1(s64) = G_UITOFP %0 438 $d0 = COPY %1(s64) 439... 440 441--- 442name: uitofp_s64_s64_fpr 443legalized: true 444regBankSelected: true 445 446registers: 447 - { id: 0, class: gpr } 448 - { id: 1, class: fpr } 449 450body: | 451 bb.0: 452 liveins: $x0 453 454 ; CHECK-LABEL: name: uitofp_s64_s64_fpr 455 ; CHECK: [[COPY:%[0-9]+]]:gpr64 = COPY $x0 456 ; CHECK: [[UCVTFUXDri:%[0-9]+]]:fpr64 = nofpexcept UCVTFUXDri [[COPY]] 457 ; CHECK: $d0 = COPY [[UCVTFUXDri]] 458 %0(s64) = COPY $x0 459 %1(s64) = G_UITOFP %0 460 $d0 = COPY %1(s64) 461... 462 463--- 464name: fptosi_s32_s32_gpr 465legalized: true 466regBankSelected: true 467 468registers: 469 - { id: 0, class: fpr } 470 - { id: 1, class: gpr } 471 472body: | 473 bb.0: 474 liveins: $s0 475 476 ; CHECK-LABEL: name: fptosi_s32_s32_gpr 477 ; CHECK: [[COPY:%[0-9]+]]:fpr32 = COPY $s0 478 ; CHECK: [[FCVTZSUWSr:%[0-9]+]]:gpr32 = nofpexcept FCVTZSUWSr [[COPY]] 479 ; CHECK: $w0 = COPY [[FCVTZSUWSr]] 480 %0(s32) = COPY $s0 481 %1(s32) = G_FPTOSI %0 482 $w0 = COPY %1(s32) 483... 484 485--- 486name: fptosi_s32_s64_gpr 487legalized: true 488regBankSelected: true 489 490registers: 491 - { id: 0, class: fpr } 492 - { id: 1, class: gpr } 493 494body: | 495 bb.0: 496 liveins: $d0 497 498 ; CHECK-LABEL: name: fptosi_s32_s64_gpr 499 ; CHECK: [[COPY:%[0-9]+]]:fpr64 = COPY $d0 500 ; CHECK: [[FCVTZSUWDr:%[0-9]+]]:gpr32 = nofpexcept FCVTZSUWDr [[COPY]] 501 ; CHECK: $w0 = COPY [[FCVTZSUWDr]] 502 %0(s64) = COPY $d0 503 %1(s32) = G_FPTOSI %0 504 $w0 = COPY %1(s32) 505... 506 507--- 508name: fptosi_s64_s32_gpr 509legalized: true 510regBankSelected: true 511 512registers: 513 - { id: 0, class: fpr } 514 - { id: 1, class: gpr } 515 516body: | 517 bb.0: 518 liveins: $s0 519 520 ; CHECK-LABEL: name: fptosi_s64_s32_gpr 521 ; CHECK: [[COPY:%[0-9]+]]:fpr32 = COPY $s0 522 ; CHECK: [[FCVTZSUXSr:%[0-9]+]]:gpr64 = nofpexcept FCVTZSUXSr [[COPY]] 523 ; CHECK: $x0 = COPY [[FCVTZSUXSr]] 524 %0(s32) = COPY $s0 525 %1(s64) = G_FPTOSI %0 526 $x0 = COPY %1(s64) 527... 528 529--- 530name: fptosi_s64_s64_gpr 531legalized: true 532regBankSelected: true 533 534registers: 535 - { id: 0, class: fpr } 536 - { id: 1, class: gpr } 537 538body: | 539 bb.0: 540 liveins: $d0 541 542 ; CHECK-LABEL: name: fptosi_s64_s64_gpr 543 ; CHECK: [[COPY:%[0-9]+]]:fpr64 = COPY $d0 544 ; CHECK: [[FCVTZSUXDr:%[0-9]+]]:gpr64 = nofpexcept FCVTZSUXDr [[COPY]] 545 ; CHECK: $x0 = COPY [[FCVTZSUXDr]] 546 %0(s64) = COPY $d0 547 %1(s64) = G_FPTOSI %0 548 $x0 = COPY %1(s64) 549... 550 551--- 552name: fptoui_s32_s32_gpr 553legalized: true 554regBankSelected: true 555 556registers: 557 - { id: 0, class: fpr } 558 - { id: 1, class: gpr } 559 560body: | 561 bb.0: 562 liveins: $s0 563 564 ; CHECK-LABEL: name: fptoui_s32_s32_gpr 565 ; CHECK: [[COPY:%[0-9]+]]:fpr32 = COPY $s0 566 ; CHECK: [[FCVTZUUWSr:%[0-9]+]]:gpr32 = nofpexcept FCVTZUUWSr [[COPY]] 567 ; CHECK: $w0 = COPY [[FCVTZUUWSr]] 568 %0(s32) = COPY $s0 569 %1(s32) = G_FPTOUI %0 570 $w0 = COPY %1(s32) 571... 572 573--- 574name: fptoui_s32_s64_gpr 575legalized: true 576regBankSelected: true 577 578registers: 579 - { id: 0, class: fpr } 580 - { id: 1, class: gpr } 581 582body: | 583 bb.0: 584 liveins: $d0 585 586 ; CHECK-LABEL: name: fptoui_s32_s64_gpr 587 ; CHECK: [[COPY:%[0-9]+]]:fpr64 = COPY $d0 588 ; CHECK: [[FCVTZUUWDr:%[0-9]+]]:gpr32 = nofpexcept FCVTZUUWDr [[COPY]] 589 ; CHECK: $w0 = COPY [[FCVTZUUWDr]] 590 %0(s64) = COPY $d0 591 %1(s32) = G_FPTOUI %0 592 $w0 = COPY %1(s32) 593... 594 595--- 596name: fptoui_s64_s32_gpr 597legalized: true 598regBankSelected: true 599 600registers: 601 - { id: 0, class: fpr } 602 - { id: 1, class: gpr } 603 604body: | 605 bb.0: 606 liveins: $s0 607 608 ; CHECK-LABEL: name: fptoui_s64_s32_gpr 609 ; CHECK: [[COPY:%[0-9]+]]:fpr32 = COPY $s0 610 ; CHECK: [[FCVTZUUXSr:%[0-9]+]]:gpr64 = nofpexcept FCVTZUUXSr [[COPY]] 611 ; CHECK: $x0 = COPY [[FCVTZUUXSr]] 612 %0(s32) = COPY $s0 613 %1(s64) = G_FPTOUI %0 614 $x0 = COPY %1(s64) 615... 616 617--- 618name: fptoui_s64_s64_gpr 619legalized: true 620regBankSelected: true 621 622registers: 623 - { id: 0, class: fpr } 624 - { id: 1, class: gpr } 625 626body: | 627 bb.0: 628 liveins: $d0 629 630 ; CHECK-LABEL: name: fptoui_s64_s64_gpr 631 ; CHECK: [[COPY:%[0-9]+]]:fpr64 = COPY $d0 632 ; CHECK: [[FCVTZUUXDr:%[0-9]+]]:gpr64 = nofpexcept FCVTZUUXDr [[COPY]] 633 ; CHECK: $x0 = COPY [[FCVTZUUXDr]] 634 %0(s64) = COPY $d0 635 %1(s64) = G_FPTOUI %0 636 $x0 = COPY %1(s64) 637... 638 639--- 640name: sitofp_v2s64_v2s32 641legalized: true 642regBankSelected: true 643 644body: | 645 bb.0: 646 liveins: $d0 647 648 ; CHECK-LABEL: name: sitofp_v2s64_v2s32 649 ; CHECK: [[COPY:%[0-9]+]]:fpr64 = COPY $d0 650 ; CHECK: [[SSHLLv2i32_shift:%[0-9]+]]:fpr128 = SSHLLv2i32_shift [[COPY]], 0 651 ; CHECK: [[SCVTFv2f64_:%[0-9]+]]:fpr128 = nofpexcept SCVTFv2f64 [[SSHLLv2i32_shift]] 652 ; CHECK: $q0 = COPY [[SCVTFv2f64_]] 653 %0:fpr(<2 x s32>) = COPY $d0 654 %1:fpr(<2 x s64>) = G_SITOFP %0 655 $q0 = COPY %1(<2 x s64>) 656... 657 658--- 659name: uitofp_v2s64_v2s32 660legalized: true 661regBankSelected: true 662 663body: | 664 bb.0: 665 liveins: $d0 666 667 ; CHECK-LABEL: name: uitofp_v2s64_v2s32 668 ; CHECK: [[COPY:%[0-9]+]]:fpr64 = COPY $d0 669 ; CHECK: [[USHLLv2i32_shift:%[0-9]+]]:fpr128 = USHLLv2i32_shift [[COPY]], 0 670 ; CHECK: [[UCVTFv2f64_:%[0-9]+]]:fpr128 = nofpexcept UCVTFv2f64 [[USHLLv2i32_shift]] 671 ; CHECK: $q0 = COPY [[UCVTFv2f64_]] 672 %0:fpr(<2 x s32>) = COPY $d0 673 %1:fpr(<2 x s64>) = G_UITOFP %0 674 $q0 = COPY %1(<2 x s64>) 675... 676 677--- 678name: sitofp_v2s32_v2s64 679legalized: true 680regBankSelected: true 681 682body: | 683 bb.0: 684 liveins: $q0 685 686 ; CHECK-LABEL: name: sitofp_v2s32_v2s64 687 ; CHECK: [[COPY:%[0-9]+]]:fpr128 = COPY $q0 688 ; CHECK: [[SCVTFv2f64_:%[0-9]+]]:fpr128 = nofpexcept SCVTFv2f64 [[COPY]] 689 ; CHECK: [[FCVTNv2i32_:%[0-9]+]]:fpr64 = nofpexcept FCVTNv2i32 [[SCVTFv2f64_]] 690 ; CHECK: $d0 = COPY [[FCVTNv2i32_]] 691 %0:fpr(<2 x s64>) = COPY $q0 692 %1:fpr(<2 x s32>) = G_SITOFP %0 693 $d0 = COPY %1(<2 x s32>) 694... 695 696--- 697name: uitofp_v2s32_v2s64 698legalized: true 699regBankSelected: true 700 701body: | 702 bb.0: 703 liveins: $q0 704 705 ; CHECK-LABEL: name: uitofp_v2s32_v2s64 706 ; CHECK: [[COPY:%[0-9]+]]:fpr128 = COPY $q0 707 ; CHECK: [[UCVTFv2f64_:%[0-9]+]]:fpr128 = nofpexcept UCVTFv2f64 [[COPY]] 708 ; CHECK: [[FCVTNv2i32_:%[0-9]+]]:fpr64 = nofpexcept FCVTNv2i32 [[UCVTFv2f64_]] 709 ; CHECK: $d0 = COPY [[FCVTNv2i32_]] 710 %0:fpr(<2 x s64>) = COPY $q0 711 %1:fpr(<2 x s32>) = G_UITOFP %0 712 $d0 = COPY %1(<2 x s32>) 713... 714 715--- 716name: fptosi_v2s64_v2s32 717legalized: true 718regBankSelected: true 719 720body: | 721 bb.0: 722 liveins: $d0 723 724 ; CHECK-LABEL: name: fptosi_v2s64_v2s32 725 ; CHECK: [[COPY:%[0-9]+]]:fpr64 = COPY $d0 726 ; CHECK: [[FCVTLv2i32_:%[0-9]+]]:fpr128 = nofpexcept FCVTLv2i32 [[COPY]] 727 ; CHECK: [[FCVTZSv2f64_:%[0-9]+]]:fpr128 = nofpexcept FCVTZSv2f64 [[FCVTLv2i32_]] 728 ; CHECK: $q0 = COPY [[FCVTZSv2f64_]] 729 %0:fpr(<2 x s32>) = COPY $d0 730 %1:fpr(<2 x s64>) = G_FPTOSI %0 731 $q0 = COPY %1(<2 x s64>) 732... 733 734--- 735name: fptoui_v2s64_v2s32 736legalized: true 737regBankSelected: true 738 739body: | 740 bb.0: 741 liveins: $d0 742 743 ; CHECK-LABEL: name: fptoui_v2s64_v2s32 744 ; CHECK: [[COPY:%[0-9]+]]:fpr64 = COPY $d0 745 ; CHECK: [[FCVTLv2i32_:%[0-9]+]]:fpr128 = nofpexcept FCVTLv2i32 [[COPY]] 746 ; CHECK: [[FCVTZUv2f64_:%[0-9]+]]:fpr128 = nofpexcept FCVTZUv2f64 [[FCVTLv2i32_]] 747 ; CHECK: $q0 = COPY [[FCVTZUv2f64_]] 748 %0:fpr(<2 x s32>) = COPY $d0 749 %1:fpr(<2 x s64>) = G_FPTOUI %0 750 $q0 = COPY %1(<2 x s64>) 751... 752 753--- 754name: fptosi_v2s32_v2s64 755legalized: true 756regBankSelected: true 757 758body: | 759 bb.0: 760 liveins: $q0 761 762 ; CHECK-LABEL: name: fptosi_v2s32_v2s64 763 ; CHECK: [[COPY:%[0-9]+]]:fpr128 = COPY $q0 764 ; CHECK: [[FCVTZSv2f64_:%[0-9]+]]:fpr128 = nofpexcept FCVTZSv2f64 [[COPY]] 765 ; CHECK: [[XTNv2i32_:%[0-9]+]]:fpr64 = XTNv2i32 [[FCVTZSv2f64_]] 766 ; CHECK: $d0 = COPY [[XTNv2i32_]] 767 %0:fpr(<2 x s64>) = COPY $q0 768 %1:fpr(<2 x s32>) = G_FPTOSI %0 769 $d0 = COPY %1(<2 x s32>) 770... 771 772--- 773name: fptoui_v2s32_v2s64 774legalized: true 775regBankSelected: true 776 777body: | 778 bb.0: 779 liveins: $q0 780 781 ; CHECK-LABEL: name: fptoui_v2s32_v2s64 782 ; CHECK: [[COPY:%[0-9]+]]:fpr128 = COPY $q0 783 ; CHECK: [[FCVTZUv2f64_:%[0-9]+]]:fpr128 = nofpexcept FCVTZUv2f64 [[COPY]] 784 ; CHECK: [[XTNv2i32_:%[0-9]+]]:fpr64 = XTNv2i32 [[FCVTZUv2f64_]] 785 ; CHECK: $d0 = COPY [[XTNv2i32_]] 786 %0:fpr(<2 x s64>) = COPY $q0 787 %1:fpr(<2 x s32>) = G_FPTOUI %0 788 $d0 = COPY %1(<2 x s32>) 789... 790