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Searched refs:AssertAlign (Results 1 – 9 of 9) sorted by relevance

/llvm-project-15.0.7/llvm/include/llvm/CodeGen/
H A DISDOpcodes.h68 AssertAlign, enumerator
H A DSelectionDAGNodes.h2941 : SDNode(ISD::AssertAlign, Order, DL, getSDVTList(VT)), Alignment(A) {}
2946 return N->getOpcode() == ISD::AssertAlign;
/llvm-project-15.0.7/llvm/lib/CodeGen/SelectionDAG/
H A DSelectionDAGDumper.cpp108 case ISD::AssertAlign: return "AssertAlign"; in getOperationName()
H A DSelectionDAGISel.cpp2827 case ISD::AssertAlign: in SelectCodeCommon()
H A DSelectionDAG.cpp847 case ISD::AssertAlign: in AddNodeIDCustom()
3514 case ISD::AssertAlign: { in computeKnownBits()
5851 AddNodeIDNode(ID, ISD::AssertAlign, getVTList(Val.getValueType()), {Val}); in getAssertAlign()
H A DDAGCombiner.cpp1746 case ISD::AssertAlign: return visitAssertAlign(N); in visit()
/llvm-project-15.0.7/llvm/lib/Target/X86/
H A DX86InstrCompiler.td1419 // be copying from a truncate. AssertSext/AssertZext/AssertAlign aren't saying
1429 N->getOpcode() != ISD::AssertAlign &&
/llvm-project-15.0.7/llvm/include/llvm/Target/
H A DTargetSelectionDAG.td731 def assertalign : SDNode<"ISD::AssertAlign", SDT_assert>;
/llvm-project-15.0.7/llvm/lib/Target/AArch64/
H A DAArch64ISelDAGToDAG.cpp877 Opc != ISD::AssertZext && Opc != ISD::AssertAlign && in SelectArithExtendedRegister()