| /llvm-project-15.0.7/llvm/include/llvm/CodeGen/ |
| H A D | ISDOpcodes.h | 1184 ATOMIC_SWAP, enumerator
|
| H A D | SelectionDAGNodes.h | 1393 case ISD::ATOMIC_SWAP:
1460 N->getOpcode() == ISD::ATOMIC_SWAP ||
|
| /llvm-project-15.0.7/llvm/lib/CodeGen/ |
| H A D | TargetLoweringBase.cpp | 551 case ISD::ATOMIC_SWAP: { in getOUTLINE_ATOMIC()
597 OP_TO_LIBCALL(ISD::ATOMIC_SWAP, SYNC_LOCK_TEST_AND_SET) in getSYNC()
774 setOperationAction(ISD::ATOMIC_SWAP, VT, Promote); in initActions()
775 AddPromotedToType(ISD::ATOMIC_SWAP, VT, IntVT); in initActions()
|
| /llvm-project-15.0.7/llvm/lib/Target/BPF/ |
| H A D | BPFISelLowering.cpp | 95 setOperationAction(ISD::ATOMIC_SWAP, VT, Custom); in BPFTargetLowering()
269 case ISD::ATOMIC_SWAP: in ReplaceNodeResults()
|
| /llvm-project-15.0.7/llvm/lib/Target/VE/ |
| H A D | VEISelLowering.cpp | 265 setOperationAction(ISD::ATOMIC_SWAP, VT, Custom); in initSPUActions()
1867 case ISD::ATOMIC_SWAP: in LowerOperation()
1944 case ISD::ATOMIC_SWAP: in ReplaceNodeResults()
2701 case ISD::ATOMIC_SWAP: in isI32Insn()
|
| /llvm-project-15.0.7/llvm/lib/Target/Mips/ |
| H A D | Mips16ISelLowering.cpp | 132 setOperationAction(ISD::ATOMIC_SWAP, MVT::i32, Expand); in Mips16TargetLowering()
|
| H A D | MipsInstrInfo.td | 1807 // Atomic instructions with 2 source operands (ATOMIC_SWAP & ATOMIC_LOAD_*).
|
| /llvm-project-15.0.7/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | SelectionDAGDumper.cpp | 85 case ISD::ATOMIC_SWAP: return "AtomicSwap"; in getOperationName()
|
| H A D | LegalizeFloatTypes.cpp | 131 case ISD::ATOMIC_SWAP: R = BitcastToInt_ATOMIC_SWAP(N); break; in SoftenFloatResult()
2301 case ISD::ATOMIC_SWAP: R = BitcastToInt_ATOMIC_SWAP(N); break; in PromoteFloatResult()
2567 = DAG.getAtomic(ISD::ATOMIC_SWAP, SL, CastVT, in BitcastToInt_ATOMIC_SWAP()
2664 case ISD::ATOMIC_SWAP: R = BitcastToInt_ATOMIC_SWAP(N); break; in SoftPromoteHalfResult()
|
| H A D | LegalizeDAG.cpp | 2787 SDValue Swap = DAG.getAtomic(ISD::ATOMIC_SWAP, dl, in ExpandNode()
3943 case ISD::ATOMIC_SWAP: in ConvertNodeToLibcall()
5030 case ISD::ATOMIC_SWAP: { in PromoteNode()
5040 = DAG.getAtomic(ISD::ATOMIC_SWAP, SL, NVT, in PromoteNode()
|
| H A D | LegalizeIntegerTypes.cpp | 226 case ISD::ATOMIC_SWAP: in PromoteIntegerResult()
2458 case ISD::ATOMIC_SWAP: in ExpandIntegerResult()
5025 SDValue Swap = DAG.getAtomic(ISD::ATOMIC_SWAP, dl, in ExpandIntOp_STORE()
5143 SDValue Swap = DAG.getAtomic(ISD::ATOMIC_SWAP, dl, in ExpandIntOp_ATOMIC_STORE()
|
| H A D | SelectionDAG.cpp | 805 case ISD::ATOMIC_SWAP: in AddNodeIDCustom()
3786 case ISD::ATOMIC_SWAP: in computeKnownBits()
4411 case ISD::ATOMIC_SWAP: in ComputeNumSignBits()
7565 Opcode == ISD::ATOMIC_SWAP || in getAtomic()
|
| H A D | SelectionDAGBuilder.cpp | 4612 case AtomicRMWInst::Xchg: NT = ISD::ATOMIC_SWAP; break; in visitAtomicRMW()
|
| /llvm-project-15.0.7/llvm/docs/ |
| H A D | Atomics.rst | 597 ISelLowering code has set the corresponding ``ATOMIC_CMPXCHG``, ``ATOMIC_SWAP``,
|
| /llvm-project-15.0.7/llvm/lib/Target/Sparc/ |
| H A D | SparcISelLowering.cpp | 1695 setOperationAction(ISD::ATOMIC_SWAP, MVT::i32, Legal); in SparcTargetLowering()
1705 setOperationAction(ISD::ATOMIC_SWAP, MVT::i64, Legal); in SparcTargetLowering()
|
| /llvm-project-15.0.7/llvm/lib/Target/AVR/ |
| H A D | AVRISelLowering.cpp | 136 setOperationAction(ISD::ATOMIC_SWAP, VT, Expand); in AVRTargetLowering()
|
| /llvm-project-15.0.7/llvm/include/llvm/IR/ |
| H A D | IntrinsicsAMDGPU.td | 946 defm int_amdgcn_image_atomic_swap : AMDGPUImageDimAtomic<"ATOMIC_SWAP">;
|
| /llvm-project-15.0.7/llvm/include/llvm/Target/ |
| H A D | TargetSelectionDAG.td | 628 def atomic_swap : SDNode<"ISD::ATOMIC_SWAP", SDTAtomic2,
|
| /llvm-project-15.0.7/llvm/lib/Target/X86/ |
| H A D | X86InstrInfo.td | 2091 multiclass ATOMIC_SWAP<bits<8> opc8, bits<8> opc, string mnemonic, string frag> {
2122 defm XCHG : ATOMIC_SWAP<0x86, 0x87, "xchg", "atomic_swap">, NotMemoryFoldable;
|
| H A D | X86ISelLowering.cpp | 31789 SDValue Swap = DAG.getAtomic(ISD::ATOMIC_SWAP, dl, in LowerATOMIC_STORE()
33309 case ISD::ATOMIC_SWAP: in ReplaceNodeResults()
|
| /llvm-project-15.0.7/llvm/lib/Target/SystemZ/ |
| H A D | SystemZISelLowering.cpp | 239 setOperationAction(ISD::ATOMIC_SWAP, MVT::i32, Custom); in SystemZTargetLowering()
5751 case ISD::ATOMIC_SWAP: in LowerOperation()
|
| H A D | SystemZInstrFormats.td | 5146 // OPERATOR is ATOMIC_SWAP or an ATOMIC_LOAD_* operation. PAT and OPERAND
|
| /llvm-project-15.0.7/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 726 setOperationAction(ISD::ATOMIC_SWAP, MVT::i8, LibCall); in AArch64TargetLowering()
727 setOperationAction(ISD::ATOMIC_SWAP, MVT::i16, LibCall); in AArch64TargetLowering()
728 setOperationAction(ISD::ATOMIC_SWAP, MVT::i32, LibCall); in AArch64TargetLowering()
729 setOperationAction(ISD::ATOMIC_SWAP, MVT::i64, LibCall); in AArch64TargetLowering()
|
| /llvm-project-15.0.7/llvm/lib/Target/AMDGPU/ |
| H A D | SIISelLowering.cpp | 756 ISD::ATOMIC_SWAP, in SITargetLowering()
|
| /llvm-project-15.0.7/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 1340 setOperationAction(ISD::ATOMIC_SWAP, MVT::i32, Expand); in ARMTargetLowering()
|