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Searched refs:amdgpu_ras (Results 1 – 25 of 25) sorted by relevance

/linux-6.15/Documentation/gpu/amdgpu/
H A Dras.rst11 .. kernel-doc:: drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
17 .. kernel-doc:: drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
23 .. kernel-doc:: drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
29 .. kernel-doc:: drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
35 .. kernel-doc:: drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
/linux-6.15/drivers/gpu/drm/amd/amdgpu/
H A Damdgpu_ras.c1740 struct amdgpu_ras *con = in amdgpu_ras_sysfs_badpages_read()
1771 struct amdgpu_ras *con = in amdgpu_ras_sysfs_features_read()
1780 struct amdgpu_ras *con = in amdgpu_ras_sysfs_version_show()
3225 struct amdgpu_ras *con = container_of(work, struct amdgpu_ras, in amdgpu_ras_do_page_retirement()
3809 struct amdgpu_ras *con = container_of(work, struct amdgpu_ras, in amdgpu_ras_counte_dw()
4349 struct amdgpu_ras *ras; in amdgpu_ras_get_fed_status()
4360 struct amdgpu_ras *ras; in amdgpu_ras_set_fed()
4373 struct amdgpu_ras *ras; in amdgpu_ras_clear_err_state()
4383 struct amdgpu_ras *ras; in amdgpu_ras_set_err_poison()
4392 struct amdgpu_ras *ras; in amdgpu_ras_is_err_state()
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H A Damdgpu_ras_eeprom.c441 struct amdgpu_ras *con = amdgpu_ras_get_context(adev); in amdgpu_ras_eeprom_reset_table()
551 struct amdgpu_ras *con = amdgpu_ras_get_context(adev); in amdgpu_ras_eeprom_check_err_threshold()
629 struct amdgpu_ras *con = amdgpu_ras_get_context(to_amdgpu_device(control)); in amdgpu_ras_eeprom_append_table()
751 struct amdgpu_ras *ras = amdgpu_ras_get_context(adev); in amdgpu_ras_eeprom_update_header()
957 struct amdgpu_ras *con = amdgpu_ras_get_context(adev); in amdgpu_ras_eeprom_read()
1058 struct amdgpu_ras *ras = amdgpu_ras_get_context(adev); in amdgpu_ras_debugfs_eeprom_size_read()
1115 struct amdgpu_ras *ras = container_of(control, struct amdgpu_ras, in amdgpu_ras_debugfs_set_ret_size()
1127 struct amdgpu_ras *ras = amdgpu_ras_get_context(adev); in amdgpu_ras_debugfs_table_read()
1242 struct amdgpu_ras *ras = amdgpu_ras_get_context(adev); in amdgpu_ras_debugfs_eeprom_table_read()
1365 struct amdgpu_ras *ras = amdgpu_ras_get_context(adev); in amdgpu_ras_eeprom_init()
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H A Dgfx_v11_0_3.c88 struct amdgpu_ras *con = amdgpu_ras_get_context(adev); in gfx_v11_0_3_poison_consumption_handler()
95 struct amdgpu_ras *ras = amdgpu_ras_get_context(adev); in gfx_v11_0_3_poison_consumption_handler()
H A Damdgpu_umc.c98 struct amdgpu_ras *con = amdgpu_ras_get_context(adev); in amdgpu_umc_handle_bad_pages()
194 struct amdgpu_ras *con = amdgpu_ras_get_context(adev); in amdgpu_umc_do_page_retirement()
248 struct amdgpu_ras *con = amdgpu_ras_get_context(adev); in amdgpu_umc_pasid_poison_handler()
475 struct amdgpu_ras *con = amdgpu_ras_get_context(adev); in amdgpu_umc_logs_ecc_err()
H A Dumc_v8_10.c341 struct amdgpu_ras *ras = amdgpu_ras_get_context(adev); in umc_v8_10_ecc_info_query_correctable_error_count()
360 struct amdgpu_ras *ras = amdgpu_ras_get_context(adev); in umc_v8_10_ecc_info_query_uncorrectable_error_count()
408 struct amdgpu_ras *ras = amdgpu_ras_get_context(adev); in umc_v8_10_ecc_info_query_error_address()
H A Dumc_v8_7.c56 struct amdgpu_ras *ras = amdgpu_ras_get_context(adev); in umc_v8_7_ecc_info_query_correctable_error_count()
75 struct amdgpu_ras *ras = amdgpu_ras_get_context(adev); in umc_v8_7_ecc_info_querry_uncorrectable_error_count()
137 struct amdgpu_ras *ras = amdgpu_ras_get_context(adev); in umc_v8_7_ecc_info_query_error_address()
H A Dumc_v6_7.c101 struct amdgpu_ras *ras = amdgpu_ras_get_context(adev); in umc_v6_7_ecc_info_query_correctable_error_count()
143 struct amdgpu_ras *ras = amdgpu_ras_get_context(adev); in umc_v6_7_ecc_info_querry_uncorrectable_error_count()
228 struct amdgpu_ras *ras = amdgpu_ras_get_context(adev); in umc_v6_7_ecc_info_query_error_address()
H A Damdgpu_ras.h499 struct amdgpu_ras { struct
909 struct amdgpu_ras* amdgpu_ras_get_context(struct amdgpu_device *adev);
911 int amdgpu_ras_set_context(struct amdgpu_device *adev, struct amdgpu_ras *ras_con);
H A Dumc_v12_0.c466 struct amdgpu_ras *con = amdgpu_ras_get_context(adev); in umc_v12_0_update_ecc_status()
606 struct amdgpu_ras *con = amdgpu_ras_get_context(adev); in umc_v12_0_query_ras_ecc_err_addr()
H A Daldebaran.c319 struct amdgpu_ras *con; in aldebaran_mode2_restore_hwcontext()
H A DMakefile63 amdgpu_xgmi.o amdgpu_csa.o amdgpu_ras.o amdgpu_vm_cpu.o \
H A Damdgpu_psp.h206 struct amdgpu_ras *ras;
H A Dnbio_v7_9.c537 struct amdgpu_ras *ras = amdgpu_ras_get_context(adev); in nbio_v7_9_handle_ras_controller_intr_no_bifring()
H A Dsoc15.c508 struct amdgpu_ras *ras = amdgpu_ras_get_context(adev); in soc15_asic_baco_reset()
531 struct amdgpu_ras *ras = amdgpu_ras_get_context(adev); in soc15_asic_reset_method()
H A Dpsp_v13_0.c800 struct amdgpu_ras *con = amdgpu_ras_get_context(adev); in psp_v13_0_get_ras_capability()
H A Dnbio_v7_4.c364 struct amdgpu_ras *ras = amdgpu_ras_get_context(adev); in nbio_v7_4_handle_ras_controller_intr_no_bifring()
H A Damdgpu_ctx.c579 struct amdgpu_ras *con = amdgpu_ras_get_context(adev); in amdgpu_ctx_query2()
H A Damdgpu_amdkfd_gpuvm.c174 struct amdgpu_ras *con = amdgpu_ras_get_context(adev); in amdgpu_amdkfd_reserve_mem_limit()
1623 struct amdgpu_ras *con = amdgpu_ras_get_context(adev); in amdgpu_amdkfd_get_available_memory()
H A Damdgpu_virt.c1197 struct amdgpu_ras *con = amdgpu_ras_get_context(adev); in amdgpu_virt_get_ras_capability()
H A Damdgpu_device.c5890 struct amdgpu_ras *con = amdgpu_ras_get_context(adev); in amdgpu_device_stop_pending_resets()
6526 struct amdgpu_ras *ras = amdgpu_ras_get_context(adev); in amdgpu_device_baco_enter()
6541 struct amdgpu_ras *ras = amdgpu_ras_get_context(adev); in amdgpu_device_baco_exit()
H A Damdgpu_kms.c1196 struct amdgpu_ras *ras = amdgpu_ras_get_context(adev); in amdgpu_info_ioctl()
H A Damdgpu_psp.c2813 struct amdgpu_ras *ras = psp->ras_context.ras; in psp_load_smu_fw()
/linux-6.15/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
H A Dvega20_baco.c75 struct amdgpu_ras *ras = amdgpu_ras_get_context(adev); in vega20_baco_set_state()
/linux-6.15/drivers/gpu/drm/amd/pm/swsmu/smu11/
H A Dsmu_v11_0.c1598 struct amdgpu_ras *ras = amdgpu_ras_get_context(adev); in smu_v11_0_baco_set_state()