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/linux-6.15/Documentation/devicetree/bindings/interrupt-controller/
H A Dqcom,pdc.yaml7 title: PDC interrupt controller
14 Power Domain Controller (PDC) that is on always-on domain. In addition to
20 controller PDC is next in hierarchy, followed by others. Drivers requiring
21 wakeup capabilities of their device interrupts routed through the PDC, must
22 specify PDC as their interrupt controller and request the PDC port associated
59 - description: PDC base register region
73 - description: starting PDC port
74 - description: GIC hwirq number for the PDC port
77 Specifies the PDC pin offset and the number of PDC ports.
78 The tuples indicates the valid mapping of valid PDC ports
H A Dimg,pdc-intc.txt1 * ImgTec Powerdown Controller (PDC) Interrupt Controller Binding
4 representation of a PDC IRQ controller. This has a number of input interrupt
13 - reg: Specifies the base PDC physical address(s) and size(s) of the
27 shared SysWake interrupt, and remaining specifies shall be PDC peripheral
52 * TZ1090 PDC block
82 * An SoC peripheral that is wired through the PDC.
/linux-6.15/Documentation/devicetree/bindings/mailbox/
H A Dbrcm,iproc-pdc-mbox.txt1 The PDC driver manages data transfer to and from various offload engines
2 on some Broadcom SoCs. An SoC may have multiple PDC hardware blocks. There is
3 one device tree entry per block. On some chips, the PDC functionality is
9 - reg: Should contain PDC registers location and length.
10 - interrupts: Should contain the IRQ line for the PDC.
20 reg = <0 0x612c0000 0 0x445>; /* PDC FS0 regs */
/linux-6.15/Documentation/devicetree/bindings/display/msm/
H A Dgmu.yaml101 - description: GMU PDC registers
102 - description: GMU PDC sequence registers
136 - description: GMU PDC registers
172 - description: GMU PDC registers
173 - description: GMU PDC sequence registers
192 - description: GMU PDC registers
193 - description: GMU PDC sequence registers
240 - description: GMU PDC registers
/linux-6.15/Documentation/devicetree/bindings/reset/
H A Dqcom,pdc-global.yaml7 title: Qualcomm PDC Global
13 The bindings describes the reset-controller found on PDC-Global (Power Domain
/linux-6.15/Documentation/devicetree/bindings/serial/
H A Datmel,at91-usart.yaml78 description: use of PDC or DMA for receiving data
82 description: use of PDC or DMA for transmitting data
139 /* use PDC */
/linux-6.15/drivers/parisc/
H A DKconfig116 bool "PDC chassis state codes support"
134 bool "PDC chassis warnings support"
148 tristate "PDC Stable Storage support"
153 variables (PDC non volatile variables such as Primary Boot Path,
/linux-6.15/Documentation/devicetree/bindings/watchdog/
H A Dimg,pdc-wdt.yaml7 title: ImgTec PowerDown Controller (PDC) Watchdog Timer (WDT)
/linux-6.15/arch/arm64/boot/dts/broadcom/northstar2/
H A Dns2.dtsi217 reg = <0x612c0000 0x445>; /* PDC FS0 regs */
233 reg = <0x612e0000 0x445>; /* PDC FS1 regs */
249 reg = <0x61300000 0x445>; /* PDC FS2 regs */
265 reg = <0x61320000 0x445>; /* PDC FS3 regs */
/linux-6.15/sound/soc/atmel/
H A DKconfig25 tristate "SoC PCM DAI support for AT91 SSC controller using PDC"
31 in PDC mode configured using audio-graph-card in device-tree.
/linux-6.15/drivers/reset/
H A DKconfig202 tristate "Qualcomm PDC Reset Driver"
205 This enables the PDC (Power Domain Controller) reset driver
207 to control reset signals provided by PDC for Modem, Compute,
/linux-6.15/Documentation/devicetree/bindings/remoteproc/
H A Dqcom,sdm845-adsp-pil.yaml68 - description: PDC AUDIO SYNC RESET
H A Dqcom,sc7280-wpss-pil.yaml71 - description: PDC SYNC
H A Dqcom,sc7280-adsp-pil.yaml64 - description: PDC AUDIO SYNC RESET
H A Dqcom,sc7180-mss-pil.yaml87 - description: PDC reset
H A Dqcom,sc7280-mss-pil.yaml87 - description: PDC reset
H A Dqcom,msm8996-mss-pil.yaml86 - description: PDC reset (only valid for qcom,sdm845-mss-pil)
/linux-6.15/drivers/video/fbdev/sis/
H A Dvstruct.h295 short PDC, PDCA; member
H A Dsis_main.c2978 if(ivideo->SiS_Pr.PDC == -1) { in sisfb_save_pdc_emi()
2980 ivideo->SiS_Pr.PDC = ivideo->detectedpdc; in sisfb_save_pdc_emi()
2985 if((ivideo->SiS_Pr.PDC != -1) && in sisfb_save_pdc_emi()
2986 (ivideo->SiS_Pr.PDC != ivideo->detectedpdc)) { in sisfb_save_pdc_emi()
2988 ivideo->SiS_Pr.PDC); in sisfb_save_pdc_emi()
3029 if(ivideo->SiS_Pr.PDC == -1) { in sisfb_save_pdc_emi()
3031 ivideo->SiS_Pr.PDC = ivideo->detectedpdc; in sisfb_save_pdc_emi()
3066 if((ivideo->SiS_Pr.PDC != -1) && in sisfb_save_pdc_emi()
3069 ivideo->SiS_Pr.PDC); in sisfb_save_pdc_emi()
5944 ivideo->SiS_Pr.PDC = -1; in sisfb_probe()
[all …]
H A Dinit301.c6510 if(SiS_Pr->PDC != -1) temp = SiS_Pr->PDC; in SiS_SetGroup1()
6524 if(SiS_Pr->PDC != -1) temp = SiS_Pr->PDC; in SiS_SetGroup1()
9991 if(SiS_Pr->PDC != -1) { in SetDelayComp()
9992 SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x2d,0xf0,((SiS_Pr->PDC >> 1) & 0x0f)); in SetDelayComp()
9993 SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x35,0x7f,((SiS_Pr->PDC & 0x01) << 7)); in SetDelayComp()
10593 if((SiS_Pr->SiS_VBInfo & SetCRT2ToLCD) && (SiS_Pr->PDC != -1)) { in SetDelayComp661()
10594 delay = SiS_Pr->PDC & 0x1f; in SetDelayComp661()
11080 if(SiS_Pr->PDC != -1) return; in SetOEMLCDDelay()
/linux-6.15/drivers/ata/
H A Dsata_qstor.c149 { PCI_VDEVICE(PDC, 0x2068), board_2068_idx },
H A Dpdc_adma.c160 { PCI_VDEVICE(PDC, 0x1841), board_1841_idx },
/linux-6.15/Documentation/userspace-api/media/v4l/
H A Dbiblio.rst34 :title: ETS 300 231 "Specification of the domestic video Programme Delivery Control system (PDC…
/linux-6.15/arch/parisc/kernel/
H A Dperf_asm.S87 ;* for RDR10 which has bits that preclude PDC stack operations
/linux-6.15/drivers/mailbox/
H A DKconfig238 SoCs, including FA2/FA+ on Northstar Plus and PDC on Northstar 2.

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