reset: imx: Add SCU reset driver for i.MX8QXP and i.MX8QM

Add System Controller Firmware(SCU) reset driver for i.MX8QM and i.MX8QXP.
SCU Manage resets for peripherals such as MIPI CSI. Currently, su

reset: imx: Add SCU reset driver for i.MX8QXP and i.MX8QM

Add System Controller Firmware(SCU) reset driver for i.MX8QM and i.MX8QXP.
SCU Manage resets for peripherals such as MIPI CSI. Currently, support two
reset sources: IMX_SC_R_CSI_0 and IMX_SC_R_CSI_1.

Signed-off-by: Frank Li <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Philipp Zabel <[email protected]>

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reset: mchp: sparx5: Allow building as a module

This reset controller can be used by the LAN966x PCI device.

The LAN966x PCI device driver can be built as a module and this reset
controller driver

reset: mchp: sparx5: Allow building as a module

This reset controller can be used by the LAN966x PCI device.

The LAN966x PCI device driver can be built as a module and this reset
controller driver has no reason to be a builtin driver in that case.

Signed-off-by: Clément Léger <[email protected]>
Signed-off-by: Herve Codina <[email protected]>
Reviewed-by: Steen Hegelund <[email protected]>
Reviewed-by: Philipp Zabel <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Philipp Zabel <[email protected]>

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reset: mchp: sparx5: Add MCHP_LAN966X_PCI dependency

The sparx5 reset controller depends on the SPARX5 architecture or the
LAN966x SoC.

This reset controller can be used by the LAN966x PCI device a

reset: mchp: sparx5: Add MCHP_LAN966X_PCI dependency

The sparx5 reset controller depends on the SPARX5 architecture or the
LAN966x SoC.

This reset controller can be used by the LAN966x PCI device and so it
needs to be available when the LAN966x PCI device is enabled.

Signed-off-by: Herve Codina <[email protected]>
Reviewed-by: Steen Hegelund <[email protected]>
Reviewed-by: Philipp Zabel <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Philipp Zabel <[email protected]>

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reset: npcm: register npcm8xx clock auxiliary bus device

Add NPCM8xx clock controller auxiliary bus device registration.

The NPCM8xx clock controller is registered as an aux device because the
rese

reset: npcm: register npcm8xx clock auxiliary bus device

Add NPCM8xx clock controller auxiliary bus device registration.

The NPCM8xx clock controller is registered as an aux device because the
reset and the clock controller share the same register region.

Signed-off-by: Tomer Maimon <[email protected]>
Tested-by: Benjamin Fair <[email protected]>
Reviewed-by: Philipp Zabel <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Stephen Boyd <[email protected]>

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reset: amlogic: move drivers to a dedicated directory

The meson reset driver will be split in two part, one implemeting the ops,
the other providing the platform driver support. This will be done to

reset: amlogic: move drivers to a dedicated directory

The meson reset driver will be split in two part, one implemeting the ops,
the other providing the platform driver support. This will be done to
facilitate the addition of the auxiliary bus support.

To avoid making a mess in drivers/reset/ while doing so, move the amlogic
reset drivers to a dedicated directory.

Reviewed-by: Neil Armstrong <[email protected]>
Signed-off-by: Jerome Brunet <[email protected]>
Reviewed-by: Philipp Zabel <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Philipp Zabel <[email protected]>

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reset: amlogic: convert driver to regmap

To allow using the same driver for the main reset controller and the
auxiliary ones embedded in the clock controllers, convert the
the Amlogic reset driver t

reset: amlogic: convert driver to regmap

To allow using the same driver for the main reset controller and the
auxiliary ones embedded in the clock controllers, convert the
the Amlogic reset driver to regmap.

Reviewed-by: Neil Armstrong <[email protected]>
Signed-off-by: Jerome Brunet <[email protected]>
Reviewed-by: Philipp Zabel <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Philipp Zabel <[email protected]>

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reset: eyeq: add platform driver

Add Mobileye EyeQ reset controller driver, for EyeQ5, EyeQ6L and EyeQ6H
SoCs. Instances belong to a shared register region called OLB and gets
spawned as auxiliary d

reset: eyeq: add platform driver

Add Mobileye EyeQ reset controller driver, for EyeQ5, EyeQ6L and EyeQ6H
SoCs. Instances belong to a shared register region called OLB and gets
spawned as auxiliary device to the platform driver for clock.

There is one OLB instance for EyeQ5 and EyeQ6L. There are seven OLB
instances on EyeQ6H; three have a reset controller embedded:
- West and east get handled by the same compatible.
- Acc (accelerator) is another one.

Each instance vary in the number and types of reset domains.
Instances with single domain expect a single cell, others two.

Signed-off-by: Théo Lebrun <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Philipp Zabel <[email protected]>

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reset: RESET_IMX8MP_AUDIOMIX should depend on ARCH_MXC

The i.MX8MP AudioMix reset controller is only present on Freescale i.MX8
SoCs. Hence add a dependency on ARCH_MXC, to prevent asking the user

reset: RESET_IMX8MP_AUDIOMIX should depend on ARCH_MXC

The i.MX8MP AudioMix reset controller is only present on Freescale i.MX8
SoCs. Hence add a dependency on ARCH_MXC, to prevent asking the user
about this driver when configuring a kernel without i.MX SoC support.

Fixes: fe125601d17cc1ea ("reset: imx8mp-audiomix: Add AudioMix Block Control reset driver")
Signed-off-by: Geert Uytterhoeven <[email protected]>
Reviewed-by: Philipp Zabel <[email protected]>
Link: https://lore.kernel.org/r/6d8116a56186fbf468229e823c7c8dfcd9488959.1719316665.git.geert+renesas@glider.be
Signed-off-by: Philipp Zabel <[email protected]>

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reset: zynqmp: allow building under COMPILE_TEST

The ZynqMP reset driver can be compiled without ARCH_ZYNQMP being
enabled. Allow it to be built under COMPILE_TEST.

Acked-by: Michal Simek <michal.s

reset: zynqmp: allow building under COMPILE_TEST

The ZynqMP reset driver can be compiled without ARCH_ZYNQMP being
enabled. Allow it to be built under COMPILE_TEST.

Acked-by: Michal Simek <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Philipp Zabel <[email protected]>

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reset: imx8mp-audiomix: Add AudioMix Block Control reset driver

Add support for the resets on i.MX8MP Audio Block Control module,
which includes the EARC PHY software reset and EARC controller
softw

reset: imx8mp-audiomix: Add AudioMix Block Control reset driver

Add support for the resets on i.MX8MP Audio Block Control module,
which includes the EARC PHY software reset and EARC controller
software reset. The reset controller is created using the auxiliary
device framework and set up in the clock driver.

Signed-off-by: Shengjiu Wang <[email protected]>
Reviewed-by: Marco Felsch <[email protected]>
Reviewed-by: Abel Vesa <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Philipp Zabel <[email protected]>

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reset: gpio: Fix missing gpiolib dependency for GPIO reset controller

The GPIO reset controller uses gpiolib but there is no Kconfig
dependency reflecting this fact, add one.

With the addition of t

reset: gpio: Fix missing gpiolib dependency for GPIO reset controller

The GPIO reset controller uses gpiolib but there is no Kconfig
dependency reflecting this fact, add one.

With the addition of the controller to the arm64 defconfig this is
causing build breaks for arm64 virtconfig in -next:

aarch64-linux-gnu-ld: drivers/reset/core.o: in function `__reset_add_reset_gpio_lookup':
/build/stage/linux/drivers/reset/core.c:861:(.text+0xccc): undefined reference to `gpio_device_find_by_fwnode'

Fixes: cee544a40e44 ("reset: gpio: Add GPIO-based reset controller")
Reviewed-by: Krzysztof Kozlowski <[email protected]>
Signed-off-by: Mark Brown <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Philipp Zabel <[email protected]>

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reset: k210: Deprecate SOC_CANAAN and use SOC_CANAAN_K210

Since SOC_FOO should be deprecated from patch [1], and cleanup for other
SoCs is already in the mailing list [2,3,4,5], we remove the use of

reset: k210: Deprecate SOC_CANAAN and use SOC_CANAAN_K210

Since SOC_FOO should be deprecated from patch [1], and cleanup for other
SoCs is already in the mailing list [2,3,4,5], we remove the use of
SOC_CANAAN and introduced SOC_CANAAN_K210 for K210-specific drivers,

Thus, we replace its drivers depends on SOC_CANAAN_K210 and default select
when it has the symbol SOC_CANAAN_K210.

[1] https://lore.kernel.org/linux-riscv/[email protected]/
[2] https://lore.kernel.org/linux-riscv/20240305-praying-clad-c4fbcaa7ed0a@spud/
[3] https://lore.kernel.org/linux-riscv/20240305-fled-undrilled-41dc0c46bb29@spud/
[4] https://lore.kernel.org/linux-riscv/20240305-stress-earflap-d7ddb8655a4d@spud/
[5] https://lore.kernel.org/linux-riscv/20240305-praying-clad-c4fbcaa7ed0a@spud/

Signed-off-by: Yangyu Chen <[email protected]>
Acked-by: Philipp Zabel <[email protected]>
Signed-off-by: Conor Dooley <[email protected]>

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reset: gpio: Add GPIO-based reset controller

Add a simple driver to control GPIO-based resets using the reset
controller API for the cases when the GPIOs are shared and reset should
be coordinated.

reset: gpio: Add GPIO-based reset controller

Add a simple driver to control GPIO-based resets using the reset
controller API for the cases when the GPIOs are shared and reset should
be coordinated. The driver is expected to be used by reset core
framework for ad-hoc reset controllers.

Cc: Bartosz Golaszewski <[email protected]>
Cc: Chris Packham <[email protected]>
Cc: Sean Anderson <[email protected]>
Reviewed-by: Bartosz Golaszewski <[email protected]>
Reviewed-by: Philipp Zabel <[email protected]>
Signed-off-by: Krzysztof Kozlowski <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Philipp Zabel <[email protected]>

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reset: simple: add support for Sophgo SG2042

Reuse reset-simple driver for the Sophgo SG2042 reset generator.

Signed-off-by: Chen Wang <[email protected]>
Reviewed-by: Philipp Zabel <p.zabel

reset: simple: add support for Sophgo SG2042

Reuse reset-simple driver for the Sophgo SG2042 reset generator.

Signed-off-by: Chen Wang <[email protected]>
Reviewed-by: Philipp Zabel <[email protected]>
Link: https://lore.kernel.org/r/1cfd7b3ba447942784c4f7aa595e962399e9f617.1706577450.git.unicorn_wang@outlook.com
Signed-off-by: Philipp Zabel <[email protected]>

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reset: RESET_NUVOTON_MA35D1 should depend on ARCH_MA35

The Nuvoton MA35D1 reset controller is only present on Nuvoton MA35
SoCs. Hence add a dependency on ARCH_MA35, to prevent asking the user
abou

reset: RESET_NUVOTON_MA35D1 should depend on ARCH_MA35

The Nuvoton MA35D1 reset controller is only present on Nuvoton MA35
SoCs. Hence add a dependency on ARCH_MA35, to prevent asking the user
about this driver when configuring a kernel without MA35 SoC support.
Also, do not enable the driver by default when merely compile-testing.

While at it, fix a misspelling of "Nuvoton".

Fixes: e4bb55d6ccf0f774 ("reset: Add Nuvoton ma35d1 reset driver support")
Signed-off-by: Geert Uytterhoeven <[email protected]>
Reviewed-by: Ilpo Järvinen <[email protected]>
Signed-off-by: Arnd Bergmann <[email protected]>

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reset: Add Nuvoton ma35d1 reset driver support

This driver supports individual IP reset for the MA35D1. The reset
control registers are a subset of the system control registers.

Signed-off-by: Jack

reset: Add Nuvoton ma35d1 reset driver support

This driver supports individual IP reset for the MA35D1. The reset
control registers are a subset of the system control registers.

Signed-off-by: Jacky Huang <[email protected]>
Reviewed-by: Philipp Zabel <[email protected]>
Reviewed-by: Ilpo Järvinen <[email protected]>
Signed-off-by: Arnd Bergmann <[email protected]>

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reset: mpfs: select AUXILIARY_BUS

CONFIG_AUXILIARY_BUS is not a user-visible symbol, replace 'depends on'
with 'select'.

Cc: Daire McNamara <[email protected]>
Suggested-by: Arnd Bergman

reset: mpfs: select AUXILIARY_BUS

CONFIG_AUXILIARY_BUS is not a user-visible symbol, replace 'depends on'
with 'select'.

Cc: Daire McNamara <[email protected]>
Suggested-by: Arnd Bergmann <[email protected]>
Reviewed-by: Conor Dooley <[email protected]>
Reviewed-by: Arnd Bergmann <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Philipp Zabel <[email protected]>

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reset: oxnas: remove obsolete reset driver

Due to lack of maintainance and stall of development for a few years now,
and since no new features will ever be added upstream, remove support
for OX810 a

reset: oxnas: remove obsolete reset driver

Due to lack of maintainance and stall of development for a few years now,
and since no new features will ever be added upstream, remove support
for OX810 and OX820 peripheral reset.

Signed-off-by: Neil Armstrong <[email protected]>
Acked-by: Daniel Golle <[email protected]>
Acked-by: Arnd Bergmann <[email protected]>
Acked-by: Linus Walleij <[email protected]>
Link: https://lore.kernel.org/r/20230331-topic-oxnas-upstream-remove-v1-17-5bd58fd1dd1f@linaro.org
Signed-off-by: Philipp Zabel <[email protected]>

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reset: Create subdirectory for StarFive drivers

This moves the StarFive JH7100 reset driver to a new subdirectory in
preparation for adding more StarFive reset drivers.

Reviewed-by: Philipp Zabel <

reset: Create subdirectory for StarFive drivers

This moves the StarFive JH7100 reset driver to a new subdirectory in
preparation for adding more StarFive reset drivers.

Reviewed-by: Philipp Zabel <[email protected]>
Tested-by: Tommaso Merciai <[email protected]>
Reviewed-by: Conor Dooley <[email protected]>
Reviewed-by: Emil Renner Berthing <[email protected]>
Signed-off-by: Emil Renner Berthing <[email protected]>
Signed-off-by: Hal Feng <[email protected]>
Signed-off-by: Conor Dooley <[email protected]>

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reset: starfive: Replace SOC_STARFIVE with ARCH_STARFIVE

Using ARCH_FOO symbol is preferred than SOC_FOO.

Reviewed-by: Philipp Zabel <[email protected]>
Reviewed-by: Conor Dooley <conor.dooley

reset: starfive: Replace SOC_STARFIVE with ARCH_STARFIVE

Using ARCH_FOO symbol is preferred than SOC_FOO.

Reviewed-by: Philipp Zabel <[email protected]>
Reviewed-by: Conor Dooley <[email protected]>
Reviewed-by: Emil Renner Berthing <[email protected]>
Signed-off-by: Hal Feng <[email protected]>
Signed-off-by: Conor Dooley <[email protected]>

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reset: ti-sci: honor TI_SCI_PROTOCOL setting when not COMPILE_TEST

There is a build error when COMPILE_TEST=y, TI_SCI_PROTOCOL=m,
and RESET_TI_SCI=y:

drivers/reset/reset-ti-sci.o: in function `ti_s

reset: ti-sci: honor TI_SCI_PROTOCOL setting when not COMPILE_TEST

There is a build error when COMPILE_TEST=y, TI_SCI_PROTOCOL=m,
and RESET_TI_SCI=y:

drivers/reset/reset-ti-sci.o: in function `ti_sci_reset_probe':
reset-ti-sci.c:(.text+0x22c): undefined reference to `devm_ti_sci_get_handle'

Fix this by making RESET_TI_SCI honor the Kconfig setting of
TI_SCI_PROTOCOL when COMPILE_TEST is not set. When COMPILE_TEST is set,
TI_SCI_PROTOCOL must be disabled (=n).

Fixes: a6af504184c9 ("reset: ti-sci: Allow building under COMPILE_TEST")
Signed-off-by: Randy Dunlap <[email protected]>
Reported-by: kernel test robot <[email protected]>
Cc: Nishanth Menon <[email protected]>
Cc: Tero Kristo <[email protected]>
Cc: Santosh Shilimkar <[email protected]>
Cc: [email protected]
Cc: Philipp Zabel <[email protected]>
Reviewed-by: Nishanth Menon <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Philipp Zabel <[email protected]>

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reset: add polarfire soc reset support

Add support for the resets on Microchip's PolarFire SoC (MPFS).
Reset control is a single register, wedged in between registers for
clock control. To fit with

reset: add polarfire soc reset support

Add support for the resets on Microchip's PolarFire SoC (MPFS).
Reset control is a single register, wedged in between registers for
clock control. To fit with existed DT etc, the reset controller is
created using the aux device framework & set up in the clock driver.

Reviewed-by: Philipp Zabel <[email protected]>
Acked-by: Philipp Zabel <[email protected]>
Reviewed-by: Daire McNamara <[email protected]>
Signed-off-by: Conor Dooley <[email protected]>
Reviewed-by: Claudiu Beznea <[email protected]>
Signed-off-by: Claudiu Beznea <[email protected]>
Link: https://lore.kernel.org/r/[email protected]

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arm64: bcmbca: Make BCM4908 drivers depend on ARCH_BCMBCA

With Broadcom Broadband arch ARCH_BCMBCA supported in the kernel, this
patch series migrate the ARCH_BCM4908 symbol to ARCH_BCMBCA. Hence
re

arm64: bcmbca: Make BCM4908 drivers depend on ARCH_BCMBCA

With Broadcom Broadband arch ARCH_BCMBCA supported in the kernel, this
patch series migrate the ARCH_BCM4908 symbol to ARCH_BCMBCA. Hence
replace ARCH_BCM4908 with ARCH_BCMBCA in subsystem Kconfig files.

Signed-off-by: William Zhang <[email protected]>
Acked-by: Guenter Roeck <[email protected]> (for watchdog)
Acked-by: Bjorn Helgaas <[email protected]> (for drivers/pci)
Acked-by: Wolfram Sang <[email protected]> (for i2c)
Acked-by: Philipp Zabel <[email protected]> (for reset)
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Florian Fainelli <[email protected]>

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reset: tps380x: Add TPS380x device driver supprt

The TI TPS380x family [1] is a voltage supervisor with a dedicated
manual reset (mr) line input and a reset output. The chip(s) have a
build in reset

reset: tps380x: Add TPS380x device driver supprt

The TI TPS380x family [1] is a voltage supervisor with a dedicated
manual reset (mr) line input and a reset output. The chip(s) have a
build in reset delay, depending on the chip partnumber. This simple
driver addresses this so the cosumer don't need to care about it.

[1] https://www.ti.com/product/TPS3801

Signed-off-by: Marco Felsch <[email protected]>
[[email protected]: drop Todo comment about min/typ/max reset time]
Signed-off-by: Philipp Zabel <[email protected]>
Link: https://lore.kernel.org/r/[email protected]

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reset: reset-simple should depends on HAS_IOMEM

The reset-simple driver does not build on all architecuters as it requires
devm_ioremap_resource() which is only built when CONFIG_HAS_IOMEM is enable

reset: reset-simple should depends on HAS_IOMEM

The reset-simple driver does not build on all architecuters as it requires
devm_ioremap_resource() which is only built when CONFIG_HAS_IOMEM is enabled
in the kenrel. Fix the following error by depending on CONFIG_HAS_IOMEM:

drivers/reset/reset-simple.o: in function `reset_simple_probe':
reset-simple.c:(.text+0x3aa): undefined reference to `devm_ioremap_resource'

Fixes: 18d1909be345 ("reset: allow building of reset simple driver if expert config selected")
Reported-by: kernel test robot <[email protected]>
Signed-off-by: Ben Dooks <[email protected]>
Signed-off-by: Philipp Zabel <[email protected]>
Link: https://lore.kernel.org/r/[email protected]

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