| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIISelLowering.h | 100 SDValue widenLoad(LoadSDNode *Ld, DAGCombinerInfo &DCI) const; 174 DAGCombinerInfo &DCI) const; 180 DAGCombinerInfo &DCI) const; 188 SDValue performAndCombine(SDNode *N, DAGCombinerInfo &DCI) const; 189 SDValue performOrCombine(SDNode *N, DAGCombinerInfo &DCI) const; 190 SDValue performXorCombine(SDNode *N, DAGCombinerInfo &DCI) const; 213 SDValue tryFoldToMad64_32(SDNode *N, DAGCombinerInfo &DCI) const; 214 SDValue performAddCombine(SDNode *N, DAGCombinerInfo &DCI) const; 216 SDValue performSubCombine(SDNode *N, DAGCombinerInfo &DCI) const; 220 SDValue performFMACombine(SDNode *N, DAGCombinerInfo &DCI) const; [all …]
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| H A D | AMDGPUISelLowering.h | 104 SDValue performLoadCombine(SDNode *N, DAGCombinerInfo &DCI) const; 105 SDValue performStoreCombine(SDNode *N, DAGCombinerInfo &DCI) const; 112 SDValue performShlCombine(SDNode *N, DAGCombinerInfo &DCI) const; 113 SDValue performSraCombine(SDNode *N, DAGCombinerInfo &DCI) const; 114 SDValue performSrlCombine(SDNode *N, DAGCombinerInfo &DCI) const; 116 SDValue performMulCombine(SDNode *N, DAGCombinerInfo &DCI) const; 118 SDValue performMulhsCombine(SDNode *N, DAGCombinerInfo &DCI) const; 123 SDValue foldFreeOpFromSelect(TargetLowering::DAGCombinerInfo &DCI, 132 SDValue performFNegCombine(SDNode *N, DAGCombinerInfo &DCI) const; 133 SDValue performFAbsCombine(SDNode *N, DAGCombinerInfo &DCI) const; [all …]
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| H A D | AMDGPUISelLowering.cpp | 1557 SelectionDAG &DAG = DCI.DAG; in combineFMinMaxLegacyImpl() 1631 SelectionDAG &DAG = DCI.DAG; in combineFMinMaxLegacy() 3653 SelectionDAG &DAG = DCI.DAG; in simplifyMul24() 3748 if (!DCI.isBeforeLegalize()) in performLoadCombine() 3756 SelectionDAG &DAG = DCI.DAG; in performLoadCombine() 3801 if (!DCI.isBeforeLegalize()) in performStoreCombine() 3812 SelectionDAG &DAG = DCI.DAG; in performStoreCombine() 3858 SelectionDAG &DAG = DCI.DAG; in performAssertSZExtCombine() 3919 SelectionDAG &DAG = DCI.DAG; in splitBinaryBitConstantOpImpl() 4335 DCI.CombineTo(N, Lo, Hi); in performMulLoHiCombine() [all …]
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| H A D | SIISelLowering.cpp | 9986 SelectionDAG &DAG = DCI.DAG; in widenLoad() 11026 SelectionDAG &DAG = DCI.DAG; in performUCharToFloatCombine() 11057 SelectionDAG &DAG = DCI.DAG; in performFCopySignCombine() 11134 SelectionDAG &DAG = DCI.DAG; in performSHLPtrCombine() 11181 SelectionDAG &DAG = DCI.DAG; in performMemSDNodeCombine() 11214 DAGCombinerInfo &DCI, in splitBinaryBitConstantOp() argument 11317 if (DCI.isBeforeLegalize()) in performAndCombine() 11320 SelectionDAG &DAG = DCI.DAG; in performAndCombine() 11916 SelectionDAG &DAG = DCI.DAG; in matchPERM() 12006 SelectionDAG &DAG = DCI.DAG; in performOrCombine() [all …]
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
| H A D | SystemZISelLowering.h | 722 unsigned Index, DAGCombinerInfo &DCI, 725 DAGCombinerInfo &DCI) const; 729 SDValue combineMERGE(SDNode *N, DAGCombinerInfo &DCI) const; 731 SDValue combineLOAD(SDNode *N, DAGCombinerInfo &DCI) const; 732 SDValue combineSTORE(SDNode *N, DAGCombinerInfo &DCI) const; 736 SDValue combineFP_ROUND(SDNode *N, DAGCombinerInfo &DCI) const; 737 SDValue combineFP_EXTEND(SDNode *N, DAGCombinerInfo &DCI) const; 738 SDValue combineINT_TO_FP(SDNode *N, DAGCombinerInfo &DCI) const; 739 SDValue combineBSWAP(SDNode *N, DAGCombinerInfo &DCI) const; 740 SDValue combineBR_CCMASK(SDNode *N, DAGCombinerInfo &DCI) const; [all …]
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| H A D | SystemZISelLowering.cpp | 6467 SelectionDAG &DAG = DCI.DAG; in combineExtract() 6606 SelectionDAG &DAG = DCI.DAG; in combineZERO_EXTEND() 6656 SelectionDAG &DAG = DCI.DAG; in combineSIGN_EXTEND_INREG() 6677 SelectionDAG &DAG = DCI.DAG; in combineSIGN_EXTEND() 6704 SelectionDAG &DAG = DCI.DAG; in combineMERGE() 6738 SelectionDAG &DAG = DCI.DAG; in combineLOAD() 6910 SelectionDAG &DAG = DCI.DAG; in combineSTORE() 7068 SelectionDAG &DAG = DCI.DAG; in combineVECTOR_SHUFFLE() 7107 SelectionDAG &DAG = DCI.DAG; in combineEXTRACT_VECTOR_ELT() 7148 SelectionDAG &DAG = DCI.DAG; in combineJOIN_DWORDS() [all …]
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| /freebsd-14.2/contrib/llvm-project/clang/lib/AST/ |
| H A D | ASTImporterLookupTable.cpp | 164 auto DCI = LookupTable.find(DC->getPrimaryContext()); in lookup() local 165 if (DCI == LookupTable.end()) in lookup() 168 const auto &FoundNameMap = DCI->second; in lookup() 181 auto DCI = LookupTable.find(DC->getPrimaryContext()); in dump() local 182 if (DCI == LookupTable.end()) in dump() 184 const auto &FoundNameMap = DCI->second; in dump()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.h | 883 SDValue expandVSXLoadForLE(SDNode *N, DAGCombinerInfo &DCI) const; 1416 SDValue combineFPToIntToFP(SDNode *N, DAGCombinerInfo &DCI) const; 1417 SDValue combineSHL(SDNode *N, DAGCombinerInfo &DCI) const; 1418 SDValue combineSRA(SDNode *N, DAGCombinerInfo &DCI) const; 1419 SDValue combineSRL(SDNode *N, DAGCombinerInfo &DCI) const; 1420 SDValue combineMUL(SDNode *N, DAGCombinerInfo &DCI) const; 1421 SDValue combineADD(SDNode *N, DAGCombinerInfo &DCI) const; 1422 SDValue combineFMALike(SDNode *N, DAGCombinerInfo &DCI) const; 1423 SDValue combineTRUNCATE(SDNode *N, DAGCombinerInfo &DCI) const; 1424 SDValue combineSetCC(SDNode *N, DAGCombinerInfo &DCI) const; [all …]
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| H A D | PPCISelLowering.cpp | 13821 SelectionDAG &DAG = DCI.DAG; in ConvertSETCCToSubtract() 13859 SelectionDAG &DAG = DCI.DAG; in DAGCombineTruncBoolExt() 14135 SelectionDAG &DAG = DCI.DAG; in DAGCombineExtBoolTrunc() 14461 SelectionDAG &DAG = DCI.DAG; in combineElementTruncationToVectorTruncation() 14818 SelectionDAG &DAG = DCI.DAG; in DAGCombineBuildVector() 14913 SelectionDAG &DAG = DCI.DAG; in combineFPToIntToFP() 15020 SelectionDAG &DAG = DCI.DAG; in expandVSXLoadForLE() 15086 SelectionDAG &DAG = DCI.DAG; in expandVSXStoreForLE() 15144 SelectionDAG &DAG = DCI.DAG; in combineStoreFPToInt() 15500 SelectionDAG &DAG = DCI.DAG; in combineVReverseMemOP() [all …]
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 12577 SelectionDAG &DAG = DCI.DAG; in combineSelectAndUse() 12638 SelectionDAG &DAG = DCI.DAG; in AddCombineToVPADD() 12678 SelectionDAG &DAG = DCI.DAG; in AddCombineVUZPToVPADDL() 13133 SelectionDAG &DAG(DCI.DAG); in PerformAddcSubcCombine() 13913 if (DCI.isBeforeLegalize()) in PerformSHLSimplify() 14221 if (DCI.isBeforeLegalize() || DCI.isCalledByLegalizer()) in PerformMULCombine() 14299 if (DCI.isBeforeLegalize() || DCI.isCalledByLegalizer()) in CombineANDShift() 16234 if (DCI.isBeforeLegalize() || DCI.isCalledByLegalizer()) in PerformVLDCombine() 16242 if (DCI.isBeforeLegalize() || DCI.isCalledByLegalizer()) in PerformMVEVLDCombine() 16461 if (CombineVLDDUP(N, DCI)) in PerformVDUPLANECombine() [all …]
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| H A D | ARMISelLowering.h | 436 SDValue PerformIntrinsicCombine(SDNode *N, DAGCombinerInfo &DCI) const; 437 SDValue PerformMVEExtCombine(SDNode *N, DAGCombinerInfo &DCI) const; 438 SDValue PerformMVETruncCombine(SDNode *N, DAGCombinerInfo &DCI) const; 439 SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const override;
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| /freebsd-14.2/contrib/llvm-project/clang/lib/StaticAnalyzer/Core/ |
| H A D | DynamicType.cpp | 218 static raw_ostream &printJson(const DynamicCastInfo &DCI, raw_ostream &Out, in printJson() argument 220 return Out << "\"from\": \"" << DCI.from() << "\", \"to\": \"" << DCI.to() in printJson() 221 << "\", \"kind\": \"" << (DCI.succeeds() ? "success" : "fail") in printJson()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/NVPTX/ |
| H A D | NVPTXISelLowering.cpp | 5096 SelectionDAG &DAG = DCI.DAG; in PerformADDCombineWithOperands() 5259 DCI.CombineTo(N, Val, false); in PerformANDCombine() 5313 DCI.CombineTo(N, Val, AddTo); in PerformANDCombine() 5328 SelectionDAG &DAG = DCI.DAG; in PerformREMCombine() 5533 SDValue CCNode = DCI.DAG.getNode( in PerformSETCCCombine() 5570 SDValue Result = DCI.DAG.getNode( in PerformEXTRACTCombine() 5572 DCI.DAG.getNode( in PerformEXTRACTCombine() 5620 SelectionDAG &DAG = DCI.DAG; in PerformLOADCombine() 5651 return DCI.DAG.getMergeValues( in PerformLOADCombine() 5652 {DCI.DAG.getBitcast(VT, DCI.DAG.getBuildVector(NewVT, DL, Elts)), in PerformLOADCombine() [all …]
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/VE/ |
| H A D | VEISelLowering.h | 296 SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const override; 298 SDValue combineSelect(SDNode *N, DAGCombinerInfo &DCI) const; 299 SDValue combineSelectCC(SDNode *N, DAGCombinerInfo &DCI) const; 300 SDValue combineTRUNCATE(SDNode *N, DAGCombinerInfo &DCI) const;
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyISelLowering.cpp | 2461 auto &DAG = DCI.DAG; in performVECTOR_SHUFFLECombine() 2490 auto &DAG = DCI.DAG; in performVectorExtendToFPCombine() 2512 auto &DAG = DCI.DAG; in performVectorExtendCombine() 2559 auto &DAG = DCI.DAG; in performVectorTruncZeroCombine() 2761 auto &DAG = DCI.DAG; in performTruncateCombine() 2788 auto &DAG = DCI.DAG; in performBitcastCombine() 2815 auto &DAG = DCI.DAG; in performSETCCCombine() 2869 return performBitcastCombine(N, DCI); in PerformDAGCombine() 2871 return performSETCCCombine(N, DCI); in PerformDAGCombine() 2876 return performVectorExtendCombine(N, DCI); in PerformDAGCombine() [all …]
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 17470 SelectionDAG &DAG = DCI.DAG; in tryCombineToBSL() 17641 SelectionDAG &DAG = DCI.DAG; in performORCombine() 17699 SelectionDAG &DAG = DCI.DAG; in performSVEAndCombine() 17815 SelectionDAG &DAG = DCI.DAG; in performANDSETCCCombine() 17848 SelectionDAG &DAG = DCI.DAG; in performANDCombine() 17911 SelectionDAG &DAG = DCI.DAG; in performFADDCombine() 19777 if (DCI.isBeforeLegalize()) in tryConvertSVEWideCompare() 21754 if (DCI.isBeforeLegalize() || DCI.isCalledByLegalizer()) in performNEONPostLDSTCombine() 22529 return DCI.DAG.getMergeValues({Res, DCI.DAG.getConstant(0, DL, MVT::i32)}, in performFlagSettingCombine() 23407 DCI.CombineTo(N, ExtLoad); in performSignExtendInRegCombine() [all …]
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Lanai/ |
| H A D | LanaiISelLowering.cpp | 1420 TargetLowering::DAGCombinerInfo &DCI, in combineSelectAndUse() argument 1422 SelectionDAG &DAG = DCI.DAG; in combineSelectAndUse() 1444 combineSelectAndUseCommutative(SDNode *N, TargetLowering::DAGCombinerInfo &DCI, in combineSelectAndUseCommutative() argument 1449 if (SDValue Result = combineSelectAndUse(N, N0, N1, DCI, AllOnes)) in combineSelectAndUseCommutative() 1452 if (SDValue Result = combineSelectAndUse(N, N1, N0, DCI, AllOnes)) in combineSelectAndUseCommutative() 1459 TargetLowering::DAGCombinerInfo &DCI) { in PerformSUBCombine() argument 1465 if (SDValue Result = combineSelectAndUse(N, N1, N0, DCI, /*AllOnes=*/false)) in PerformSUBCombine() 1472 DAGCombinerInfo &DCI) const { in PerformDAGCombine() 1479 return combineSelectAndUseCommutative(N, DCI, /*AllOnes=*/false); in PerformDAGCombine() 1481 return combineSelectAndUseCommutative(N, DCI, /*AllOnes=*/true); in PerformDAGCombine() [all …]
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Sparc/ |
| H A D | SparcISelLowering.h | 193 SDValue PerformBITCASTCombine(SDNode *N, DAGCombinerInfo &DCI) const; 198 SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const override;
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | TargetLowering.cpp | 616 SelectionDAG &DAG = DCI.DAG; in SimplifyDemandedBits() 632 SelectionDAG &DAG = DCI.DAG; in SimplifyDemandedBits() 2940 SelectionDAG &DAG = DCI.DAG; in SimplifyDemandedVectorElts() 3918 SelectionDAG &DAG = DCI.DAG; in foldSetCCWithAnd() 4085 SelectionDAG &DAG = DCI.DAG; in optimizeSetCCOfSignedTruncationCheck() 4115 SelectionDAG &DAG = DCI.DAG; in optimizeSetCCByHoistingAndByConstFromLogicalShift() 4187 SelectionDAG &DAG = DCI.DAG; in foldSetCCWithBinOp() 4405 SelectionDAG &DAG = DCI.DAG; in SimplifySetCC() 6551 DCI.AddToWorklist(N); in buildUREMEqFold() 6571 SelectionDAG &DAG = DCI.DAG; in prepareUREMEqFold() [all …]
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonISelLowering.h | 256 SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const override; 586 SDValue combineTruncateBeforeLegal(SDValue Op, DAGCombinerInfo &DCI) const; 587 SDValue combineConcatVectorsBeforeLegal(SDValue Op, DAGCombinerInfo & DCI) 589 SDValue combineVectorShuffleBeforeLegal(SDValue Op, DAGCombinerInfo & DCI) 592 SDValue PerformHvxDAGCombine(SDNode * N, DAGCombinerInfo & DCI) const;
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/ARC/ |
| H A D | ARCISelLowering.h | 96 SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const override;
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsISelLowering.cpp | 563 if (DCI.isBeforeLegalizeOps()) in performDivRemCombine() 672 if (DCI.isBeforeLegalizeOps()) in performSELECTCombine() 753 if (DCI.isBeforeLegalizeOps()) in performCMovFPCombine() 1058 if (DCI.isBeforeLegalizeOps()) { in performSUBCombine() 1073 if (DCI.isBeforeLegalizeOps()) { in performADDCombine() 1155 SelectionDAG &DAG = DCI.DAG; in PerformDAGCombine() 1169 return performANDCombine(N, DAG, DCI, Subtarget); in PerformDAGCombine() 1171 return performORCombine(N, DAG, DCI, Subtarget); in PerformDAGCombine() 1173 return performADDCombine(N, DAG, DCI, Subtarget); in PerformDAGCombine() 1175 return performSHLCombine(N, DAG, DCI, Subtarget); in PerformDAGCombine() [all …]
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| /freebsd-14.2/contrib/llvm-project/clang/include/clang/Interpreter/ |
| H A D | Interpreter.h | 100 std::unique_ptr<CompilerInstance> DCI);
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 44715 DCI.AddToWorklist(U); in combineVSelectToBLENDV() 46246 if (!DCI.isBeforeLegalize() && !DCI.isBeforeLegalizeOps()) { in combineCMov() 46771 if (DCI.isBeforeLegalize() || DCI.isCalledByLegalizer()) in combineMul() 48751 DCI.AddToWorklist(N); in combineAnd() 49491 DCI.AddToWorklist(N); in combineOr() 50281 DCI.AddToWorklist(N); in combineMaskedLoad() 50355 DCI.AddToWorklist(N); in combineMaskedStore() 50677 DCI.AddToWorklist(N); in combineVEXTRACT_STORE() 52305 DCI.AddToWorklist(N); in combineBT() 52640 DCI.CombineTo(N, Setcc); in combineSext() [all …]
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| /freebsd-14.2/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | TargetLowering.h | 3888 DAGCombinerInfo &DCI) const; 3894 DAGCombinerInfo &DCI) const; 3939 DAGCombinerInfo &DCI) const; 4122 bool foldBooleans, DAGCombinerInfo &DCI, 5388 const SDLoc &DL, DAGCombinerInfo &DCI) const; 5394 DAGCombinerInfo &DCI, 5400 DAGCombinerInfo &DCI, const SDLoc &DL) const; 5404 DAGCombinerInfo &DCI, const SDLoc &DL, 5407 ISD::CondCode Cond, DAGCombinerInfo &DCI, 5412 DAGCombinerInfo &DCI, const SDLoc &DL, [all …]
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