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Searched refs:getInterval (Results 1 – 25 of 33) sorted by relevance

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/freebsd-12.1/contrib/llvm/lib/CodeGen/
H A DLiveRangeEdit.cpp47 LiveInterval &OldLI = LIS.getInterval(OldReg); in createEmptyIntervalFrom()
67 LIS.getInterval(VReg).markNotSpillable(); in createFrom()
87 LiveInterval &OrigLI = LIS.getInterval(Original); in scanRemattable()
124 LiveInterval &li = LIS.getInterval(MO.getReg()); in allUsesAvailableAt()
295 LiveInterval &OrigLI = LIS.getInterval(Original); in eliminateDeadDef()
319 LiveInterval &LI = LIS.getInterval(Reg); in eliminateDeadDef()
385 ToShrink.remove(&LIS.getInterval(Reg)); in eliminateDeadDef()
466 LiveInterval &LI = LIS.getInterval(get(I)); in calculateRegClassAndHint()
H A DInlineSpiller.cpp332 LiveInterval &SnipLI = LIS.getInterval(SnipReg); in collectRegsToSpill()
377 LiveInterval &SrcLI = LIS.getInterval(SrcReg); in hoistSpillInsideBB()
388 LiveInterval &OrigLI = LIS.getInterval(Original); in hoistSpillInsideBB()
544 LiveInterval &OrigLI = LIS.getInterval(Original); in reMaterializeFor()
613 LiveInterval &LI = LIS.getInterval(Reg); in reMaterializeAll()
634 LiveInterval &LI = LIS.getInterval(Reg); in reMaterializeAll()
930 LiveInterval &OldLI = LIS.getInterval(Reg); in spillAroundUses()
1036 StackInt = &LSS.getInterval(StackSlot); in spillAll()
1110 LiveInterval &OrigLI = LIS.getInterval(Original); in addToMergeableSpills()
1152 LiveInterval &LI = LIS.getInterval(SibReg); in isSpillCandBB()
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H A DRegisterCoalescer.cpp1185 LiveInterval &SrcInt = LIS->getInterval(SrcReg); in reMaterializeTrivialDef()
1325 LiveInterval &DstInt = LIS->getInterval(DstReg); in reMaterializeTrivialDef()
1500 const LiveInterval &SrcLI = LIS->getInterval(SrcReg); in eliminateUndefCopy()
1515 LiveInterval &DstLI = LIS->getInterval(DstReg); in eliminateUndefCopy()
1939 dbgs() << LIS->getInterval(CP.getDstReg()); in joinCopy()
1952 LiveInterval &RHS = LIS->getInterval(SrcReg); in joinReservedPhysReg()
2387 const LiveInterval &LI = LIS->getInterval(SrcReg); in followCopyChain()
3258 LiveInterval &RHS = LIS->getInterval(CP.getSrcReg()); in joinVirtRegs()
3431 LiveInterval &LI = LIS->getInterval(reg); in lateLiveIntervalUpdate()
3510 if (LIS->getInterval(OtherReg).overlaps(DstLI)) { in applyTerminalRule()
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H A DSplitKit.cpp343 const LiveInterval &Orig = LIS.getInterval(OrigReg); in isOriginalEndpoint()
464 LiveInterval *LI = &LIS.getInterval(Edit->get(RegIdx)); in defValue()
633 LiveInterval *LI = &LIS.getInterval(Edit->get(RegIdx)); in defFromParent()
641 LiveInterval &OrigLI = LIS.getInterval(Original); in defFromParent()
848 LiveInterval *LI = &LIS.getInterval(Edit->get(0)); in removeBackCopies()
949 LiveInterval *LI = &LIS.getInterval(Edit->get(0)); in computeRedundantBackCopies()
1004 LiveInterval *LI = &LIS.getInterval(Edit->get(0)); in hoistCopies()
1398 LiveInterval &LI = LIS.getInterval(R); in rewriteAssigned()
1410 LiveInterval *LI = &LIS.getInterval(*I); in deleteRematVictims()
1517 LiveInterval &LI = LIS.getInterval(Reg); in finish()
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H A DRegAllocBase.cpp79 enqueue(&LIS->getInterval(Reg)); in seedLiveRegs()
144 LiveInterval *SplitVirtReg = &LIS->getInterval(Reg); in allocatePhysRegs()
H A DRegAllocPBQP.cpp203 LIS.getInterval(G.getNodeMetadata(NId).getVReg()).weight; in apply()
336 LiveInterval &LI = LIS.getInterval(VReg); in apply()
595 LiveInterval &VRegLI = LIS.getInterval(VReg); in initializeGraph()
653 if (LIS.getInterval(VReg).empty()) { in initializeGraph()
682 LiveRangeEdit LRE(&LIS.getInterval(VReg), NewIntervals, MF, LIS, &VRM, in spillVReg()
695 const LiveInterval &LI = LIS.getInterval(*I); in spillVReg()
752 LiveInterval &LI = LIS.getInterval(*I); in finalizeAlloc()
H A DPHIElimination.cpp340 LiveInterval &DestLI = LIS->getInterval(DestReg); in LowerPHINode()
482 LiveInterval &SrcLI = LIS->getInterval(SrcReg); in LowerPHINode()
642 return LIS->isLiveInToMBB(LIS->getInterval(Reg), MBB); in isLiveIn()
657 const LiveInterval &LI = LIS->getInterval(Reg); in isLiveOutPastPHIs()
H A DRegAllocBasic.cpp146 LiveInterval &LI = LIS->getInterval(VirtReg); in INITIALIZE_PASS_DEPENDENCY()
165 LiveInterval &LI = LIS->getInterval(VirtReg); in LRE_WillShrinkVirtReg()
H A DRegAllocGreedy.cpp634 LiveInterval &LI = LIS->getInterval(VirtReg); in LRE_CanEraseVirtReg()
653 LiveInterval &LI = LIS->getInterval(VirtReg); in LRE_WillShrinkVirtReg()
749 LiveInterval *LI = &LIS->getInterval(~CurQueue.top().second); in dequeue()
1500 LiveInterval &EvictorLI = LIS->getInterval(Evictor); in splitCanCauseEvictionChain()
1509 VRAI.futureWeight(LIS->getInterval(Evictee), in splitCanCauseEvictionChain()
1552 VRAI.futureWeight(LIS->getInterval(VirtRegToSplit), in splitCanCauseLocalSpill()
1771 LiveInterval &Reg = LIS->getInterval(LREdit.get(i)); in splitAroundRegion()
2034 LiveInterval &LI = LIS->getInterval(LREdit.get(i)); in tryBlockSplit()
2429 setStage(LIS->getInterval(LREdit.get(i)), RS_Split2); in tryLocalSplit()
2694 if (RecoloringCandidates.count(&LIS->getInterval(*Next))) in tryLastChanceRecoloring()
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H A DCalcSpillWeights.cpp47 VRAI.calculateSpillWeightAndHint(LIS.getInterval(Reg)); in calculateSpillWeightsAndHints()
121 const LiveInterval &SrcLI = LIS.getInterval(Reg); in isRematerializable()
H A DTwoAddressInstructionPass.cpp253 LiveInterval &LI = LIS->getInterval(SavedReg); in sink3AddrInstruction()
439 LiveInterval &LI = LIS->getInterval(Reg); in isPlainlyKilled()
874 LiveInterval &LI = LIS->getInterval(Reg); in rescheduleMIBelowKill()
1064 LiveInterval &LI = LIS->getInterval(Reg); in rescheduleKillAboveMI()
1581 LiveInterval &LI = LIS->getInterval(RegA); in processTiedPairs()
1643 LiveInterval &LI = LIS->getInterval(RegB); in processTiedPairs()
H A DLiveDebugVariables.cpp560 const LiveInterval &LI = LIS->getInterval(Reg); in handleDebugValue()
706 LiveInterval *DstLI = &LIS.getInterval(DstReg); in addDefsFromCopies()
769 LI = &LIS.getInterval(LocMO.getReg()); in computeIntervals()
939 LiveInterval *LI = &LIS.getInterval(NewRegs[i]); in splitLocation()
H A DVirtRegMap.cpp319 LiveInterval &LI = LIS->getInterval(VirtReg); in addMBBLiveIns()
358 const LiveInterval &LI = LIS->getInterval(Reg); in readsUndefSubreg()
/freebsd-12.1/contrib/llvm/lib/Target/PowerPC/
H A DPPCVSXFMAMutate.cpp112 LIS->getInterval(MI.getOperand(1).getReg()).Query(FMAIdx).valueIn(); in processBlock()
192 if (LIS->getInterval(Reg2).Query(FMAIdx).isKill() in processBlock()
196 } else if (LIS->getInterval(Reg3).Query(FMAIdx).isKill() in processBlock()
213 !LIS->getInterval(AddendSrcReg).liveAt(FMAIdx)) in processBlock()
281 LiveInterval &FMAInt = LIS->getInterval(OldFMAReg); in processBlock()
299 LiveInterval &NewFMAInt = LIS->getInterval(KilledProdReg); in processBlock()
/freebsd-12.1/contrib/llvm/lib/Target/AArch64/
H A DAArch64PBQPRegAlloc.cpp187 const LiveInterval &ld = LIs.getInterval(Rd); in addIntraChainConstraint()
188 const LiveInterval &la = LIs.getInterval(Ra); in addIntraChainConstraint()
263 const LiveInterval &ld = LIs.getInterval(Rd); in addInterChainConstraint()
269 const LiveInterval &lr = LIs.getInterval(r); in addInterChainConstraint()
322 const LiveInterval &LI = LIs.getInterval(reg); in regJustKilledBefore()
/freebsd-12.1/contrib/llvm/lib/Target/WebAssembly/
H A DWebAssemblyOptimizeLiveIntervals.cpp89 LIS.splitSeparateComponents(LIS.getInterval(Reg), SplitLIs); in runOnMachineFunction()
100 LiveInterval &LI = LIS.getInterval(MI->getOperand(0).getReg()); in runOnMachineFunction()
H A DWebAssemblyMemIntrinsicResults.cpp92 LiveInterval *FromLI = &LIS.getInterval(FromReg); in ReplaceDominatedUses()
93 LiveInterval *ToLI = &LIS.getInterval(ToReg); in ReplaceDominatedUses()
H A DWebAssemblyRegStackify.cpp278 if (const VNInfo *ValNo = LIS.getInterval(Reg).getVNInfoBefore( in GetVRegDef()
295 const LiveInterval &LI = LIS.getInterval(Reg); in HasOneUse()
395 const LiveInterval &LI = LIS.getInterval(Reg); in OneUseDominatesOtherUses()
499 LiveInterval &LI = LIS.getInterval(Reg); in MoveForSingleUse()
541 LiveInterval &LI = LIS.getInterval(Reg); in RematerializeCheapDef()
614 LiveInterval &LI = LIS.getInterval(Reg); in MoveAndTeeForMultiUse()
H A DWebAssemblyRegColoring.cpp109 LiveInterval *LI = &Liveness->getInterval(VReg); in runOnMachineFunction()
/freebsd-12.1/contrib/llvm/include/llvm/CodeGen/
H A DLiveStacks.h64 LiveInterval &getInterval(int Slot) { in getInterval() function
71 const LiveInterval &getInterval(int Slot) const { in getInterval() function
H A DLiveIntervals.h115 LiveInterval &getInterval(unsigned Reg) { in getInterval() function
122 const LiveInterval &getInterval(unsigned Reg) const { in getInterval() function
123 return const_cast<LiveIntervals*>(this)->getInterval(Reg); in getInterval()
/freebsd-12.1/contrib/llvm/lib/Target/Hexagon/
H A DHexagonRegisterInfo.cpp271 return !any_of(LIS.getInterval(DstReg), HasCall) && in shouldCoalesce()
272 !any_of(LIS.getInterval(SrcReg), HasCall); in shouldCoalesce()
280 return any_of(LIS.getInterval(LargeReg), HasCall) || in shouldCoalesce()
281 !any_of(LIS.getInterval(SmallReg), HasCall); in shouldCoalesce()
H A DHexagonExpandCondsets.cpp334 LiveInterval &LI = LIS->getInterval(Reg); in updateKillFlags()
426 LiveInterval &LI = LIS->getInterval(Reg); in updateDeadsInRange()
528 LiveInterval &LI = LIS->getInterval(Reg); in updateDeadFlags()
572 LIS->getInterval(R).verify(); in updateLiveness()
1136 LiveInterval &L1 = LIS->getInterval(R1.Reg); in coalesceRegisters()
1137 LiveInterval &L2 = LIS->getInterval(R2.Reg); in coalesceRegisters()
/freebsd-12.1/contrib/llvm/lib/Target/AMDGPU/
H A DGCNRegPressure.cpp47 const auto &LI = LIS.getInterval(Reg); in printLivesAt()
258 const auto &LI = LIS.getInterval(Reg); in getLiveLaneMask()
377 const LiveInterval &LI = LIS.getInterval(It.first); in advanceBeforeNext()
/freebsd-12.1/contrib/llvm/lib/Target/SystemZ/
H A DSystemZRegisterInfo.cpp281 LiveInterval &IntGR128 = LIS.getInterval(GR128Reg); in shouldCoalesce()
282 LiveInterval &IntGRNar = LIS.getInterval(GRNarReg); in shouldCoalesce()

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