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Searched refs:UINT_TO_FP (Results 1 – 25 of 28) sorted by relevance

12

/freebsd-12.1/contrib/llvm/lib/Target/ARM/
H A DARMTargetTransformInfo.cpp194 { ISD::UINT_TO_FP, MVT::v2f32, MVT::v2i8, 3 }, in getCastInstrCost()
280 { ISD::UINT_TO_FP, MVT::f32, MVT::i1, 2 }, in getCastInstrCost()
282 { ISD::UINT_TO_FP, MVT::f64, MVT::i1, 2 }, in getCastInstrCost()
284 { ISD::UINT_TO_FP, MVT::f32, MVT::i8, 2 }, in getCastInstrCost()
286 { ISD::UINT_TO_FP, MVT::f64, MVT::i8, 2 }, in getCastInstrCost()
288 { ISD::UINT_TO_FP, MVT::f32, MVT::i16, 2 }, in getCastInstrCost()
290 { ISD::UINT_TO_FP, MVT::f64, MVT::i16, 2 }, in getCastInstrCost()
292 { ISD::UINT_TO_FP, MVT::f32, MVT::i32, 2 }, in getCastInstrCost()
294 { ISD::UINT_TO_FP, MVT::f64, MVT::i32, 2 }, in getCastInstrCost()
296 { ISD::UINT_TO_FP, MVT::f32, MVT::i64, 10 }, in getCastInstrCost()
[all …]
H A DARMISelLowering.cpp166 setOperationAction(ISD::UINT_TO_FP, VT, Custom); in addTypeForNEON()
171 setOperationAction(ISD::UINT_TO_FP, VT, Expand); in addTypeForNEON()
655 setOperationAction(ISD::UINT_TO_FP, MVT::v4i16, Custom); in ARMTargetLowering()
656 setOperationAction(ISD::UINT_TO_FP, MVT::v8i16, Custom); in ARMTargetLowering()
764 setOperationAction(ISD::UINT_TO_FP, MVT::i32, Custom); in ARMTargetLowering()
4886 case ISD::UINT_TO_FP: in LowerVectorINT_TO_FP()
4888 Opc = ISD::UINT_TO_FP; in LowerVectorINT_TO_FP()
8017 case ISD::UINT_TO_FP: return LowerINT_TO_FP(Op, DAG); in LowerOperation()
12159 (OpOpcode != ISD::SINT_TO_FP && OpOpcode != ISD::UINT_TO_FP)) in PerformVDIVCombine()
/freebsd-12.1/contrib/llvm/lib/Target/X86/
H A DX86TargetTransformInfo.cpp1440 { ISD::UINT_TO_FP, MVT::v4f32, MVT::v4i1, 7 }, in getCastInstrCost()
1441 { ISD::UINT_TO_FP, MVT::v4f64, MVT::v4i1, 7 }, in getCastInstrCost()
1442 { ISD::UINT_TO_FP, MVT::v8f32, MVT::v8i1, 6 }, in getCastInstrCost()
1443 { ISD::UINT_TO_FP, MVT::v4f32, MVT::v4i8, 2 }, in getCastInstrCost()
1444 { ISD::UINT_TO_FP, MVT::v4f64, MVT::v4i8, 2 }, in getCastInstrCost()
1445 { ISD::UINT_TO_FP, MVT::v8f32, MVT::v8i8, 5 }, in getCastInstrCost()
1446 { ISD::UINT_TO_FP, MVT::v4f32, MVT::v4i16, 2 }, in getCastInstrCost()
1447 { ISD::UINT_TO_FP, MVT::v4f64, MVT::v4i16, 2 }, in getCastInstrCost()
1529 { ISD::UINT_TO_FP, MVT::v4f32, MVT::v16i8, 8 }, in getCastInstrCost()
1533 { ISD::UINT_TO_FP, MVT::v4f32, MVT::v4i32, 8 }, in getCastInstrCost()
[all …]
H A DX86IntrinsicsInfo.h617 ISD::UINT_TO_FP, X86ISD::UINT_TO_FP_RND),
619 ISD::UINT_TO_FP, X86ISD::UINT_TO_FP_RND),
623 ISD::UINT_TO_FP, 0),
625 ISD::UINT_TO_FP, X86ISD::UINT_TO_FP_RND),
H A DX86ISelLowering.cpp215 setOperationAction(ISD::UINT_TO_FP , MVT::i32 , Custom); in X86TargetLowering()
218 setOperationAction(ISD::UINT_TO_FP , MVT::i64 , Custom); in X86TargetLowering()
222 setOperationAction(ISD::UINT_TO_FP , MVT::i64 , Custom); in X86TargetLowering()
225 setOperationAction(ISD::UINT_TO_FP , MVT::i32 , Custom); in X86TargetLowering()
227 setOperationAction(ISD::UINT_TO_FP , MVT::i32 , Expand); in X86TargetLowering()
735 setOperationAction(ISD::UINT_TO_FP, VT, Expand); in X86TargetLowering()
1248 setOperationAction(ISD::UINT_TO_FP, MVT::v8i32, Custom); in X86TargetLowering()
1497 setOperationAction(ISD::UINT_TO_FP, MVT::v8i64, Legal); in X86TargetLowering()
1588 setOperationAction(ISD::UINT_TO_FP, VT, Legal); in X86TargetLowering()
1885 setTargetDAGCombine(ISD::UINT_TO_FP); in X86TargetLowering()
[all …]
/freebsd-12.1/contrib/llvm/lib/Target/AArch64/
H A DAArch64TargetTransformInfo.cpp321 { ISD::UINT_TO_FP, MVT::v2f32, MVT::v2i32, 1 }, in getCastInstrCost()
322 { ISD::UINT_TO_FP, MVT::v4f32, MVT::v4i32, 1 }, in getCastInstrCost()
323 { ISD::UINT_TO_FP, MVT::v2f64, MVT::v2i64, 1 }, in getCastInstrCost()
329 { ISD::UINT_TO_FP, MVT::v2f32, MVT::v2i8, 3 }, in getCastInstrCost()
330 { ISD::UINT_TO_FP, MVT::v2f32, MVT::v2i16, 3 }, in getCastInstrCost()
331 { ISD::UINT_TO_FP, MVT::v2f32, MVT::v2i64, 2 }, in getCastInstrCost()
336 { ISD::UINT_TO_FP, MVT::v4f32, MVT::v4i8, 3 }, in getCastInstrCost()
337 { ISD::UINT_TO_FP, MVT::v4f32, MVT::v4i16, 2 }, in getCastInstrCost()
343 { ISD::UINT_TO_FP, MVT::v8f32, MVT::v8i16, 4 }, in getCastInstrCost()
353 { ISD::UINT_TO_FP, MVT::v2f64, MVT::v2i8, 4 }, in getCastInstrCost()
[all …]
H A DAArch64ISelLowering.cpp243 setOperationAction(ISD::UINT_TO_FP, MVT::i32, Custom); in AArch64TargetLowering()
244 setOperationAction(ISD::UINT_TO_FP, MVT::i64, Custom); in AArch64TargetLowering()
245 setOperationAction(ISD::UINT_TO_FP, MVT::i128, Custom); in AArch64TargetLowering()
558 setTargetDAGCombine(ISD::UINT_TO_FP); in AArch64TargetLowering()
652 setOperationAction(ISD::UINT_TO_FP, MVT::v1i64, Expand); in AArch64TargetLowering()
671 setOperationAction(ISD::UINT_TO_FP, MVT::v2i32, Custom); in AArch64TargetLowering()
673 setOperationAction(ISD::UINT_TO_FP, MVT::v2i64, Custom); in AArch64TargetLowering()
677 setOperationAction(ISD::UINT_TO_FP, MVT::v4i32, Custom); in AArch64TargetLowering()
2940 case ISD::UINT_TO_FP: in LowerOperation()
9168 (Opc != ISD::SINT_TO_FP && Opc != ISD::UINT_TO_FP)) in performFDivCombine()
[all …]
/freebsd-12.1/contrib/llvm/include/llvm/CodeGen/
H A DISDOpcodes.h479 UINT_TO_FP, enumerator
/freebsd-12.1/contrib/llvm/lib/CodeGen/SelectionDAG/
H A DLegalizeVectorOps.cpp439 case ISD::UINT_TO_FP: in LegalizeOp()
487 case ISD::UINT_TO_FP: in Promote()
542 unsigned Opc = Op.getOpcode() == ISD::UINT_TO_FP ? ISD::ZERO_EXTEND : in PromoteINT_TO_FP()
752 case ISD::UINT_TO_FP: in Expand()
H A DSelectionDAGDumper.cpp317 case ISD::UINT_TO_FP: return "uint_to_fp"; in getOperationName()
H A DLegalizeVectorTypes.cpp102 case ISD::UINT_TO_FP: in ScalarizeVectorResult()
543 case ISD::UINT_TO_FP: in ScalarizeVectorOperand()
787 case ISD::UINT_TO_FP: in SplitVectorResult()
1726 case ISD::UINT_TO_FP: in SplitVectorOperand()
2503 case ISD::UINT_TO_FP: in WidenVectorResult()
3711 case ISD::UINT_TO_FP: in WidenVectorOperand()
H A DLegalizeDAG.cpp995 case ISD::UINT_TO_FP: in LegalizeOp()
2463 if (TLI.isOperationLegalOrCustom(ISD::UINT_TO_FP, NewInTy)) { in PromoteLegalINT_TO_FP()
2464 OpToUse = ISD::UINT_TO_FP; in PromoteLegalINT_TO_FP()
2859 case ISD::UINT_TO_FP: in ExpandNode()
4104 if (Node->getOpcode() == ISD::UINT_TO_FP || in PromoteNode()
4164 case ISD::UINT_TO_FP: in PromoteNode()
H A DLegalizeFloatTypes.cpp110 case ISD::UINT_TO_FP: R = SoftenFloatRes_XINT_TO_FP(N); break; in SoftenFloatResult()
1099 case ISD::UINT_TO_FP: ExpandFloatRes_XINT_TO_FP(N, Lo, Hi); break; in ExpandFloatResult()
1933 case ISD::UINT_TO_FP: R = PromoteFloatRes_XINT_TO_FP(N); break; in PromoteFloatResult()
H A DLegalizeIntegerTypes.cpp1076 case ISD::UINT_TO_FP: Res = PromoteIntOp_UINT_TO_FP(N); break; in PromoteIntegerOperand()
3184 case ISD::UINT_TO_FP: Res = ExpandIntOp_UINT_TO_FP(N); break; in ExpandIntegerOperand()
/freebsd-12.1/contrib/llvm/lib/Target/PowerPC/
H A DPPCISelLowering.cpp199 AddPromotedToType(ISD::UINT_TO_FP, MVT::i1, in PPCTargetLowering()
203 setOperationAction(ISD::UINT_TO_FP, MVT::i1, Custom); in PPCTargetLowering()
370 setOperationAction(ISD::UINT_TO_FP, MVT::i32, Legal); in PPCTargetLowering()
377 setOperationAction(ISD::UINT_TO_FP, MVT::i32, Expand); in PPCTargetLowering()
500 setOperationAction(ISD::UINT_TO_FP, MVT::i64, Expand); in PPCTargetLowering()
1066 setTargetDAGCombine(ISD::UINT_TO_FP); in PPCTargetLowering()
7247 UI->getOpcode() != ISD::UINT_TO_FP) in directMoveIsProfitable()
9646 case ISD::UINT_TO_FP: in LowerOperation()
12317 FirstInput.getOpcode() != ISD::UINT_TO_FP) in DAGCombineBuildVector()
12360 N->getOpcode() == ISD::UINT_TO_FP) && in combineFPToIntToFP()
[all …]
/freebsd-12.1/contrib/llvm/lib/Target/AMDGPU/
H A DAMDGPUISelLowering.cpp380 setOperationAction(ISD::UINT_TO_FP, MVT::i64, Custom); in AMDGPUTargetLowering()
417 setOperationAction(ISD::UINT_TO_FP, VT, Expand); in AMDGPUTargetLowering()
1164 case ISD::UINT_TO_FP: return LowerUINT_TO_FP(Op, DAG); in LowerOperation()
1489 ISD::NodeType ToFp = Sign ? ISD::SINT_TO_FP : ISD::UINT_TO_FP; in LowerDIVREM24()
1614 SDValue Cvt_Lo = DAG.getNode(ISD::UINT_TO_FP, DL, MVT::f32, RHS_Lo); in LowerUDIVREM64()
1615 SDValue Cvt_Hi = DAG.getNode(ISD::UINT_TO_FP, DL, MVT::f32, RHS_Hi); in LowerUDIVREM64()
2443 SDValue CvtHi = DAG.getNode(Signed ? ISD::SINT_TO_FP : ISD::UINT_TO_FP, in LowerINT_TO_FP64()
2446 SDValue CvtLo = DAG.getNode(ISD::UINT_TO_FP, SL, MVT::f64, Lo); in LowerINT_TO_FP64()
H A DR600ISelLowering.cpp1852 if (Arg.getOpcode() == ISD::UINT_TO_FP && Arg.getValueType() == MVT::f64) { in PerformDAGCombine()
1853 return DAG.getNode(ISD::UINT_TO_FP, DL, N->getValueType(0), in PerformDAGCombine()
H A DSIISelLowering.cpp466 setOperationAction(ISD::UINT_TO_FP, MVT::i16, Promote); in SITargetLowering()
484 setOperationAction(ISD::UINT_TO_FP, MVT::f16, Promote); in SITargetLowering()
678 setTargetDAGCombine(ISD::UINT_TO_FP); in SITargetLowering()
7609 case ISD::UINT_TO_FP: in fp16SrcZerosHighBits()
7703 if (VT == MVT::f32 && (N0.getOpcode() == ISD::UINT_TO_FP || in performRcpCombine()
8972 case ISD::UINT_TO_FP: in PerformDAGCombine()
/freebsd-12.1/contrib/llvm/lib/Target/Sparc/
H A DSparcISelLowering.cpp1516 setOperationAction(ISD::UINT_TO_FP, MVT::i32, Custom); in SparcTargetLowering()
1518 setOperationAction(ISD::UINT_TO_FP, MVT::i64, Custom); in SparcTargetLowering()
3023 case ISD::UINT_TO_FP: return LowerUINT_TO_FP(Op, DAG, *this, in LowerOperation()
3368 case ISD::UINT_TO_FP: in ReplaceNodeResults()
/freebsd-12.1/contrib/llvm/lib/Target/Hexagon/
H A DHexagonISelLowering.cpp1528 setOperationAction(ISD::UINT_TO_FP, MVT::i1, Promote); in HexagonTargetLowering()
1529 setOperationAction(ISD::UINT_TO_FP, MVT::i8, Promote); in HexagonTargetLowering()
1530 setOperationAction(ISD::UINT_TO_FP, MVT::i16, Promote); in HexagonTargetLowering()
/freebsd-12.1/contrib/llvm/lib/CodeGen/
H A DTargetLoweringBase.cpp1488 case UIToFP: return ISD::UINT_TO_FP; in InstructionOpcodeToISD()
/freebsd-12.1/contrib/llvm/lib/Target/SystemZ/
H A DSystemZISelLowering.cpp247 setOperationAction(ISD::UINT_TO_FP, MVT::i32, Promote); in SystemZTargetLowering()
248 setOperationAction(ISD::UINT_TO_FP, MVT::i64, Expand); in SystemZTargetLowering()
376 setOperationAction(ISD::UINT_TO_FP, MVT::v2i64, Legal); in SystemZTargetLowering()
377 setOperationAction(ISD::UINT_TO_FP, MVT::v2f64, Legal); in SystemZTargetLowering()
/freebsd-12.1/contrib/llvm/lib/Target/Mips/
H A DMipsSEISelLowering.cpp353 setOperationAction(ISD::UINT_TO_FP, Ty, Legal); in addMSAIntType()
1832 return DAG.getNode(ISD::UINT_TO_FP, DL, Op->getValueType(0), in lowerINTRINSIC_WO_CHAIN()
H A DMipsISelLowering.cpp411 setOperationAction(ISD::UINT_TO_FP, MVT::i32, Expand); in MipsTargetLowering()
412 setOperationAction(ISD::UINT_TO_FP, MVT::i64, Expand); in MipsTargetLowering()
/freebsd-12.1/contrib/llvm/include/llvm/Target/
H A DTargetSelectionDAG.td452 def uint_to_fp : SDNode<"ISD::UINT_TO_FP" , SDTIntToFPOp>;

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