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Searched refs:RB (Results 1 – 25 of 53) sorted by relevance

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/freebsd-12.1/contrib/llvm/lib/Target/PowerPC/
H A DPPCInstrSPE.td20 bits<5> RB;
26 let Inst{16-20} = RB;
33 let RB = 0;
47 bits<5> RB;
52 let Inst{16-20} = RB;
61 bits<5> RB;
67 let Inst{16-20} = RB;
74 let RB = 0;
88 bits<5> RB;
95 let Inst{16-20} = RB;
[all …]
H A DPPCInstrHTM.td109 def : Pat<(int_ppc_tabortwc i32:$TO, i32:$RA, i32:$RB),
110 (TABORTWC (HTM_get_imm imm:$TO), $RA, $RB)>;
115 def : Pat<(int_ppc_tabortdc i32:$TO, i32:$RA, i32:$RB),
116 (TABORTDC (HTM_get_imm imm:$TO), $RA, $RB)>;
H A DPPCInstrFormats.td556 bits<5> RB;
572 bits<5> RB;
606 bits<5> RB;
943 bits<5> RB;
962 bits<5> RB;
1397 bits<5> RB;
1702 bits<5> RB;
1719 let RB = 0;
1760 bits<5> RB;
1787 bits<5> RB;
[all …]
/freebsd-12.1/contrib/binutils/opcodes/
H A Dppc-opc.c380 #define RB RAOPT + 1 macro
387 #define RBS RB + 1
3176 { "dcbst", X(31,54), XRT_MASK, PPC, { RA, RB } },
3181 { "dcbste", X(31,62), XRT_MASK, BOOKE64, { RA, RB } },
3755 { "slbie", X(31,434), XRTRA_MASK, PPC64, { RB } },
3981 { "dcbi", X(31,470), XRT_MASK, PPC, { RA, RB } },
4233 { "tlbld", X(31,978), XRTRA_MASK, PPC, { RB } },
4237 { "icbi", X(31,982), XRT_MASK, PPC, { RA, RB } },
4249 { "tlbli", X(31,1010), XRTRA_MASK, PPC, { RB } },
4254 { "dcbz", X(31,1014), XRT_MASK, PPC, { RA, RB } },
[all …]
/freebsd-12.1/contrib/llvm/tools/clang/lib/Rewrite/
H A DHTMLRewrite.cpp63 RB.InsertTextAfter(B, StartTag); in HighlightRange()
64 RB.InsertTextBefore(E, EndTag); in HighlightRange()
97 RB.InsertTextAfter(i, StartTag); in HighlightRange()
134 RB.ReplaceText(FilePos, 1, "<hr>"); in EscapeText()
143 RB.ReplaceText(FilePos, 1, in EscapeText()
152 RB.ReplaceText(FilePos, 1, "&lt;"); in EscapeText()
157 RB.ReplaceText(FilePos, 1, "&gt;"); in EscapeText()
221 RB.InsertTextBefore(B, OS.str()); in AddLineNumber()
223 RB.InsertTextBefore(B, OS.str()); in AddLineNumber()
224 RB.InsertTextBefore(E, "</td></tr>"); in AddLineNumber()
[all …]
H A DRewriter.cpp152 const RewriteBuffer &RB = I->second; in getRangeSize() local
153 EndOff = RB.getMappedOffset(EndOff, opts.IncludeInsertsAtEndOfRange); in getRangeSize()
154 StartOff = RB.getMappedOffset(StartOff, !opts.IncludeInsertsAtBeginOfRange); in getRangeSize()
201 const RewriteBuffer &RB = I->second; in getRewrittenText() local
202 EndOff = RB.getMappedOffset(EndOff, true); in getRewrittenText()
203 StartOff = RB.getMappedOffset(StartOff); in getRewrittenText()
210 RewriteBuffer::iterator Start = RB.begin(); in getRewrittenText()
385 RewriteBuffer &RB = getEditBuffer(FID); in IncreaseIndentation() local
393 RB.InsertText(offs, indent, /*InsertAfter=*/false); in IncreaseIndentation()
/freebsd-12.1/contrib/llvm/lib/Target/Hexagon/
H A DRDFRegisters.h116 bool alias(RegisterRef RA, RegisterRef RB) const { in alias()
118 return !isRegMaskId(RB.Reg) ? aliasRR(RA, RB) : aliasRM(RA, RB); in alias()
119 return !isRegMaskId(RB.Reg) ? aliasRM(RB, RA) : aliasMM(RA, RB); in alias()
153 bool aliasRR(RegisterRef RA, RegisterRef RB) const;
167 static bool isCoverOf(RegisterRef RA, RegisterRef RB, in isCoverOf()
169 return RegisterAggr(PRI).insert(RA).hasCoverOf(RB); in isCoverOf()
H A DRDFRegisters.cpp132 bool PhysicalRegisterInfo::aliasRR(RegisterRef RA, RegisterRef RB) const { in aliasRR()
134 assert(TargetRegisterInfo::isPhysicalRegister(RB.Reg)); in aliasRR()
137 MCRegUnitMaskIterator UMB(RB.Reg, &TRI); in aliasRR()
148 if (PB.second.any() && (PB.second & RB.Mask).none()) { in aliasRR()
H A DHexagonVLIWPacketizer.cpp250 MachineBasicBlock::iterator RB = Begin; in runOnMachineFunction() local
251 while (RB != End && HII->isSchedulingBoundary(*RB, &MB, MF)) in runOnMachineFunction()
252 ++RB; in runOnMachineFunction()
255 MachineBasicBlock::iterator RE = RB; in runOnMachineFunction()
262 if (RB != End) in runOnMachineFunction()
263 Packetizer.PacketizeMIs(&MB, RB, RE); in runOnMachineFunction()
H A DHexagonGenInsert.cpp232 BitValueOrdering(const RegisterOrdering &RB) : BaseOrd(RB) {} in BitValueOrdering()
526 void buildOrderingBT(RegisterOrdering &RB, RegisterOrdering &RO) const;
623 void HexagonGenInsert::buildOrderingBT(RegisterOrdering &RB, in buildOrderingBT() argument
627 BitValueOrdering BVO(RB); in buildOrderingBT()
633 for (RegisterOrdering::iterator I = RB.begin(), E = RB.end(); I != E; ++I) in buildOrderingBT()
/freebsd-12.1/contrib/llvm/tools/clang/lib/Frontend/Rewrite/
H A DRewriteMacros.cpp95 RewriteBuffer &RB = Rewrite.getEditBuffer(SM.getMainFileID()); in RewriteMacrosInInput() local
134 RB.InsertTextAfter(SM.getFileOffset(RawTok.getLocation()), "//"); in RewriteMacrosInInput()
140 RB.InsertTextAfter(SM.getFileOffset(RawTok.getLocation()), "//"); in RewriteMacrosInInput()
170 RB.InsertTextAfter(RawOffs, &" /*"[HasSpace]); in RewriteMacrosInInput()
188 RB.InsertTextBefore(EndPos, "*/"); in RewriteMacrosInInput()
204 RB.InsertTextBefore(InsertPos, Expansion); in RewriteMacrosInInput()
/freebsd-12.1/contrib/llvm/tools/lld/ELF/
H A DICF.cpp236 const InputSection *SecB, ArrayRef<RelTy> RB) { in constantEq() argument
238 if (RA[I].r_offset != RB[I].r_offset || in constantEq()
239 RA[I].getType(Config->IsMips64EL) != RB[I].getType(Config->IsMips64EL)) in constantEq()
243 uint64_t AddB = getAddend<ELFT>(RB[I]); in constantEq()
246 Symbol &SB = SecB->template getFile<ELFT>()->getRelocTargetSym(RB[I]); in constantEq()
325 const InputSection *SecB, ArrayRef<RelTy> RB) { in variableEq() argument
326 assert(RA.size() == RB.size()); in variableEq()
331 Symbol &SB = SecB->template getFile<ELFT>()->getRelocTargetSym(RB[I]); in variableEq()
/freebsd-12.1/contrib/compiler-rt/lib/sanitizer_common/
H A Dsanitizer_ring_buffer.h28 RingBuffer *RB = reinterpret_cast<RingBuffer*>(Ptr); in New() local
30 RB->last_ = RB->next_ = reinterpret_cast<T*>(End - sizeof(T)); in New()
31 return RB; in New()
/freebsd-12.1/contrib/llvm/lib/Target/AArch64/
H A DAArch64InstructionSelector.cpp155 if (RB.getID() == AArch64::GPRRegBankID) { in getRegClassForTypeOnBank()
165 if (RB.getID() == AArch64::FPRRegBankID) { in getRegClassForTypeOnBank()
404 const RegisterBank *RB = nullptr; in selectCopy() local
616 if (RB.getID() != AArch64::GPRRegBankID) in selectCompareBranch()
851 if (RB.getID() != AArch64::FPRRegBankID) { in select()
871 if (RB.getID() != AArch64::GPRRegBankID) { in select()
1113 if (RB.getID() != AArch64::GPRRegBankID) { in select()
1290 if (RB.getID() != AArch64::GPRRegBankID) { in select()
1609 if (RB.getID() != AArch64::GPRRegBankID) in selectMergeValues()
1655 if (RB.getID() == AArch64::GPRRegBankID) { in selectBuildVector()
[all …]
H A DAArch64RegisterBankInfo.h64 unsigned ValLength, const RegisterBank &RB);
H A DAArch64GenRegisterBankInfo.def119 const RegisterBank &RB) {
122 Map.RegBank == &RB;
/freebsd-12.1/contrib/llvm/tools/clang/lib/StaticAnalyzer/Checkers/
H A DMacOSXAPIChecker.cpp77 const MemRegion *RB = R->getBaseRegion(); in CheckDispatchOnce() local
78 const MemSpaceRegion *RS = RB->getMemorySpace(); in CheckDispatchOnce()
96 if (const VarRegion *VR = dyn_cast<VarRegion>(RB)) { in CheckDispatchOnce()
/freebsd-12.1/contrib/llvm/lib/CodeGen/GlobalISel/
H A DCSEInfo.cpp286 GISelInstProfileBuilder::addNodeIDRegType(const RegisterBank *RB) const { in addNodeIDRegType()
287 ID.AddPointer(RB); in addNodeIDRegType()
331 auto *RB = MRI.getRegBankOrNull(Reg); in addNodeIDMachineOperand() local
332 if (RB) in addNodeIDMachineOperand()
333 addNodeIDRegType(RB); in addNodeIDMachineOperand()
H A DRegisterBankInfo.cpp91 if (auto *RB = RegClassOrBank.dyn_cast<const RegisterBank *>()) in getRegBank() local
92 return RB; in getRegBank()
136 const RegisterBank *RB = RegClassOrBank.get<const RegisterBank *>(); in constrainGenericRegister() local
138 if (RB && !RB->covers(RC)) in constrainGenericRegister()
/freebsd-12.1/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/lua/
H A Dlvm.c551 #define RB(i) check_exp(getBMode(GET_OPCODE(i)) == OpArgR, base+GETARG_B(i)) macro
618 setobjs2s(L, ra, RB(i)); in luaV_execute()
649 Protect(luaV_gettable(L, RB(i), RKC(i), ra)); in luaV_execute()
673 StkId rb = RB(i); in luaV_execute()
699 TValue *rb = RB(i); in luaV_execute()
709 TValue *rb = RB(i); in luaV_execute()
714 Protect(luaV_objlen(L, ra, RB(i))); in luaV_execute()
764 TValue *rb = RB(i); in luaV_execute()
/freebsd-12.1/contrib/llvm/lib/Target/X86/
H A DX86InstructionSelector.cpp174 if (RB.getID() == X86::GPRRegBankID) { in getRegClass()
184 if (RB.getID() == X86::VECRRegBankID) { in getRegClass()
404 const RegisterBank &RB, in getLoadStoreOp() argument
413 if (X86::GPRRegBankID == RB.getID()) in getLoadStoreOp()
416 if (X86::GPRRegBankID == RB.getID()) in getLoadStoreOp()
419 if (X86::GPRRegBankID == RB.getID()) in getLoadStoreOp()
421 if (X86::VECRRegBankID == RB.getID()) in getLoadStoreOp()
427 if (X86::GPRRegBankID == RB.getID()) in getLoadStoreOp()
429 if (X86::VECRRegBankID == RB.getID()) in getLoadStoreOp()
514 const RegisterBank &RB = *RBI.getRegBank(DefReg, MRI, TRI); in selectLoadStoreOp() local
[all …]
/freebsd-12.1/contrib/lua/src/
H A Dlvm.c729 #define RB(i) check_exp(getBMode(GET_OPCODE(i)) == OpArgR, base+GETARG_B(i)) macro
804 setobjs2s(L, ra, RB(i)); in luaV_execute()
843 StkId rb = RB(i); in luaV_execute()
879 StkId rb = RB(i); in luaV_execute()
1032 TValue *rb = RB(i); in luaV_execute()
1047 TValue *rb = RB(i); in luaV_execute()
1058 TValue *rb = RB(i); in luaV_execute()
1064 Protect(luaV_objlen(L, ra, RB(i))); in luaV_execute()
1121 TValue *rb = RB(i); in luaV_execute()
/freebsd-12.1/contrib/llvm/tools/clang/include/clang/Rewrite/Core/
H A DHTMLRewrite.h48 void HighlightRange(RewriteBuffer &RB, unsigned B, unsigned E,
/freebsd-12.1/crypto/openssl/doc/man3/
H A DSSL_rstate_string.pod41 =item "RB"/"read body"
/freebsd-12.1/contrib/llvm/tools/clang/lib/Frontend/
H A DPrecompiledPreamble.cpp452 for (const auto &RB : PreprocessorOpts.RemappedFileBuffers) { in CanReuse() local
454 if (!moveOnNoError(VFS->status(RB.first), Status)) in CanReuse()
458 PreambleFileHash::createForMemoryBuffer(RB.second); in CanReuse()

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